Re: [Flashforth-devel] problem controlling pins RA4 and RB4 on PIC24FV16KM202
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From: Peter J. <pe...@me...> - 2014-11-09 23:25:52
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On 10/11/14 03:23, mik...@fl... wrote: > Did you try to clear the ODCB.4 and ODCA.4 bits ? > These should be cleared by default, but you never know ? The open-drain bits are zero. blink-ra4-rb4 ok<#,ram> odcb @ u. 0 ok<#,ram> odca @ u. 0 ok<#,ram> > > Strange that the C code did not touch the ANSEL registers. The ANSA and ANSB control only the digital inputs for the pins, as I understand the datasheet. > > The only other thing I can think of is if the pins are used for > something else by FF. That's my guess but I haven't been able to really find such use. I've added my PIC24FV16KM202 configuration to the p24f16ka_config.inc file as this seemed the closest available processor. In that I have FC1_TYPE set to 1 so it shouldn't use the U1RTSPIN which is set to 0xc (RA4, I believe). I've attached my edited version of that file. I also do not have BAUDRATE2 declared so that the U2RTS/ and U2CTS/ should not be active on RB4 and RA4, respectively. Looking at the peripheral module disable, U1MD is enabled (0) while SSPMD, U2MD and ADCMD are disabled (1). That looks appropriate. bin ok<%,ram> $0770 @ u. 11000001 ok<%,ram> > Are those pins defined in the FF confuguration file for load led or > flow control ? The CPU_LOAD_BIT is defined as 8. > > BR Mike > > My version of your source file is from back at the beginning of May 2014. I should port my (small) adjustments for the PIC24FVKM202 to your latest version and try again. Thanks for the hints. Peter J. |