Re: [Flashforth-devel] FF5.0 on PIC24FV32KA302 -- a couple of issues

[Mikael N. <mik...@pp...>]

To verify that the UART errata is the problem
insert a 1 or 2 millisecond delay in EMIT.

EMIT:
         mlit    2
         rcall   MS
         rcall   UEMIT
         goto    FEXECUTE

If it works, then it is clear that the UART TX interrupts cannot be 
trusted on  your chip.

This can also be used as a simple workaround.

I will also write polling TX routines that do not use interrupts.
It only checks the TRMT flag. I think that should work with the UART bug.

BR Mike