[Flashforth-devel] FF5.0 on PIC24FV32KA302 -- a couple of issues
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From: Peter J. <pe...@me...> - 2014-04-17 12:11:12
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Gentlemen, I've had some success getting FF5.0 to run on a PIC24FV32KA302 but have a couple of issues. (a) I can't seem to get the FRCPLL config option to behave as if the PLL is actually on. I measure a very nice 4.00MHz CLK0 signal on the OSCO pin whether I choose FRCDIV or FRCPLL. This is probably my simple bug in the way I've set the config registers. Relevant bits from the config file below. (b) The more troublesome issue is the UART silicon bug in my revision 4 chips. There is a work-around of not completely filling the buffer but I think that requires fiddling with the interrupt or queue code, which is a bit beyond my capability at the moment. I added a little bit of code to the main program, as shown below. Suggestions for an easy fix (hopefully)? The motivation for playing with this particular processor is that it looked to be a nice 16-bit complement to the PIC18F26K22 and the ATmega328P processors which I'm using for the rework the FF tutorial documents. The FV32KA also runs nicely at 5V. If there's no simple fix, I'll choose another processor. Regards, Peter J. ----------------------------------------------------------- p24f16ka_config.incafter line 4 ----------------------------------------------------------- .ifdef __24F16KA102 ;;; Below is the setting for max amount of ram for PIC24F16KA102 .equ FLASH_SIZE, 0x2C00 ; Flash size in bytes without the high byte ; See program memory size in the device datasheet. .equ RAM_SIZE, 0x0600 ; Ram size in bytes .equ EEPROM_SIZE, 0x0200 ; Eeprom size config FOSCSEL, FNOSC_FRCPLL config FOSC, FCKSM_CSDCMD & SOSCSEL_SOSCLP & POSCFREQ_MS & OSCIOFNC_OFF config FWDT, FWDTEN_ON config FPOR, MCLRE_ON & BORV_V18 & I2C1SEL_PRI & PWRTEN_ON & BOREN_BOR3 .equ PROCESSOR_IS_SELECTED, 1 .endif .ifdef __24FV32KA302 .equ FLASH_SIZE, 0x5800 ; Flash size in bytes without the high byte ; See program memory size in the device datasheet. .equ RAM_SIZE, 0x0800 ; Ram size in bytes .equ EEPROM_SIZE, 0x0200 ; Eeprom size config FOSCSEL, FNOSC_FRCPLL & SOSCSRC_ANA & LPRCSEL_HP & IESO_ON config FOSC, POSCMOD_NONE & FCKSM_CSDCMD & SOSCSEL_SOSCLP & POSCFREQ_MS & OSCIOFNC_ON config FWDT, FWDTEN_ON & WDTPS_PS32768 & FWPSA_PR128 & WINDIS_OFF config FPOR, MCLRE_ON & BORV_V20 & I2C1SEL_PRI & PWRTEN_ON & BOREN_BOR3 & LVRCFG_OFF config FICD, ICS_PGx2 .equ PROCESSOR_IS_SELECTED, 1 .endif .if PROCESSOR_IS_SELECTED < 1 .error "Did not select one of our known processor configurations." .endif .equ FREQ_OSC, (8000000) ; Clock (Crystal) frequency (Hz) --------------------------------------------------------------------- ff-pic24-30-33.s after line 827 --------------------------------------------------------------------- ; --------------------------------------------------------- ; Addition to get UART1 working PIC24FV32KA302. ; PJ 2014-04-17 .ifdef __24FV32KA302 bclr ANSB, #ANSB2 ; want U1RX as digital on pin 6 ; To work around silicon issue 5 for revision 4 chips. bclr U1STA, #UTXISEL0 bclr U1STA, #UTXISEL1 ; Still need to work around issue 4 by not sending more ; than three bytes at a time. ; Maybe some fix can be made in __U1TXInterrupt0: ; around line 361 in this file. .else ; As Mike had it: interrupt when last character is shifted out ; of Transmit Shift Register. .ifdecl UTXISEL1 bset U1STA, #UTXISEL0 .else bset U1STA, #UTXISEL .endif .endif ; --------------------------------------------------------- |