Re: [Flashforth-devel] flashforth on p18f4550 - No usb?
Brought to you by:
oh2aun
From: Scott B. <sba...@al...> - 2011-10-14 02:29:18
|
On 11-10-13 08:24 PM, Pete Zawasky wrote: > Scott, > > Here are some changes I have made for a 4550 USB board that has a 20 > MHz XTAL. > p18f-main.cfg > disable IDLE_MODE and CPU_LOAD > ;;;; PIC18F4550 > constant clock = d'48000000' ; Hz > > > p18f2455-2550-4455-4550.cfg > config PLLDIV = 5 ; 20 MHz XT xtal > > > Pete OK, let's try! <recompile, reprogram, plug in> Oooo! Looks good! Output from dmesg: [ 165.030295] usb 5-1: new full speed USB device using ohci_hcd and address 5 [ 165.249659] cdc_acm 5-1:1.0: This device cannot do calls on its own. It is not a modem. [ 165.249703] cdc_acm 5-1:1.0: ttyACM0: USB ACM device [ 165.253145] usbcore: registered new interface driver cdc_acm [ 165.253152] cdc_acm: v0.26:USB Abstract Control Model driver for USB modems and ISDN adapters lsusb: Bus 005 Device 005: ID faf0:faf0 That's what we're looking for. ls -la /dev/ttyACM0 crw-rw---- 1 root dialout 166, 0 2011-10-13 21:18 /dev/ttyACM0 OK, proof's in the pudding: Welcome to minicom 2.5 OPTIONS: I18n Compiled on Feb 5 2011, 06:31:42. Port /dev/ttyACM0 Press CTRL-A Z for help on special keys ok<$,ram> 1 2 + . 3 ok<$,ram> WOW! $5 chip running a high level language. Now THIS is cool! Thanks to Mikael for FF, and to you, Pete, for the magic! I'm new to the PIC world, so how does one calculate the PLL, etc, values? Cheers, Scott > > > > > On 10/13/2011 8:09 PM, Scott Balneaves wrote: >> On 11-10-12 02:38 PM, Mikael Nordman wrote: >>> The first thing to try is to skip the IDLE_MODE in the config file. >>> The IDLE_MODE causes the PIC to poll the USB tranceiver >>> too seldom. >> Gak! I realized now that my first response was to Mikael, and not to the >> list. My apologies. >> >> I've disabled IDLE_MODE in p18f-main.cfg. >> >>> Newer and faster PCs seems to have a problem with that ! >>> >>> Are xtal and pll setting correct ? >> I've set: >> >> constant clock=d'20000000' >> >> in p18f-main.cfg, recompiled, and re-flashed. Same thing's happening on the >> USB bus. >> >> Looking in p18f2455-2550-4455-4550.cfg, I'm seeing: >> >> config PLLDIV = 3 ; 12 MHz XT xtal >> config CPUDIV = OSC1_PLL2 ; 48 MHz cpu clock >> config USBDIV = 2 ; USB clock from 96 MHZ PLL divided by 2 >> >> I'd imagine these aren't correct, but I've no clue how they should be set. >> >> Mike, thanks for the help so far. This looks SO cool if I can get it running! >> >> Cheers, >> Scott >> > > > ------------------------------------------------------------------------------ > All the data continuously generated in your IT infrastructure contains a > definitive record of customers, application performance, security > threats, fraudulent activity and more. Splunk takes this data and makes > sense of it. Business sense. IT sense. Common sense. > http://p.sf.net/sfu/splunk-d2d-oct > _______________________________________________ > Flashforth-devel mailing list > Fla...@li... > https://lists.sourceforge.net/lists/listinfo/flashforth-devel |