flashforth-devel

[Flashforth-devel] 70 MIPS on a dspic33ep512mc806?

[Bob E. <bob...@ti...>]

I'm a Flashforth fan - brilliant tool!

I'm attempting to run Flashforth on a dspic33ep512mc806 as part of this 
DSP radio project http://www.cumbriadesigns.co.uk/DSP.htm. Flashforth 
runs fine on the stock settings from the distribution - Fcy reports 
39.613MIPS. I've been attempting to modify the code to take it up to the 
full 70MIPS. It seems arithmetic on constants in the code objects to 
that - greater than 16 bit values result. I expect I'm not far away from 
getting it going, but I'm currently getting the 'Flashforth' title on 
cold start at 9600 baud, but gibberish if I type anything.

The board has a 20MHz crystal, so the PLL needs to be used to boost to 
Fosc=140MHz. That results in 70MIPS cpu operation.

I'm using a Pickit3 for development.

Anyone been more successful with this or have any debug suggestions to 
get to the problem? I'm new to this.

Regards, Bob

Re: [Flashforth-devel] 70 MIPS on a dspic33ep512mc806?

[<zd...@al...>]

Unfortunately , I have no experience with dsPIC, but know something 
about gibberish responses. 8-P
If you have a scope, check system clock first as it might not be what 
you expect.
Getting 140 MHz from 20 MHz with all the pre and postscaler options 
looks like a slippery slope.
Then check the "gibberish response" with a scope. Different UART chips 
react differently to out of sync characters.
Third, check parity, handshake etc.

Best regards,
Zdravko

Re: [Flashforth-devel] 70 MIPS on a dspic33ep512mc806?

[Mikael N. <mik...@fl...>]

Thanks Bob !

Usually you have to start the chip with FRC
and then configure the PLL to use the HS crystal.
After that you can switch to the new clocking mode.
It's all described in the detailed data sheet of the oscillator.

FF does not yet have inbuilt support for clock switching to HSPLL.
You will have to add code for that into WARM.

FRCPLL is supported by FF.

BR Mikael