flashforth-devel

[Flashforth-devel] Assembler Loops

[Thomas B. <bus...@gm...>]

Hallo,

I try nested loops in Flashforth incl. Assembler, but I get no success.
In the code I want a outer loop (32 times) and two inner loops (13 times
and 20 times). Maybe a watchdogtimer kill the process?
Here is my listing:

variable seqz
variable counter
[#32 movlw
seqz a, movwf,begin,
 latb 0 0 bsf,
 #13 movlw,
 counter a, movwf,
 begin,
  counter 1 a, decfsz,
 again,
 latb 0 0 bcf,
 #20 movlw,
 counter a, movwf,
 begin,
  counter 1 a, decfsz,
 again,
 seqz 1 a, decfsz,
again,
]


Bye Thomas

Re: [Flashforth-devel] Assembler Loops

[Mikael N. <mik...@pp...>]

Hello Thomas,
The Forth variables are in banked ram. Not in access ram.

Below I tried to fix your code.
I have not tested it.

Below it I put another variant that uses the top of the return stack as 
temporary varibles in access ram.

I hope this clarifies things for you.

BR Mike

|: banksel ( addr -- ) #8 rshift $f and movlb, ;

variable seqz     \ forth variable in banked ram
variable counter  \ forth variable in banked ram
[
seqz banksel
#32 movlw
seqz b, movwf,
begin,
  latb0  a,  bsf,
  counter banksel
  #13 movlw,
  counter b, movwf,
  begin,
   counterf,  b, decfsz,
  again,
  latb0  a,  bcf,
  #20 movlw,
  counter b, movwf,
  begin,
   counterf,  b, decfsz,
  again,
  seqz banksel
  seqzf,  b, decfsz,
again,
]

\ ******************************************

$fffd constant seqz    \ tosl register in acccess ram
$fffe constant counter \ tosh register in access ram
[
push,
||#32 movlw
seqz a, movwf,
begin,
  latb0  a,  bsf,
  #13 movlw,
  counter a, movwf,
  begin,
   counterf,  a, decfsz,
  again,
  latb0  a,  bcf,
  #20 movlw,
  counter a, movwf,
  begin,
   counterf,  a, decfsz,
  again,
  seqzf,  a, decfsz,
again,
pop,
]|

Re: [Flashforth-devel] Assembler Loops

[Mikael N. <mik...@pp...>]

Here is another example for bitbanging 8 bits on a spi interface.
It uses the FSR1L(=Tp) and FSR1H(=Tp 1 +)
temporary registers which are always free to be used in
any assembly word.

Note that FSR1H is only 4 bits wide. FSR1L is 8 bits wide.

Srw and Sminus words are accessing the parameter stack directly.

There are also other registers that can be used as variables in 
assembler words.
FSR2L FSR2H TBLPTRL TBLPTRH TABLAT PRODL PRODH
These registers are located in access ram so no bank bits need to be set.

: spi! ( c -- )
   [ #2 movlw, ]
   [ Tp a, movwf, ]
   [ begin, ]
     [ #8 movlw, ]
     [ Tp 1+ a, movwf, ]
     [ begin, ]
       [ Srw f, a, rlcf, ]
       [ cc, if, lata sdata a, bsf, else, lata sdata a, bcf, then, ]
       [ lata sclk a, btg, ]
       [ lata sclk a, btg, ]
     [ Tp 1+ f, a, decf,  ]
     [ z, until, ]
     [ Sminus w, a, movf, ]
   [ Tp f, a, decf,  ]
   [ z, until,  ]
;

Mike

Re: [Flashforth-devel] Assembler Loops

[Mikael N. <mik...@pp...>]

Here is example for bitbanging 16 bits on a spi interface.
It uses the FSR1L(=Tp) and FSR1H(=Tp 1 +)
temporary registers which are always free to be used in
any assembly word.

Note that FSR1H is only 4 bits wide. FSR1L is 8 bits wide.

Srw and Sminus words are accessing the parameter stack indirectly.

There are also other registers that can safely be used as variables in 
assembler words.
FSR2L FSR2H TBLPTRL TBLPTRH TABLAT PRODL PRODH
The registers are located in access ram so no bank bits need to be set.

: spi! ( u -- )
   [ #2 movlw, ]
   [ Tp a, movwf, ]
   [ begin, ]
     [ #8 movlw, ]
     [ Tp 1+ a, movwf, ]
     [ begin, ]
       [ Srw f, a, rlcf, ]
       [ cc, if, lata sdata a, bsf, else, lata sdata a, bcf, then, ]
       [ lata sclk a, btg, ]
       [ lata sclk a, btg, ]
     [ Tp 1+ f, a, decf,  ]
     [ z, until, ]
     [ Sminus w, a, movf, ]
   [ Tp f, a, decf,  ]
   [ z, until,  ]
;

Mike

Re: [Flashforth-devel] Assembler Loops

[Thomas B. <bus...@gm...>]

Dear Mikael,

thank you very much for helping. I test the program and it runs good, but
every 1 ms I get a error (like a delay). Please see at attachment.
Is that a watchdog?

Greetings Thomas

The files are here (Logic/Screenshot) ->
http://wikisend.com/download/584094/pwm_old.logicdata
http://wikisend.com/download/785422/Bildschirmfoto 2014-07-21 um
19.03.36.png



2014-07-11 16:46 GMT+02:00 Mikael Nordman <mik...@pp...>:

> Here is example for bitbanging 16 bits on a spi interface.
> It uses the FSR1L(=Tp) and FSR1H(=Tp 1 +)
> temporary registers which are always free to be used in
> any assembly word.
>
> Note that FSR1H is only 4 bits wide. FSR1L is 8 bits wide.
>
> Srw and Sminus words are accessing the parameter stack indirectly.
>
> There are also other registers that can safely be used as variables in
> assembler words.
> FSR2L FSR2H TBLPTRL TBLPTRH TABLAT PRODL PRODH
> The registers are located in access ram so no bank bits need to be set.
>
> : spi! ( u -- )
>    [ #2 movlw, ]
>    [ Tp a, movwf, ]
>    [ begin, ]
>      [ #8 movlw, ]
>      [ Tp 1+ a, movwf, ]
>      [ begin, ]
>        [ Srw f, a, rlcf, ]
>        [ cc, if, lata sdata a, bsf, else, lata sdata a, bcf, then, ]
>        [ lata sclk a, btg, ]
>        [ lata sclk a, btg, ]
>      [ Tp 1+ f, a, decf,  ]
>      [ z, until, ]
>      [ Sminus w, a, movf, ]
>    [ Tp f, a, decf,  ]
>    [ z, until,  ]
> ;
>
> Mike
>
>
>
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