flashforth-devel

[Flashforth-devel] FF 5.0 and dsPIC30F4012

[Pete Z. <pza...@pz...>]

Hi Mikael and all,

Testing is looking good here as far as FF 5.0 and the dsPIC30F4012 .
I have used both  MPLAB 8.92 and MPLAB X ver2.05 to assemble 
ff-pic24-30-33.s .

At first, I still had the WDT ON as I have had in FF 4.8 but now with 
WDT OFF, all is well and testing progresses.

  Configuration is:
                16-BIT 28P STARTER DEMO BOARD DM300027
                  with dsPIC30F4012                          bytes words
                         SFR          0x0000 to 0x07ff          2K
                         RAM         0x0800 to 0x0fff           2K
                         FLASH     0x1000 to 0xcfff          48K 16K
                         EEPROM 0xfc00 to 0xffff              1K
                         UART1 on Port F <RF3,RF2>
                         system clock -- 7.3728MHz xtal and 8xPLL
                         Fcy is 14745600 Hz

Anything specific you want me to focus on for this set up?

Pete

Re: [Flashforth-devel] FF 5.0 and dsPIC30F4012

[Mikael N. <mik...@pp...>]

Great that it works.

I cannot think of anything right now (to focus on). Bugs ? (There should 
not be any :-)

Maybe if you want to write something for the webpage.

I am trying to finalise the FF 5.0 and update the webpage and then I'll 
give it a rest for the summer.

BR Mikael

On 03/22/2014 11:04 PM, Pete Zawasky wrote:
> Hi Mikael and all,
>
> Testing is looking good here as far as FF 5.0 and the dsPIC30F4012 .
> I have used both  MPLAB 8.92 and MPLAB X ver2.05 to assemble
> ff-pic24-30-33.s .
>
> At first, I still had the WDT ON as I have had in FF 4.8 but now with
> WDT OFF, all is well and testing progresses.
>
>    Configuration is:
>                  16-BIT 28P STARTER DEMO BOARD DM300027
>                    with dsPIC30F4012                          bytes words
>                           SFR          0x0000 to 0x07ff          2K
>                           RAM         0x0800 to 0x0fff           2K
>                           FLASH     0x1000 to 0xcfff          48K 16K
>                           EEPROM 0xfc00 to 0xffff              1K
>                           UART1 on Port F <RF3,RF2>
>                           system clock -- 7.3728MHz xtal and 8xPLL
>                           Fcy is 14745600 Hz
>
> Anything specific you want me to focus on for this set up?
>
> Pete
>
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