There are a few modifications to FlashForth required to use the INTOSC and INTOSC-PLL Fosc configurations, as I've discovered trying to get it running in a PIC18F26K22.
First: The INTOSC needs to be configured as Primary Clock, PLL enabled and selected
config bits required:
> config FOSC = INTIO67 ;Internal oscillator block
> config PLLCFG = ON ;Oscillator multiplied by 4
> config PRICLKEN = ON ;Primary clock enabled
This is probably best done in the processor's .CFG file for consistancy with the package.
;
:!!!!!!!!!!!!!!!!
Second: OSCCON and OSCTUNE bits need to be set in the startup (main: in the ff18_usb.asm code)
I made these changes:
;
main:
movlw 0xf
iorwf ADCON1, F, A
clrf TBLPTRU, A
#ifdef USB_CDC
movlw 0x14
movwf UCFG, A
#endif
#ifdef OSCCON
#ifdef __18F26K22
movlw 0x70
movwf OSCCON,A
movlw 0x40 ;ena PLL
movwf OSCTUNE
#else
movlw 0x70 ; Use full internal OSC frequency
movwf OSCCON, A
#endif
#endif
;
:!!!!!!!!!!!!!!!!
Third problem was matching up the baudrate with higher clockrates
Added this sequence to p18f-main.cfg and cleaned up conflicts:
;
#define CONFIG_RESET 0x0000 ; No bootloader
constant clock = .64000000 ; Hz
constant baud = .38400
; Handle 8-bit BRG overflow condition...
;#define Use_BRG16 0
; to use higher Fosc, BRG16 needs to be activated...
#define Use_BRG16 1
#if (Use_BRG16)
constant spbrgval = ((clock/baud)/d'4') - 1
#else
constant spbrgval = ((clock/baud)/d'16') - 1
#endif
;
:!!!!!!!!!!!!!!!!
...This needs to be commented out if still present:
;;; Calculate the baud rate control value
; constant spbrgval = ((clock/baud)/d'16') - 1
;
:!!!!!!!!!!!!!!!!
... Then inserted this into the WARM: sequence in ff18_usb.asm
#if(Use_BRG16)
; Setup UART1 with high-speed 16-bit BaudRate Gen
; 18F26K22 Workaround: ANSELx FUMTU
movlw 0 ;load up pattern...
movff WREG,ANSELC ;...and BANG it in directly
; set Baudrate
movlw b'00001000' ;BRG16
movwf BAUDCON1,A
movlw (spbrgval%0x100)
movwf SPBRG1,A
movlw (spbrgval/0x100)
movwf SPBRGH1,A
; TX enable
movlw b'00100100' ;TXEN + BRGH + !SYNC
movwf TXSTA1, A
; RX enable !!!!!
movlw b'10010000' ;SPEN + CREN
movwf RCSTA1, A
bsf PIE1, RCIE, A
#else
movlw spbrgval
movwf SPBRG, A
; movlw 0
; movwf SPBRGH, A
; TX enable
movlw b'00100100' ;TXEN + BRGH
movwf TXSTA, A
; RX enable !!!!!
; 18F26K22 Workaround: This form Failed to change ANSELC Register...
; bcf ANSELH, ANS11, A ; Enable digital RB5 for RX
; movwf ANSELC,A ;DOESN'T WORK, EITHER!
movlw 0 ;load up pattern...
movff WREG,ANSELC ;...and BANG it in directly
; bsf TRISC,7,A ;appearently futile but not needed
movlw b'10010000' ;SPEN + CREN
movwf RCSTA, A
bsf PIE1, RCIE, A
#endif
;
:!!!!!!!!!!!!!!!!
Finally, the change that tripped me up the longest was the ms-timer config for IDLE MODE.
My TMR3 default T3CON was clocking from Pin Or Oscillator which wasn't available running INTOSC.
The sysrem clock source (Fosc) works with the least change, instruction clock is /4.
My change (immediately following above code):
#ifdef MS_TMR3
#ifdef OSCCON
movlw h'41' ; System Clock (Fosc)
#else
movlw h'81' ; prescale = 1
#endif
movwf T3CON, A
setf TMR3H, A
bsf PIE2,TMR3IE, A
#endif
;
:!!!!!!!!!!!!!!!!
Other chips and other config choices may require other mods (your milage may vary (grin)), but hopefully this can save someone else some of the frustrations I experienced.
Many thanks to Mike and Attila for the help, hearty exhortations, and sound advice.
Great Project! Long may it rave.
craig bair -- binary behaviorist
...not a speck of serial...
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