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Defining PAIVT for Curiosity Nano's PIC24FJ64GU205?

2024-05-23
2024-05-23
  • David C. Norris

    David C. Norris - 2024-05-23

    I'd like to build FF with AIVT enabled for this board, and wonder what (if any!) value would be appropriate forPAIVT in p24fj_ga_config.inc. Unlike AIVTDIS, PAIVT does not show up among the configuration bits in MPLAB IDE.

    Working with latest FF source git pull'ed this morning, I've set AIVTDIS = ON in configs.c:

    #elif defined(__PIC24FJ64GU205__)
    
    // PIC24FJ64GU205 Configuration Bit Settings
    
    // 'C' source line config statements
    
    // FSEC
    #pragma config BWRP = OFF               // Boot Segment Write-Protect bit (Boot Segment may be written)
    < etc... >
    Protect Level bits (No Protection (other than CWRP))
    #pragma config AIVTDIS = ON             // Alternate Interrupt Vector Table bit (Enabled AIVT)
    // #pragma config AIVTDIS = OFF            // Alternate Interrupt Vector Table bit (Disabled AIVT)
    

    but FF still builds without the words AIVT , IVT , INT/ which are defined in sections guarded by .ifdef PAIVT.

    I see that p24fk_config.inc has a section,

    ;;; Memory control defines
    .equ EEPROM_WRITE, 0x4004   ; Write one word automatic erase
    .equ FLASH_ERASE,  0x4058   ; Erase one row (64/96 bytes)
    .equ FLASH_WRITE,  0x4004   ; Write one row (64/96 bytes)
    .equ PAIVT,        0x100
    .equ FLASH_ROWSIZE,  0x0020 ; Row size, words
    .equ FLASH_ROWS,     0x0001 ; Rows
    .equ FBUFSIZE,       FLASH_ROWSIZE*FLASH_ROWS*2
    .equ FBUFMASK,       ~(FBUFSIZE-1)
    

    but the (corresponding?) section of p24fj_ga_config.inc warns "Do not modify":

    ;;; Flash memory commands. Do not modify.
    .equ FLASH_ERASE,    0x4003     ; Memory page erase
    .equ FLASH_WRITE,    0x4002     ; Memory row write
    .equ FLASH_WRITE_SINGLE, 0x4001 ; Memory double word write
    .equ FLASH_WRITE_DOUBLE, 0x4001 ; Memory double word write
    .equ FLASH_ROWSIZE,  0x0080 ; Row size, words
    .equ FLASH_ROWS,     0x0008 ; Rows
    .equ FBUFSIZE,       FLASH_ROWSIZE*FLASH_ROWS*2
    .equ FBUFMASK,       ~(FBUFSIZE-1)
    
     
  • Mikael Nordman

    Mikael Nordman - 2024-05-23

    David, on this chip the AIVT is only supported when a Boot Segment is implemented.
    FF does not implement the Boot Segment.

    So some redesign would be needed.

     
    👍
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