FForth kills itself on Boot in a PIC24FJ64GA705 (less than 64k Flash)

[Holger]

Hi, I've tried to get a PIC24FJ64GA705 working with FForth, but I've run into an issue: If I simulate the code it looks as if the PIC kills (at least) the boot block at 0x0000 in EEERASE: when called at
(line 5855) DP_COLD:
mlit handle(STARTV)+PFLASH
rcall FETCHPP
rcall FTURNKEY_A
rcall EEINIT // <-- here the sh*t hits the fan and erases the first program flash block

My uneducated guess is that it's because the some pointer which is responsible for the lower 16 bit isn't set correctly/at all and the routine erases block 0 by default. It might well be that the error only happens in "small" devices because once you have enough flash in the device page 1 starting at 0x10000 will be used for the EPROM simulation and the error isn't obvious any more.

FLASH_SIZE for the device is set to 0xAE00 according the device sheet in p24f_config.inc

Greetings

[Mikael Nordman]

Hi,
Could you attach your config file.
Which compiler version are you using ?

I get this error while compiling. Did you get it and resolve it ?
/opt/microchip/xc16/v1.35/bin/bin/../bin/elf-ld: Link Error: can't locate alternate vector table base address.

BR

[Mikael Nordman]

Processor config bits need to be defined with C pragmas with the latest compilers.
Had to add this file to the project to get it to compile. XC16 v1.50.

/*
 * File:   pragmaxc16.c
 * Author: mikael
 *
 * Created on April 17, 2020, 8:04 AM
 */
#include "xc.h"

#pragma config AIVTDIS = ON
#pragma config BSLIM = 0x1FFD

[Mikael Nordman]

After some checks I can see that the flash commands and block sizes are different for your chip than the default values.

[Holger]

Hi Mikael,

as the compiler I'm using the XC16 V1.36 (should be the current one). MBLAB X v5.35.
Here is the config part of the p24f_config.inc:

;; Check the configuration for your particular chip from the datasheet.
;; for configuration bits see config_registers.c as the old config directive is deprecated
.section __FSEC.sec, code
    .global __FSEC
__FSEC: .pword BWRP_OFF & BSS_DISABLED & BSEN_OFF & GWRP_OFF & GSS_DISABLED & CWRP_OFF & CSS_DISABLED & AIVTDIS_OFF
.section __FBSLIM.sec, code
    .global __FBSLIM
__FBSLIM: .pword BSLIM_BSLIM
 ;; BSLIM_BSLIM
.section __FOSCSEL.sec, code
    .global __FOSCSEL
__FOSCSEL: .pword FNOSC_PRI & PLLMODE_DISABLED & IESO_OFF
.section __FOSC.sec, code
    .global __FOSC
__FOSC: .pword POSCMD_XT & OSCIOFCN_OFF & SOSCSEL_ON & IOL1WAY_OFF & FCKSM_CSDCMD & PLLSS_PLL_PRI
.section __FWDT.sec, code
    .global __FWDT
__FWDT: .pword WDTPS_PS32768 & FWPSA_PR128 & FWDTEN_OFF & WINDIS_OFF & WDTCMX_LPRC
.section __FPOR.sec, code
    .global __FPOR
__FPOR: .pword BOREN_OFF & LPCFG_OFF & DNVPEN_DISABLE
.section __FICD.sec, code
    .global __FICD
__FICD: .pword ICS_PGD1 & JTAGEN_OFF
.section __FDEVOPT1.sec, code
    .global __FDEVOPT1
__FDEVOPT1: .pword ALTCMPI_DISABLE & TMPRPIN_OFF & ALTI2C1_ALTI2CDIS & SOSCHP_ON

This is the method Microchip recommends instead of the old "__config ..." one. At least that's what is written in the PIC24FJ64GA705.inc file.

EDIT: Yes, first I used a .c configuration file as well (see comment as leftover) but as I got weird error messages and the program memory dump kept showing all zeros at 0x0000 I looked into the .inc file and found the method I used now. Another problem with the .c file was that following the code on debug didn't seem to work but this might have been an issue with erasing the flash as well.

[Holger]

"I get this error while compiling. Did you get it and resolve it ?
/opt/microchip/xc16/v1.35/bin/bin/../bin/elf-ld: Link Error: can't locate alternate vector table base address."

Yes, I got this one as well, but don't ask me (anymore) how I removed it. I guess it was somehow by adding the configuration bit settings to the file but I can't remember.

Fact is that I use PICs (and FForth) for private projects, and not very often at that. So I've come to "expect" lots of changes in the development system between the projects, together with all kinds of "ok, so they added five more features to the IDE but somehow removed the one named 'working' in the process. So let's get back to start and fiddle a few days ..."

[Mikael Nordman]

The problem with the zeros seems to be due to the flash erase problem , not the config in C file.

I think that xc16 v1.50 did not allow any style of config in assembler code. Only pragmas in C
were allowed.

But then the flash handing seems to be like on the 24E series and the source file #ifdefs may
be needed to be changed also.

Anyway at least these params need new values for it to work.
I am not sure about these new values. Have not run it in sim.

.equ FLASH_ERASE, 0x4003 ; Erase one row (1024/1596/3072 bytes)
.equ FLASH_WRITE, 0x4002 ; Write one row (128/196/348 bytes)
.equ FLASH_WRITE_SINGLE, 0x4001;Memory word program
.equ FLASH_WRITE_DOUBLE, 0x4001 ; Memory double word write
.equ IBUFSIZEL, 0x0800
.equ IBUFSIZEH, 0x0400
.equ IBUFLEN1, 0x0100 ; Inner write loop
.equ IBUFLEN2, 0x0008 ; Outer write loop
.equ IBUFMASK, 0xf000

[Holger]

Ok, I tested it now:, but the problem persists. You can do so in the simulater if you want to (although I will happily continue to do so as well) by adding breakpoints at line 5859 and 5861 of ff-pic24-30-33.s. At line 5859 the

0x0000: goto __reset 

is still is there, but after the routine

rcall EEINIT

in line 5859 has been executed it's been wiped out.

And I upgraded to XC16 V1.50. The
~~~
.section __CONFIG_WORD.sec, code
.global __CONFIG_WORD
__CONFIG_WORD: .pword SETTING_A & SETTING_B
~~~
method of setting the configuration bits in the assembler .inc still works.