Equivalence Checker For Netlists download

Equivalence checking for two netlists of ORCAD schematic designs. Check out whether two netlists may generate the idendical PCB in later design stage, even if they are derived from different design procedures with different part-ref and siganl-name.

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License

GNU General Public License version 2.0 (GPLv2)

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Additional Project Details

Operating Systems

Windows

Languages

English

Intended Audience

Quality Engineers

User Interface

Command-line

Programming Language

Java

Related Categories

Java Electronic Design Automation (EDA) Software

Registered

2007-10-22

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