Atmel128 + Efsl + Proteus VSM

[Sergey Stepanenko]

Hello,

I'm sorry if this has been discussed or is well known - I have not found it.

My problem is that trying to compile an example supplied with efsl is not working in simulation in Proteus VSM.

The problem, as I have discovered is that simulated MCU is sending SS/CS signal along with every byte instead of lowering it for the whole command (that is for whole 6 bytes).

I have been trying to poke around with pullup resistors and without them and almost every combination except going deep into sources to find out what exactly happens in efsl on the low level.

Do I have to somehow setup atmega128 for SPI in addition or before the example given or are there any other thoughts on this? After trying several designs and debugs I'm a little bit tired to get into another cycle digging into efsl...

Thanks in advance!

p/s/ proteus sample design with pic processor does work so it is not all the proteus fault...

[rslu]

Hi,
I don't think that SS/CS is the problem. It is OK to deactivate it each byte. It sounds more like incorrect configuration of SPI port - check bit number 8/16, big/little endian, speed, trival programming mistakes like wrong data (both out and in).

[Sergey Stepanenko]

Hi,

Thanks for the tip, but the programm is simply the sample from the library. Nothing else.. Will be checking the speed and settings though.
I suppose that library does nothing to configure SPI properly? It is not written a word in the docs about the need for proper configuration - like it should work out of the box...