[Dso-cvs] FPGA/msim compile.tcl,1.14,1.15

[Gerald Z. <ri...@us...>]

Update of /cvsroot/dso/FPGA/msim
In directory sc8-pr-cvs1:/tmp/cvs-serv31242/FPGA/msim

Modified Files:
	compile.tcl 
Log Message:



Index: compile.tcl
===================================================================
RCS file: /cvsroot/dso/FPGA/msim/compile.tcl,v
retrieving revision 1.14
retrieving revision 1.15
diff -C2 -d -r1.14 -r1.15
*** compile.tcl	29 Apr 2003 14:28:03 -0000	1.14
--- compile.tcl	30 Apr 2003 11:26:27 -0000	1.15
***************
*** 32,35 ****
--- 32,36 ----
  vcom -work work ../src/Max_D_.vhd
  vcom -work work ../src/Min_D_.vhd
+ vcom -work work ../src/PP_Clk_.vhd
  
  # compile architectures
***************
*** 54,57 ****
--- 55,59 ----
  vcom -work work ../src/Min_D_rtl.vhd
  vcom -work work ../src/Max_D_rtl.vhd
+ vcom -work work ../src/PP_Clk_rtl.vhd
  vcom -93 -work work ../src/Datapath_struc.vhd