From: <bwi...@ke...> - 2012-06-27 17:07:34
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include/drm/i915_drm.h | 23 ++++++++++++++++++++++- intel/intel_bufmgr.h | 6 ++++++ intel/intel_bufmgr_gem.c | 32 +++++++++++++++++++++++++------- intel/intel_bufmgr_priv.h | 5 +++++ intel/intel_decode.c | 18 +++++++++++++++++- 5 files changed, 75 insertions(+), 9 deletions(-) New commits: commit ee2be4fa7ea8c220291bf122cf3cc9b467d9564d Author: Ben Widawsky <be...@bw...> Date: Sun May 27 16:10:51 2012 -0700 intel: add decoding of MI_SET_CONTEXT Signed-off-by: Ben Widawsky <be...@bw...> Reviewed-by: Kenneth Graunke <ke...@wh...> diff --git a/intel/intel_decode.c b/intel/intel_decode.c index 74dd530..fa94881 100644 --- a/intel/intel_decode.c +++ b/intel/intel_decode.c @@ -139,6 +139,22 @@ instr_out(struct drm_intel_decode *ctx, unsigned int index, } static int +decode_MI_SET_CONTEXT(struct drm_intel_decode *ctx) +{ + uint32_t data = ctx->data[1]; + if (ctx->gen > 7) + return 1; + + instr_out(ctx, 0, "MI_SET_CONTEXT\n"); + instr_out(ctx, 1, "gtt offset = 0x%x%s%s\n", + data & ~0xfff, + data & (1<<1)? ", Force Restore": "", + data & (1<<0)? ", Restore Inhibit": ""); + + return 2; +} + +static int decode_MI_WAIT_FOR_EVENT(struct drm_intel_decode *ctx) { const char *cc_wait; @@ -233,7 +249,7 @@ decode_mi(struct drm_intel_decode *ctx) { 0x00, 0, 1, 1, "MI_NOOP" }, { 0x11, 0x3f, 2, 2, "MI_OVERLAY_FLIP" }, { 0x07, 0, 1, 1, "MI_REPORT_HEAD" }, - { 0x18, 0x3f, 2, 2, "MI_SET_CONTEXT" }, + { 0x18, 0x3f, 2, 2, "MI_SET_CONTEXT", decode_MI_SET_CONTEXT }, { 0x20, 0x3f, 3, 4, "MI_STORE_DATA_IMM" }, { 0x21, 0x3f, 3, 4, "MI_STORE_DATA_INDEX" }, { 0x24, 0x3f, 3, 3, "MI_STORE_REGISTER_MEM" }, commit 3ed38714bd3792ccfc1089dd7bef84ab3dc9697d Author: Ben Widawsky <be...@bw...> Date: Sun Mar 18 18:28:28 2012 -0700 intel/context: new execbuf interface for contexts To support this we extract the common execbuf2 functionality to be called with, or without contexts. The context'd execbuf does not support some of the dri1 stuff. Signed-off-by: Ben Widawsky <be...@bw...> Reviewed-by: Kenneth Graunke <ke...@wh...> diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index fedffb5..9b3a483 100644 --- a/intel/intel_bufmgr.h +++ b/intel/intel_bufmgr.h @@ -187,6 +187,11 @@ int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total); int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr); int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns); +drm_intel_context *drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr); +void drm_intel_gem_context_destroy(drm_intel_context *ctx); +int drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx, + int used, unsigned int flags); + /* drm_intel_bufmgr_fake.c */ drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd, unsigned long low_offset, diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index e90f8bd..485308b 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -2187,9 +2187,9 @@ drm_intel_gem_bo_exec(drm_intel_bo *bo, int used, } static int -drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used, - drm_clip_rect_t *cliprects, int num_cliprects, int DR4, - unsigned int flags) +do_exec2(drm_intel_bo *bo, int used, drm_intel_context *ctx, + drm_clip_rect_t *cliprects, int num_cliprects, int DR4, + unsigned int flags) { drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr; struct drm_i915_gem_execbuffer2 execbuf; @@ -2231,7 +2231,10 @@ drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used, execbuf.DR1 = 0; execbuf.DR4 = DR4; execbuf.flags = flags; - execbuf.rsvd1 = 0; + if (ctx == NULL) + i915_execbuffer2_set_context_id(execbuf, 0); + else + i915_execbuffer2_set_context_id(execbuf, ctx->ctx_id); execbuf.rsvd2 = 0; aub_exec(bo, flags, used); @@ -2279,9 +2282,24 @@ drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used, drm_clip_rect_t *cliprects, int num_cliprects, int DR4) { - return drm_intel_gem_bo_mrb_exec2(bo, used, - cliprects, num_cliprects, DR4, - I915_EXEC_RENDER); + return do_exec2(bo, used, NULL, cliprects, num_cliprects, DR4, + I915_EXEC_RENDER); +} + +static int +drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used, + drm_clip_rect_t *cliprects, int num_cliprects, int DR4, + unsigned int flags) +{ + return do_exec2(bo, used, NULL, cliprects, num_cliprects, DR4, + flags); +} + +int +drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx, + int used, unsigned int flags) +{ + return do_exec2(bo, used, ctx, NULL, 0, 0, flags); } static int commit b3b123dfb1e81f254fb419d8eef6f63128e5b9c9 Author: Ben Widawsky <be...@bw...> Date: Fri Jan 13 11:31:31 2012 -0800 intel/context: Add drm_intel_context type Add an opaque type representing a HW context. Signed-off-by: Ben Widawsky <be...@bw...> Reviewed-by: Kenneth Graunke <ke...@wh...> diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index fa6c4dd..fedffb5 100644 --- a/intel/intel_bufmgr.h +++ b/intel/intel_bufmgr.h @@ -41,6 +41,7 @@ struct drm_clip_rect; typedef struct _drm_intel_bufmgr drm_intel_bufmgr; +typedef struct _drm_intel_context drm_intel_context; typedef struct _drm_intel_bo drm_intel_bo; struct _drm_intel_bo { diff --git a/intel/intel_bufmgr_priv.h b/intel/intel_bufmgr_priv.h index 0b62520..2592d42 100644 --- a/intel/intel_bufmgr_priv.h +++ b/intel/intel_bufmgr_priv.h @@ -280,6 +280,11 @@ struct _drm_intel_bufmgr { int debug; }; +struct _drm_intel_context { + unsigned int ctx_id; + struct _drm_intel_bufmgr *bufmgr; +}; + #define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1)) #define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y)) #define ROUND_UP_TO_MB(x) ROUND_UP_TO((x), 1024*1024) commit a5b2946889471f6075852949f90f660e43b68532 Author: Ben Widawsky <be...@bw...> Date: Wed Jun 27 09:52:42 2012 -0700 intel: updated header for contexts Signed-off-by: Ben Widawsky <be...@bw...> Reviewed-By: Kenneth Graunke <ke...@wh...> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index 4931107..5c8fabe 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -193,6 +193,8 @@ typedef struct _drm_i915_sarea { #define DRM_I915_GET_SPRITE_COLORKEY 0x2a #define DRM_I915_SET_SPRITE_COLORKEY 0x2b #define DRM_I915_GEM_WAIT 0x2c +#define DRM_I915_GEM_CONTEXT_CREATE 0x2d +#define DRM_I915_GEM_CONTEXT_DESTROY 0x2e #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) @@ -237,6 +239,8 @@ typedef struct _drm_i915_sarea { #define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) #define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) #define DRM_IOCTL_I915_GEM_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_WAIT, struct drm_i915_gem_wait) +#define DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct drm_i915_gem_context_create) +#define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy) /* Allow drivers to submit batchbuffers directly to hardware, relying * on the security mechanisms provided by hardware. @@ -651,13 +655,19 @@ struct drm_i915_gem_execbuffer2 { #define I915_EXEC_CONSTANTS_ABSOLUTE (1<<6) #define I915_EXEC_CONSTANTS_REL_SURFACE (2<<6) /* gen4/5 only */ __u64 flags; - __u64 rsvd1; + __u64 rsvd1; /* now used for context info */ __u64 rsvd2; }; /** Resets the SO write offset registers for transform feedback on gen7. */ #define I915_EXEC_GEN7_SOL_RESET (1<<8) +#define I915_EXEC_CONTEXT_ID_MASK (0xffffffff) +#define i915_execbuffer2_set_context_id(eb2, context) \ + (eb2).rsvd1 = context & I915_EXEC_CONTEXT_ID_MASK +#define i915_execbuffer2_get_context_id(eb2) \ + ((eb2).rsvd1 & I915_EXEC_CONTEXT_ID_MASK) + struct drm_i915_gem_pin { /** Handle of the buffer to be pinned. */ __u32 handle; @@ -889,4 +899,15 @@ struct drm_i915_gem_wait { __s64 timeout_ns; }; +struct drm_i915_gem_context_create { + /* output: id of new context*/ + __u32 ctx_id; + __u32 pad; +}; + +struct drm_i915_gem_context_destroy { + __u32 ctx_id; + __u32 pad; +}; + #endif /* _I915_DRM_H_ */ |