From: Leif D. <lde...@re...> - 2002-08-18 00:04:21
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On 17 Aug 2002, J. Christopher Pereira wrote: > On Sat, 2002-08-17 at 19:33, Leif Delgass wrote: > > On 17 Aug 2002, J. Christopher Pereira wrote: > > > > > On Sat, 2002-08-17 at 18:38, Leif Delgass wrote: > > > > > > > Thanks. OK, it looks like everything goes fine up until the kernel module > > > > initializtion, despite the BIOS problem. So the next thing is to turn on > > > > debugging in the kernel module. I wonder if you're having the same > > > > problem others are having there. Could you try this: > > > > > > > > Do a cold restart and then as root: > > > > > > > > % modprobe mach64 drm_opts=debug > > > > % cat /proc/kmsg > kmsg.txt > > > > > > > > then start X from another console. You just need to let X finish starting > > > > up and then you can log out and interrupt cat. Then if you could post the > > > > log in the same place you put your X log, that would be great. > > > > > > Here are is kmsg log: http://kripper.imatronix.cl/tmp/kmsg > > > > Thanks. Well, unfortunately, the part I was interested in didn't make it > > into the log. Sometimes stuff just gets lost. I was looking for "Before > > DMA Transfer" for the 3 registers. Could you try it again once or twice > > and see if that part shows up? > > I had more luck this time, here is the new log: > http://kripper.imatronix.cl/tmp/kmsg.2 > > This are the "before" registers: > > <7>[drm:mach64_bm_dma_test] mach64_bm_dma_test > <7>[drm:mach64_bm_dma_test] Allocating data memory ... > <7>[drm:mach64_bm_dma_test] (Before DMA Transfer) reg 0 = 0x02390004 > <7>[drm:mach64_bm_dma_test] (Before DMA Transfer) reg 1 = 0x02390004 > <7>[drm:mach64_bm_dma_test] (Before DMA Transfer) reg 2 = 0x02390004 Yup. This is what I figured, these should be all zeros, so the MMIO write to init. the registers fails. > > Anyway, I suspect that the init. of the registers fails, because the > > values are non-zero after the test. It looks like this is probably the > > same problem Dan and Scott are having, so you could just wait for the > > patch to try testing again. You all have the same family of chip (GTPro), > > so it could be that the problem is specific to that flavor of mach64. > > You are hacking on the mach64-0.0.5 branch, right? Right. I was planning on making a patch that tests MMIO writes to the scratch registers (block 0, non-FIFOed), the pattern registers (block 0, FIFO-ed), and some other block 1 registers. The vertex registers used in the test are aliased at two different locations, so I was also going to try using VERTEX_1_SECONDARY_[S,T,W] for the test just in case, since they are not aliased. However, I can't imagine that any of the mach64's with a setup engine are not register compatible which each other. Regarding the "Pseudo-DMA" mode, it won't work to enable it. It was broken by changes in the DMA code, and we haven't rewritten it yet. -- Leif Delgass http://www.retinalburn.net |