Re: [Dri-users] Memory problem

[Adam J. <aj...@nw...>]

On Wednesday 21 December 2005 00:50, Allan Eising wrote:
> Hello everybody,
>
> I have tested the driver today, and get no changes and still an indirict
> rendering. What, however, is interesting, is this:
>
> [4295539.058000] PCI: Unable to reserve mem region #1:8000000@e0000000 for
> device 0000:01:00.0

While I don't have anything helpful to say about that message...

> If you take a look at /proc/mtrr, it shows up like this:
> reg00: base=3D0x00000000 (   0MB), size=3D  16MB: write-back, count=3D1
> reg01: base=3D0x01000000 (  16MB), size=3D  16MB: write-back, count=3D1
> reg02: base=3D0x02000000 (  32MB), size=3D  32MB: write-back, count=3D1
> reg03: base=3D0x04000000 (  64MB), size=3D  64MB: write-back, count=3D1
> reg04: base=3D0x08000000 ( 128MB), size=3D 128MB: write-back, count=3D1
> reg05: base=3D0x10000000 ( 256MB), size=3D 256MB: write-back, count=3D1
> reg06: base=3D0x20000000 ( 512MB), size=3D 512MB: write-back, count=3D1
> reg07: base=3D0xe0000000 (3584MB), size=3D  64MB: write-combining, count=
=3D2
>
> Indicating that a whole lot of memory is already used up, thus giving the
> driver problems assigning the correct ammount memory for acceleration.
> This was exactly the same error that I had with the commercial ati
> driver...

I'd like to clear up this misconception.

MTRR's don't "assign" memory.  They set the caching policy on memory ranges=
,=20
but they are not required for correct DRI function.  It is expected that on=
ce=20
PAT support is in-kernel and usable, that we'll use that instead of MTRRs.

Your MTRR setup is a bit strange though, ranges 0 through 6 could all be=20
covered by a single 1G range.

=2D ajax