From: Alex D. <ag...@ya...> - 2003-12-08 16:21:42
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there is a new option in xfree86 cvs that lets you adjust the minimum clock. it's not available yet in dri cvs. I'd imagine it will be merged in after 4.4 is released and the xfree86 trunk is merged into the dri again. Alex --- Chris Danford <cdanford@u.washington.edu> wrote: > Hello. > > I'm trying to use a Radeon 7500 QW to drive a 15.72KHz arcade monitor > with the following modeline: > > Modeline "640x240" 12.58 640 664 760 800 240 246 252 262 -Hsync > -Vsync > > I'm pretty sure I can get a stable image at this pixel clock, because > it > works with PowerStrip and AdvanceMame on Windows with the same > timings. > In my Xfree86 log though, this mode is rejected with the error "bad > pixel clock/interlace/doublescan". The log also says: > > (--) RADEON(0): Chipset: "ATI Radeon 7500 QW (AGP)" (ChipID = 0x5157) > (II) RADEON(0): PLL parameters: rf=2700 rd=12 min=20000 max=35000; > xclk=23000 > (II) RADEON(0): Clock range: 20.00 to 350.00 MHz > > Is there a way to override the PLL params received from the BIOS so > that > I can use lower pixelclock values? > > Thanks for any suggestions! > -Chris > > > P.S. I'm seeing logs from other Radeon 7500 QW users that show > different PLL params and lower min pixelclocks. Is this expected? > For > example, > > http://216.239.57.104/search?q=cache:4iTueKanrv4J:gatos.sourceforge.net/ > livid-ati/2001-August/msg00078.html+radeon+%22clock+range%22 > <http://216.239.57.104/search?q=cache:4iTueKanrv4J:gatos.sourceforge.net > /livid-ati/2001-August/msg00078.html+radeon+%22clock+range%22&hl=en&ie=U > TF-8> &hl=en&ie=UTF-8 > (--) RADEON(0): Chipset: "ATI Radeon 7500 QW (AGP)" (ChipID = 0x5157) > (II) RADEON(0): PLL parameters: rf=2700 rd=12 min=12000 max=40000 > xclk=23000 > (II) RADEON(0): Clock range: 12.00 to 400.00 MHz > > > > > > > __________________________________ Do you Yahoo!? New Yahoo! Photos - easier uploading and sharing. http://photos.yahoo.com/ |