Hi,
This code should trigger 10.3:
uint16_t x_u16, y_u16; int16_t z_s16; x_u16 = 100; y_u16 = 200; z_s16 = x_u16 * y_u16;
I modified the misra.py so it also takes into account when assigning a signed to an unsigned and the nr of bits is smaller or equal. Snippet from def misra_10_3(self, cfg):
for tok in cfg.tokenlist: if tok.isAssignmentOp: lhs = getEssentialType(tok.astOperand1) rhs = getEssentialType(tok.astOperand2) #print(lhs) #print(rhs) if lhs is None or rhs is None: continue lhs_category = get_category(lhs) rhs_category = get_category(rhs) lhs_bits = bitsOfEssentialType(lhs) rhs_bits = bitsOfEssentialType(rhs) if lhs_category and rhs_category and lhs_category != rhs_category and rhs_category not in ('signed','unsigned'): self.reportError(tok, 10, 3) if lhs_category == 'signed' and rhs_category == 'unsigned' and lhs_bits <= rhs_bits: self.reportError(tok, 10, 3) if lhs_bits < rhs_bits: self.reportError(tok, 10, 3)
Now it triggers. Can you confirm if this is the correct approach?
Regards, Emiel
I've also had to add this to the getEssentialType function so it would work for structs:
elif expr.str == ".": e1 = getEssentialType(expr.astOperand2) return e1
Your best bet would be to open a PR...
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Hi,
This code should trigger 10.3:
I modified the misra.py so it also takes into account when assigning a signed to an unsigned and the nr of bits is smaller or equal. Snippet from def misra_10_3(self, cfg):
Now it triggers. Can you confirm if this is the correct approach?
Regards,
Emiel
I've also had to add this to the getEssentialType function so it would work for structs:
Your best bet would be to open a PR...