[Contiki-developers] CC2538 MAC Timer configuration

[Giulia C. <gco...@gr...>]

Hi,

I am using CC2538 with the SmartRF06 Evaluation Board to carry a project
using the Contiki OS.

At the moment I need to get the Start of Frame Delimiter value when the
platform receive a beacon. The problem is that the value that I read is
very big, despite it's read very early (values in the rank of b28f2d, when
meausring the real time i get values of  481c1). Could anyone help me in
understanding how to understand this values or where I have failed with the
configuration?

I  have done it following the instructions written in the User's Guide
section "12.1.10 Capture Input". The function called to read the sfd is
written below:
unsigned char s;
rtimer_clock_t sfd;
HAL_ENTER_CRITICAL_SECTION(s);
REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) &
~RFCORE_SFR_MTMSEL_MTMSEL) | 0x00000001;
sfd = REG(RFCORE_SFR_MTM0) & RFCORE_SFR_MTM0_MTM0;
sfd |= ((REG(RFCORE_SFR_MTM1) & RFCORE_SFR_MTM1_MTM1) << 8);
REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) &
~RFCORE_SFR_MTMSEL_MTMOVFSEL)|0x00000010;
sfd |= ((REG(RFCORE_SFR_MTMOVF0) & RFCORE_SFR_MTMOVF0_MTMOVF0) << 16);
sfd |= ((REG(RFCORE_SFR_MTMOVF1) & RFCORE_SFR_MTMOVF1_MTMOVF1) << 24);
// sfd |= ((REG(RFCORE_SFR_MTMOVF2) & RFCORE_SFR_MTMOVF2_MTMOVF2) << 32);
HAL_EXIT_CRITICAL_SECTION(s);

Where:

#define HAL_ENTER_CRITICAL_SECTION(x)  \
  do { (x) = !cpu_cpsid(); } while (0)
#define HAL_EXIT_CRITICAL_SECTION(x) \
  do { if (x) { cpu_cpsie();} } while (0)

and the functions cpu_cpsid() and cpu_cpsie() respectively disable and
enable all the interrupts.

The initial configurations that I do are the following:
static int init(void) {
  unsigned char s;

...........


  REG(SYS_CTRL_I_MAP) &= ~0x00000001;    //Select regular interrupt map
  nvic_init();
  sys_ctrl_init();


...........

  /*Set the PREAMBLE_LENGTH bit of the MDMCTRL0 register */
  REG(RFCORE_XREG_MDMCTRL0) =   (REG(RFCORE_XREG_MDMCTRL0) & ~
RFCORE_XREG_MDMCTRL0_PREAMBLE_LENGTH) |
RFCORE_XREG_MDMCTRL0_PREAMBLE_LENGTH;
  /*After frame reception, there is by default an interval of 192 μs where
   * SFD detection is disabled.
   * This interval can be removed by clearing the RX2RX_TIME_OFF bit
   * of the FSMCTRL register.
   */
  REG(RFCORE_XREG_FSMCTRL) &= ~ RFCORE_XREG_FSMCTRL_RX2RX_TIME_OFF;

............

  /* Enable MAC Timer*/
  CC2538 <http://www.ti.com/product/CC2538>_MAC_RADIO_TIMER_WAKE_UP();
  REG(RFCORE_SFR_MTCTRL) |=
(RFCORE_SFR_MTCTRL_LATCH_MODE|RFCORE_SFR_MTCTRL_SYNC);
  nvic_interrupt_enable(NVIC_INT_MACTIMER);
  set_poll_mode(0);
  process_start(&cc2538 <http://www.ti.com/product/cc2538>_rf_process,
NULL);
  rf_flags |= RF_ON;
  ENERGEST_ON(ENERGEST_TYPE_LISTEN);
  return 1;
}


Here i start and configure the MAC Timer to be synchronized with the 32KHz
clock:
#define CC2538 <http://www.ti.com/product/CC2538>_MAC_RADIO_TIMER_WAKE_UP()
do { \
            HAL_CLOCK_STABLE(); \
            REG(RFCORE_SFR_MTCTRL) |= RFCORE_SFR_MTCTRL_RUN; \
            REG(RFCORE_SFR_MTCTRL) |= RFCORE_SFR_MTCTRL_SYNC; \
            while(!(RFCORE_SFR_MTCTRL & RFCORE_SFR_MTCTRL_STATE));\
} while(0)
#define HAL_CLOCK_STABLE()    do { \
    while ( !((SYS_CTRL_CLOCK_STA) & (SYS_CTRL_CLOCK_STA_XOSC_STB)));\
} while(0)


And the   sys_ctrl_init(); function sets the osillators frequencies:
void sys_ctrl_init() {
uint32_t val;
#if SYS_CTRL_OSC32K_USE_XTAL
  /* Set the XOSC32K_Q pads to analog for crystal */
  GPIO_SOFTWARE_CONTROL(GPIO_PORT_TO_BASE(GPIO_D_NUM), GPIO_PIN_MASK(6));
  GPIO_SET_INPUT(GPIO_PORT_TO_BASE(GPIO_D_NUM), GPIO_PIN_MASK(6));
  ioc_set_over(GPIO_D_NUM, 6, IOC_OVERRIDE_ANA);
  GPIO_SOFTWARE_CONTROL(GPIO_PORT_TO_BASE(GPIO_D_NUM), GPIO_PIN_MASK(7));
  GPIO_SET_INPUT(GPIO_PORT_TO_BASE(GPIO_D_NUM), GPIO_PIN_MASK(7));
  ioc_set_over(GPIO_D_NUM, 7, IOC_OVERRIDE_ANA);
#endif
  /*
   * Desired Clock Ctrl configuration:
   * 32KHz source: RC or crystal, according to SYS_CTRL_OSC32K_USE_XTAL
   * System Clock: 32 MHz
   * Power Down Unused
   * I/O Div: according to SYS_CTRL_IO_DIV
   * Sys Div: according to SYS_CTRL_SYS_DIV
   * Rest: Don't care
   */
  val = SYS_CTRL_OSCS | SYS_CTRL_CLOCK_CTRL_OSC_PD
    | SYS_CTRL_IO_DIV | SYS_CTRL_SYS_DIV;
  REG(SYS_CTRL_CLOCK_CTRL) = val;
  while((REG(SYS_CTRL_CLOCK_STA)
        & (SYS_CTRL_CLOCK_STA_OSC32K | SYS_CTRL_CLOCK_STA_OSC))
        != SYS_CTRL_OSCS);
#if SYS_CTRL_OSC32K_USE_XTAL
  /* Wait for the 32-kHz crystal oscillator to stabilize */
  while(REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_SYNC_32K);
  while(!(REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_SYNC_32K));
#endif
}

I know that this could be long, but I would be very pleased if someone
could help me! I hope I've given enough information.
Thank you!
Giulia