The project I'm working is reimplementing parts of the sphinx front end in
VHDL to get some speed improvements and off load the CPU. Is there any design
documentation about the FFT algorithm? We are having a hard time understanding
the "whys and hows" of the code in fe_sigproc.
Specifically what is going on in the section labeled "Bit-reverse the input"?
It certainly doesn't seem like it is bit-reversing anything... it looks like
it is moving samples to various places in the 512 sized array (fe->frame).
Any info on this stuff? Anyone ever implemented this in VHDL?
M
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You can find the description of the algorithm including the notion of "bit-
reversal" in the textbook. Wikipedia page also have
some information on that.
Hi -
The project I'm working is reimplementing parts of the sphinx front end in
VHDL to get some speed improvements and off load the CPU. Is there any design
documentation about the FFT algorithm? We are having a hard time understanding
the "whys and hows" of the code in fe_sigproc.
Specifically what is going on in the section labeled "Bit-reverse the input"?
It certainly doesn't seem like it is bit-reversing anything... it looks like
it is moving samples to various places in the 512 sized array (fe->frame).
Any info on this stuff? Anyone ever implemented this in VHDL?
M
You can find the description of the algorithm including the notion of "bit-
reversal" in the textbook. Wikipedia page also have
some information on that.
http://en.wikipedia.org/wiki/Cooley%E2%80%93Tukey_FFT_algorithm
That's just a commonly accepted term. It's meant to reverse bits in a whole
raw, not in a single byte.
Many students do that as an excersize. You can easily find implementations in
google.
http://opencores.org/websvn,listing?repname=pipelined_fft_256&path=%2Fpipelin
ed_fft_256%2F
As far as VHDL goes, what about portions of the sphinx front end? Anyone do a
port of the code to VHDL from the C implementation?
M