For I2C addresses in the format of "11110XX" (reserved address/header for 10-bit addresses by I2C specification) the STM32 hardware automatically switches to 10-bit addressing mode. The triggered event/interrupt (EV9) is not handled by the driver and is therefore triggered by the hardware in an infinite loop.
The attached patch adds support for 10-bit addresses to the STM32 I2C driver.
Sorry, there was a small error in the patch. Here comes v2.
Fixed in repository, will be fixed in 2.6.2stable, 2.7.0unstable and 3.0.0development.
Thanks for applying the patch. Unfortunally it was the first version, not the revised one (0001-STM32-I2C-10-bit-addressing-mode2.patch). This included a small error:
dp->DR = 0xF0 | (0x1 & i2cp->addr) | (0x3 & (i2cp->addr >> 9));
must be replaced with
dp->DR = 0xF0 | (0x1 & i2cp->addr) | (0x6 & (i2cp->addr >> 8));
Because the last bit is the R/W bit.
Thinking about this it probably would be better to change the order of the respective assignment to
dp->DR = 0xF0 | (0x6 & (i2cp->addr >> 8)) | (0x1 & i2cp->addr);
Hi,
Fix applied, thanks for finding.
Giovanni