Note to selves:
Implementing this would be as simple as duplicating the entire "other" circuit file into our logic core for each instance of the sub-circuit. (It needs to be duplicated since the internal components can hold states.)
The GUI then has to manage this an NOT save the components to the file.
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We could implement an algorithm, that tests the outputs from all possible combinations of inputs and creates a component(chip) from that information.
However...
This might be impractical for large subcircuits and might not work if the sub-circuits contained time-variable information such as the variable rate square wave clock.
However...
The algorithm would have to be changed to check for time-variable information and then see which outputs change and how they change over time. It may be able to create a component from that.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
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How would these work? As a new component which implements the inputs and outputs from another circuit file?
We did actually think about adding these in the original design spec, but the complexity was too much for the initial version.
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> As a new component which implements the inputs and
outputs from another circuit file?
exactly
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user_id=1312775
Originator: NO
Note to selves:
Implementing this would be as simple as duplicating the entire "other" circuit file into our logic core for each instance of the sub-circuit. (It needs to be duplicated since the internal components can hold states.)
The GUI then has to manage this an NOT save the components to the file.
Logged In: NO
We could implement an algorithm, that tests the outputs from all possible combinations of inputs and creates a component(chip) from that information.
However...
This might be impractical for large subcircuits and might not work if the sub-circuits contained time-variable information such as the variable rate square wave clock.
However...
The algorithm would have to be changed to check for time-variable information and then see which outputs change and how they change over time. It may be able to create a component from that.
Agreed, I would love subcircuits
This has been picked up here: https://github.com/CedarvilleCS/CedarLogic/issues/11