Dear developers,
A compile error occurs when building BRL-CAD 7.30.2. The build/host system is a cyrus+ board - a PPC64 system based on Freescale e5500 cores. The OS is a Debian Bullseye derivative distribution. The cyrus+ system is currently distributed and available; please consider issuing a fix. The error is copied below:
[ 35%] Built target gdal_gnm_obj
Scanning dependencies of target gdal
[ 35%] Linking CXX shared library ../../../lib/libgdal.so
[ 35%] Built target gdal
[ 36%] Built target libwdb-obj
[ 36%] Building C object src/libbu/CMakeFiles/libbu-obj.dir/bitv.c.o
/media/fienix/home/casey/Sources/Working/brlcad-7.30.2/src/libbu/bitv.c: In function ‘bu_bitv_vls’:
/media/fienix/home/casey/Sources/Working/brlcad-7.30.2/src/libbu/bitv.c:197:22: error: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 3 has type ‘size_t’ {aka ‘unsigned int’} [-Werror=format=]
197 | bu_vls_printf(v, "%lu", i);
| ~~^ ~
| | |
| | size_t {aka unsigned int}
| long unsigned int
| %u
cc1: all warnings being treated as errors
make[2]: *** [src/libbu/CMakeFiles/libbu-obj.dir/build.make:154: src/libbu/CMakeFiles/libbu-obj.dir/bitv.c.o] Error 1
make[1]: *** [CMakeFiles/Makefile2:16415: src/libbu/CMakeFiles/libbu-obj.dir/all] Error 2
make: *** [Makefile:163: all] Error 2
Thank you for your consideration.