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[Bochs-cvs] CVS: bochs/cpu shift16.cc, 1.49, 1.50 shift32.cc, 1.48, 1.49 shift64.cc, 1.39, 1.40 shift8.cc, 1.40, 1.41 sse_pfp.cc, 1.57, 1.58 vmx.cc, 1.22, 1.23
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From: Stanislav S. <ssh...@us...> - 2009-06-20 20:39:55
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Update of /cvsroot/bochs/bochs/cpu In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv31257/d Modified Files: shift16.cc shift32.cc shift64.cc shift8.cc sse_pfp.cc vmx.cc Log Message: bugfixes, comment fixes, compilation fix in VMX Index: shift16.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/shift16.cc,v retrieving revision 1.49 retrieving revision 1.50 diff -u -d -r1.49 -r1.50 --- shift16.cc 20 Jun 2009 09:10:48 -0000 1.49 +++ shift16.cc 20 Jun 2009 20:39:51 -0000 1.50 @@ -69,7 +69,7 @@ write_RMW_virtual_word(result_16); - SET_FLAGS_OSZAPC_LOGIC_16(result_16); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_16(result_16); cf = (temp_32 >> (32 - count)) & 0x1; of = cf ^ (result_16 >> 15); // of = cf ^ result15 @@ -111,7 +111,7 @@ BX_WRITE_16BIT_REG(i->rm(), result_16); - SET_FLAGS_OSZAPC_LOGIC_16(result_16); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_16(result_16); cf = (temp_32 >> (32 - count)) & 0x1; of = cf ^ (result_16 >> 15); // of = cf ^ result15 @@ -156,7 +156,7 @@ write_RMW_virtual_word(result_16); - SET_FLAGS_OSZAPC_LOGIC_16(result_16); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_16(result_16); cf = (op1_16 >> (count - 1)) & 0x1; of = (((result_16 << 1) ^ result_16) >> 15) & 0x1; // of = result14 ^ result15 @@ -197,7 +197,7 @@ BX_WRITE_16BIT_REG(i->rm(), result_16); - SET_FLAGS_OSZAPC_LOGIC_16(result_16); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_16(result_16); cf = (op1_16 >> (count - 1)) & 0x1; of = (((result_16 << 1) ^ result_16) >> 15) & 0x1; // of = result14 ^ result15 @@ -434,7 +434,7 @@ write_RMW_virtual_word(result_16); } - SET_FLAGS_OSZAPC_LOGIC_16(result_16); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_16(result_16); SET_FLAGS_OxxxxC(of, cf); } @@ -478,7 +478,7 @@ // of == 0 if count >= 2 of = ((result_16 << 1) ^ result_16) >> 15; - SET_FLAGS_OSZAPC_LOGIC_16(result_16); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_16(result_16); SET_FLAGS_OxxxxC(of, cf); } @@ -527,7 +527,7 @@ cf = (result_16 & 0x1); } - SET_FLAGS_OSZAPC_LOGIC_16(result_16); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_16(result_16); /* signed overflow cannot happen in SAR instruction */ SET_FLAGS_OxxxxC(0, cf); Index: shift32.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/shift32.cc,v retrieving revision 1.48 retrieving revision 1.49 diff -u -d -r1.48 -r1.49 --- shift32.cc 16 Jan 2009 18:18:58 -0000 1.48 +++ shift32.cc 20 Jun 2009 20:39:51 -0000 1.49 @@ -55,7 +55,7 @@ write_RMW_virtual_dword(result_32); - SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_32(result_32); cf = (op1_32 >> (32 - count)) & 0x1; of = cf ^ (result_32 >> 31); // of = cf ^ result31 @@ -83,7 +83,7 @@ BX_WRITE_32BIT_REGZ(i->rm(), result_32); - SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_32(result_32); cf = (op1_32 >> (32 - count)) & 0x1; of = cf ^ (result_32 >> 31); // of = cf ^ result31 @@ -115,7 +115,7 @@ write_RMW_virtual_dword(result_32); - SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_32(result_32); cf = (op1_32 >> (count - 1)) & 0x1; of = ((result_32 << 1) ^ result_32) >> 31; // of = result30 ^ result31 @@ -143,7 +143,7 @@ BX_WRITE_32BIT_REGZ(i->rm(), result_32); - SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_32(result_32); cf = (op1_32 >> (count - 1)) & 0x1; of = ((result_32 << 1) ^ result_32) >> 31; // of = result30 ^ result31 @@ -411,7 +411,7 @@ cf = (op1_32 >> (32 - count)) & 0x1; of = cf ^ (result_32 >> 31); - SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_32(result_32); SET_FLAGS_OxxxxC(of, cf); } @@ -438,7 +438,7 @@ BX_WRITE_32BIT_REGZ(i->rm(), result_32); - SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_32(result_32); SET_FLAGS_OxxxxC(of, cf); } @@ -470,7 +470,7 @@ // of == 0 if count >= 2 of = ((result_32 << 1) ^ result_32) >> 31; - SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_32(result_32); SET_FLAGS_OxxxxC(of, cf); } @@ -497,7 +497,7 @@ // of == 0 if count >= 2 of = ((result_32 << 1) ^ result_32) >> 31; - SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_32(result_32); SET_FLAGS_OxxxxC(of, cf); } @@ -529,7 +529,7 @@ write_RMW_virtual_dword(result_32); - SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_32(result_32); set_CF((op1_32 >> (count - 1)) & 1); clear_OF(); /* signed overflow cannot happen in SAR instruction */ } @@ -559,7 +559,7 @@ BX_WRITE_32BIT_REGZ(i->rm(), result_32); - SET_FLAGS_OSZAPC_LOGIC_32(result_32); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_32(result_32); set_CF((op1_32 >> (count - 1)) & 1); clear_OF(); /* signed overflow cannot happen in SAR instruction */ } Index: shift64.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/shift64.cc,v retrieving revision 1.39 retrieving revision 1.40 diff -u -d -r1.39 -r1.40 --- shift64.cc 16 Jan 2009 18:18:58 -0000 1.39 +++ shift64.cc 20 Jun 2009 20:39:51 -0000 1.40 @@ -57,7 +57,7 @@ write_RMW_virtual_qword(result_64); - SET_FLAGS_OSZAPC_LOGIC_64(result_64); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_64(result_64); cf = (op1_64 >> (64 - count)) & 0x1; of = cf ^ (result_64 >> 63); // of = cf ^ result63 @@ -85,7 +85,7 @@ BX_WRITE_64BIT_REG(i->rm(), result_64); - SET_FLAGS_OSZAPC_LOGIC_64(result_64); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_64(result_64); cf = (op1_64 >> (64 - count)) & 0x1; of = cf ^ (result_64 >> 63); // of = cf ^ result63 @@ -117,7 +117,7 @@ write_RMW_virtual_qword(result_64); - SET_FLAGS_OSZAPC_LOGIC_64(result_64); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_64(result_64); cf = (op1_64 >> (count - 1)) & 0x1; of = ((result_64 << 1) ^ result_64) >> 63; // of = result62 ^ result63 @@ -145,7 +145,7 @@ BX_WRITE_64BIT_REG(i->rm(), result_64); - SET_FLAGS_OSZAPC_LOGIC_64(result_64); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_64(result_64); cf = (op1_64 >> (count - 1)) & 0x1; of = ((result_64 << 1) ^ result_64) >> 63; // of = result62 ^ result63 @@ -414,7 +414,7 @@ write_RMW_virtual_qword(result_64); - SET_FLAGS_OSZAPC_LOGIC_64(result_64); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_64(result_64); SET_FLAGS_OxxxxC(of, cf); } @@ -439,7 +439,7 @@ cf = (op1_64 >> (64 - count)) & 0x1; of = cf ^ (result_64 >> 63); - SET_FLAGS_OSZAPC_LOGIC_64(result_64); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_64(result_64); SET_FLAGS_OxxxxC(of, cf); } @@ -471,7 +471,7 @@ // of == 0 if count >= 2 of = ((result_64 << 1) ^ result_64) >> 63; - SET_FLAGS_OSZAPC_LOGIC_64(result_64); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_64(result_64); SET_FLAGS_OxxxxC(of, cf); } @@ -498,7 +498,7 @@ // of == 0 if count >= 2 of = ((result_64 << 1) ^ result_64) >> 63; - SET_FLAGS_OSZAPC_LOGIC_64(result_64); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_64(result_64); SET_FLAGS_OxxxxC(of, cf); } @@ -530,7 +530,7 @@ write_RMW_virtual_qword(result_64); - SET_FLAGS_OSZAPC_LOGIC_64(result_64); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_64(result_64); set_CF((op1_64 >> (count - 1)) & 1); clear_OF(); /* signed overflow cannot happen in SAR instruction */ } @@ -560,7 +560,7 @@ BX_WRITE_64BIT_REG(i->rm(), result_64); - SET_FLAGS_OSZAPC_LOGIC_64(result_64); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_64(result_64); set_CF((op1_64 >> (count - 1)) & 1); clear_OF(); /* signed overflow cannot happen in SAR instruction */ } Index: shift8.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/shift8.cc,v retrieving revision 1.40 retrieving revision 1.41 diff -u -d -r1.40 -r1.41 --- shift8.cc 20 Jun 2009 09:10:48 -0000 1.40 +++ shift8.cc 20 Jun 2009 20:39:51 -0000 1.41 @@ -264,7 +264,7 @@ write_RMW_virtual_byte(result_8); } - SET_FLAGS_OSZAPC_LOGIC_8(result_8); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_8(result_8); SET_FLAGS_OxxxxC(of, cf); } @@ -306,9 +306,9 @@ cf = (op1_8 >> (count - 1)) & 0x1; // note, that of == result7 if count == 1 and // of == 0 if count >= 2 - of = ((result_8 << 1) ^ result_8) >> 7; + of = (((result_8 << 1) ^ result_8) >> 7) & 0x1; - SET_FLAGS_OSZAPC_LOGIC_8(result_8); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_8(result_8); SET_FLAGS_OxxxxC(of, cf); } @@ -357,7 +357,7 @@ cf = (result_8 & 0x1); } - SET_FLAGS_OSZAPC_LOGIC_8(result_8); /* handle SF, ZF and AF flags */ + SET_FLAGS_OSZAPC_LOGIC_8(result_8); /* signed overflow cannot happen in SAR instruction */ SET_FLAGS_OxxxxC(0, cf); Index: sse_pfp.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/sse_pfp.cc,v retrieving revision 1.57 retrieving revision 1.58 diff -u -d -r1.57 -r1.58 --- sse_pfp.cc 5 Jun 2009 17:48:55 -0000 1.57 +++ sse_pfp.cc 20 Jun 2009 20:39:51 -0000 1.58 @@ -32,7 +32,7 @@ void BX_CPU_C::check_exceptionsSSE(int exceptions_flags) { - exceptions_flags &= 0x3F; + exceptions_flags &= MXCSR_EXCEPTIONS; int unmasked = ~(MXCSR.get_exceptions_masks()) & exceptions_flags; MXCSR.set_exceptions(exceptions_flags); Index: vmx.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/vmx.cc,v retrieving revision 1.22 retrieving revision 1.23 diff -u -d -r1.22 -r1.23 --- vmx.cc 15 Jun 2009 15:10:05 -0000 1.22 +++ vmx.cc 20 Jun 2009 20:39:51 -0000 1.23 @@ -1306,7 +1306,9 @@ #endif invalidate_prefetch_q(); +#if BX_SUPPORT_ALIGNMENT_CHECK handleAlignmentCheck(); +#endif handleCpuModeChange(); return VMXERR_NO_ERROR; @@ -1653,7 +1655,9 @@ #endif invalidate_prefetch_q(); +#if BX_SUPPORT_ALIGNMENT_CHECK handleAlignmentCheck(); +#endif handleCpuModeChange(); } |