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[Bochs-cvs] CVS: bochs/cpu ctrl_xfer16.cc,1.29,1.30 ctrl_xfer32.cc,1.41,1.42 ctrl_xfer64.cc,1.35,1.36 ctrl_xfer_pro.cc,1.42,1.43 segment_ctrl_pro.cc,1.39,1.40 stack_pro.cc,1.22,1.23
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From: Stanislav S. <ssh...@us...> - 2005-07-20 02:09:39
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Update of /cvsroot/bochs/bochs/cpu In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv14345/cpu Modified Files: ctrl_xfer16.cc ctrl_xfer32.cc ctrl_xfer64.cc ctrl_xfer_pro.cc segment_ctrl_pro.cc stack_pro.cc Log Message: Initial implementation of RETF64 Index: ctrl_xfer16.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/ctrl_xfer16.cc,v retrieving revision 1.29 retrieving revision 1.30 diff -u -d -r1.29 -r1.30 --- ctrl_xfer16.cc 20 Mar 2005 18:01:01 -0000 1.29 +++ ctrl_xfer16.cc 20 Jul 2005 01:26:44 -0000 1.30 @@ -292,11 +292,8 @@ case 0x0B: /* JNP */ condition = !get_PF(); break; case 0x0C: /* JL */ condition = getB_SF() != getB_OF(); break; case 0x0D: /* JNL */ condition = getB_SF() == getB_OF(); break; - case 0x0E: /* JLE */ condition = get_ZF() || (getB_SF() != getB_OF()); - break; - case 0x0F: /* JNLE */ condition = (getB_SF() == getB_OF()) && - !get_ZF(); - break; + case 0x0E: /* JLE */ condition = get_ZF() || (getB_SF() != getB_OF()); break; + case 0x0F: /* JNLE */ condition = (getB_SF() == getB_OF()) && !get_ZF(); break; default: condition = 0; // For compiler...all targets should set condition. break; Index: ctrl_xfer32.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/ctrl_xfer32.cc,v retrieving revision 1.41 retrieving revision 1.42 diff -u -d -r1.41 -r1.42 --- ctrl_xfer32.cc 20 May 2005 20:06:50 -0000 1.41 +++ ctrl_xfer32.cc 20 Jul 2005 01:26:44 -0000 1.42 @@ -263,11 +263,8 @@ case 0x0B: /* JNP */ condition = !get_PF(); break; case 0x0C: /* JL */ condition = getB_SF() != getB_OF(); break; case 0x0D: /* JNL */ condition = getB_SF() == getB_OF(); break; - case 0x0E: /* JLE */ condition = get_ZF() || (getB_SF() != getB_OF()); - break; - case 0x0F: /* JNLE */ condition = (getB_SF() == getB_OF()) && - !get_ZF(); - break; + case 0x0E: /* JLE */ condition = get_ZF() || (getB_SF() != getB_OF()); break; + case 0x0F: /* JNLE */ condition = (getB_SF() == getB_OF()) && !get_ZF(); break; default: condition = 0; // For compiler...all targets should set condition. break; @@ -309,7 +306,7 @@ #if BX_INSTRUMENTATION else { BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID); - } + } #endif } @@ -348,11 +345,11 @@ /* op1_32 is a register or memory reference */ if (i->modC0()) { new_EIP = BX_READ_32BIT_REG(i->rm()); - } + } else { /* pointer, segment address pair */ read_virtual_dword(i->seg(), RMAddr(i), &new_EIP); - } + } branch_near32(new_EIP); // includes revalidate_prefetch_q() Index: ctrl_xfer64.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/ctrl_xfer64.cc,v retrieving revision 1.35 retrieving revision 1.36 diff -u -d -r1.35 -r1.36 --- ctrl_xfer64.cc 10 Jul 2005 20:32:30 -0000 1.35 +++ ctrl_xfer64.cc 20 Jul 2005 01:26:45 -0000 1.36 @@ -197,19 +197,11 @@ read_virtual_qword(i->seg(), RMAddr(i), &op1_64); read_virtual_word(i->seg(), RMAddr(i)+8, &cs_raw); - if ( protected_mode() ) { - BX_PANIC(("Call protected is not implemented in x86-64 mode !")); - BX_CPU_THIS_PTR call_protected(i, cs_raw, op1_64); - goto done; - } - - push_64(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value); - push_64(BX_CPU_THIS_PTR rip); + BX_ASSERT(protected_mode()); - RIP = op1_64; - load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw); + BX_PANIC(("Call protected is not implemented in x86-64 mode !")); + BX_CPU_THIS_PTR call_protected(i, cs_raw, op1_64); -done: BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_CALL, BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip); } @@ -299,15 +291,9 @@ read_virtual_dword(i->seg(), RMAddr(i), &op1_32); read_virtual_word(i->seg(), RMAddr(i)+4, &cs_raw); - if ( protected_mode() ) { - BX_CPU_THIS_PTR jump_protected(i, cs_raw, op1_32); - goto done; - } - - RIP = op1_32; - load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw); + BX_ASSERT(protected_mode()); + BX_CPU_THIS_PTR jump_protected(i, cs_raw, op1_32); -done: BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP, BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP); } @@ -321,10 +307,8 @@ BX_CPU_THIS_PTR show_eip = BX_CPU_THIS_PTR rip; #endif - if (BX_CPU_THIS_PTR cr0.pe) { - iret_protected(i); - goto done; - } + BX_ASSERT(protected_mode()); + iret_protected(i); done: BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_IRET, Index: ctrl_xfer_pro.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/ctrl_xfer_pro.cc,v retrieving revision 1.42 retrieving revision 1.43 diff -u -d -r1.42 -r1.43 --- ctrl_xfer_pro.cc 10 Jul 2005 20:32:31 -0000 1.42 +++ ctrl_xfer_pro.cc 20 Jul 2005 01:26:45 -0000 1.43 @@ -1,4 +1,4 @@ -///////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////// // $Id$ ///////////////////////////////////////////////////////////////////////// // @@ -657,7 +657,7 @@ cs_descriptor.u.segment.executable==0 || cs_descriptor.dpl > CPL) { - BX_ERROR(("call_protected: selected desciptor not code")); + BX_ERROR(("call_protected: selected descriptor is not code")); exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc, 0); } @@ -949,25 +949,37 @@ bx_selector_t cs_selector, ss_selector; bx_descriptor_t cs_descriptor, ss_descriptor; Bit32u stack_cs_offset, stack_param_offset; - Bit32u return_EIP, return_ESP, temp_ESP; + bx_address return_RIP, return_RSP, temp_RSP; Bit32u dword1, dword2; - Bit16u return_IP; - - /* + 6+N*2: SS | +12+N*4: SS */ - /* + 4+N*2: SP | + 8+N*4: ESP */ - /* parm N | + parm N */ - /* parm 3 | + parm 3 */ - /* parm 2 | + parm 2 */ - /* parm 1 | + 8: parm 1 */ - /* + 2: CS | + 4: CS */ - /* + 0: IP | + 0: EIP */ + /* + 6+N*2: SS | +12+N*4: SS | +24+N*8 SS */ + /* + 4+N*2: SP | + 8+N*4: ESP | +16+N*8 RSP */ + /* parm N | + parm N | + parm N */ + /* parm 3 | + parm 3 | + parm 3 */ + /* parm 2 | + parm 2 | + parm 2 */ + /* + 4: parm 1 | + 8: parm 1 | +16: parm 1 */ + /* + 2: CS | + 4: CS | + 8: CS */ + /* + 0: IP | + 0: EIP | + 0: RIP */ +#if BX_SUPPORT_X86_64 + if ( i->os64L() ) { + /* operand size=64: 2nd qword on stack must be within stack limits, + * else #SS(0); */ + if (!can_pop(16)) { + BX_ERROR(("return_protected: 2rd qword not in stack limits")); + exception(BX_SS_EXCEPTION, 0, 0); + return; + } + stack_cs_offset = 8; + stack_param_offset = 16; + } + else +#endif if ( i->os32L() ) { - /* operand size=32: third word on stack must be within stack limits, + /* operand size=32: 2nd dword on stack must be within stack limits, * else #SS(0); */ - if (!can_pop(6)) { - BX_ERROR(("return_protected: 3rd word not in stack limits")); + if (!can_pop(8)) { + BX_ERROR(("return_protected: 2rd dword not in stack limits")); exception(BX_SS_EXCEPTION, 0, 0); return; } @@ -986,11 +998,17 @@ stack_param_offset = 4; } - if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) temp_ESP = ESP; - else temp_ESP = SP; +#if BX_SUPPORT_X86_64 + if (IsLongMode()) temp_RSP = RSP; + else +#endif + { + if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) temp_RSP = ESP; + else temp_RSP = SP; + } // return selector RPL must be >= CPL, else #GP(return selector) - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + stack_cs_offset, 2, CPL==3, BX_READ, &raw_cs_selector); parse_selector(raw_cs_selector, &cs_selector); @@ -1063,19 +1081,29 @@ return; } +#if BX_SUPPORT_X86_64 + if (i->os64L()) { + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP, + 8, CPL==3, BX_READ, &return_RIP); + } + else +#endif if (i->os32L()) { - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0, + Bit32u return_EIP; + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP, 4, CPL==3, BX_READ, &return_EIP); + return_RIP = return_EIP; } else { - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0, + Bit16u return_IP; + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP, 2, CPL==3, BX_READ, &return_IP); - return_EIP = return_IP; + return_RIP = return_IP; } // EIP must be in code segment limit, else #GP(0) - if ( return_EIP > cs_descriptor.u.segment.limit_scaled ) { - BX_ERROR(("return_protected: return IP > CS.limit")); + if ( return_RIP > cs_descriptor.u.segment.limit_scaled ) { + BX_ERROR(("return_protected: return RIP > CS.limit")); exception(BX_GP_EXCEPTION, 0, 0); return; } @@ -1084,29 +1112,42 @@ // load CS register with descriptor // increment eSP load_cs(&cs_selector, &cs_descriptor, CPL); - EIP = return_EIP; - if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) - ESP += stack_param_offset + pop_bytes; - else - SP += stack_param_offset + pop_bytes; + RIP = return_RIP; + +#if BX_SUPPORT_X86_64 + if (IsLongMode()) RSP += stack_param_offset + pop_bytes; + else +#endif + { + if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) + ESP += stack_param_offset + pop_bytes; + else + SP += stack_param_offset + pop_bytes; + } return; } /* RETURN TO OUTER PRIVILEGE LEVEL */ else { - /* + 6+N*2: SS | +12+N*4: SS */ - /* + 4+N*2: SP | + 8+N*4: ESP */ - /* parm N | + parm N */ - /* parm 3 | + parm 3 */ - /* parm 2 | + parm 2 */ - /* parm 1 | + 8: parm 1 */ - /* + 2: CS | + 4: CS */ - /* + 0: IP | + 0: EIP */ + /* + 6+N*2: SS | +12+N*4: SS | +24+N*8 SS */ + /* + 4+N*2: SP | + 8+N*4: ESP | +16+N*8 RSP */ + /* parm N | + parm N | + parm N */ + /* parm 3 | + parm 3 | + parm 3 */ + /* parm 2 | + parm 2 | + parm 2 */ + /* + 4: parm 1 | + 8: parm 1 | +16: parm 1 */ + /* + 2: CS | + 4: CS | + 8: CS */ + /* + 0: IP | + 0: EIP | + 0: RIP */ //BX_INFO(("return: to outer level %04x:%08x", // BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, // BX_CPU_THIS_PTR prev_eip)); +#if BX_SUPPORT_X86_64 + if (i->os64L()) { + BX_PANIC(("RETF64: return to outer priviledge level still not implemented !")); + } +#endif + if (i->os32L()) { /* top 16+immediate bytes on stack must be within stack limits, else #SS(0) */ if ( !can_pop(16 + pop_bytes) ) { @@ -1176,24 +1217,27 @@ /* examine return SS selector and associated descriptor: */ if (i->os32L()) { - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 12 + pop_bytes, + Bit16u return_EIP, return_ESP; + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 12 + pop_bytes, 2, 0, BX_READ, &raw_ss_selector); - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 8 + pop_bytes, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 8 + pop_bytes, 4, 0, BX_READ, &return_ESP); - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0, + return_RSP = return_ESP; + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 0, 4, 0, BX_READ, &return_EIP); + return_RIP = return_EIP; } else { - Bit16u return_SP; + Bit16u return_SP, return_IP; - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 6 + pop_bytes, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 6 + pop_bytes, 2, 0, BX_READ, &raw_ss_selector); - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 4 + pop_bytes, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 4 + pop_bytes, 2, 0, BX_READ, &return_SP); - return_ESP = return_SP; - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0, + return_RSP = return_SP; + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 0, 2, 0, BX_READ, &return_IP); - return_EIP = return_IP; + return_RIP = return_IP; } /* selector must be non-null else #GP(0) */ @@ -1245,7 +1289,7 @@ } /* EIP must be in code segment limit, else #GP(0) */ - if (return_EIP > cs_descriptor.u.segment.limit_scaled) { + if (return_RIP > cs_descriptor.u.segment.limit_scaled) { BX_ERROR(("return_protected: EIP > CS.limit")); exception(BX_GP_EXCEPTION, 0, 0); return; @@ -1256,15 +1300,15 @@ /* set CS RPL to CPL */ /* load the CS-cache with return CS descriptor */ load_cs(&cs_selector, &cs_descriptor, cs_selector.rpl); - EIP = return_EIP; + EIP = return_RIP; /* load SS:SP from stack */ /* load SS-cache with return SS descriptor */ load_ss(&ss_selector, &ss_descriptor, cs_selector.rpl); if (ss_descriptor.u.segment.d_b) - ESP = return_ESP + pop_bytes; + ESP = return_RSP + pop_bytes; else - SP = (Bit16u) return_ESP + pop_bytes; + SP = (Bit16u) return_RSP + pop_bytes; /* check ES, DS, FS, GS for validity */ validate_seg_regs(); @@ -1445,7 +1489,7 @@ // then #GP(return selector) if (cs_descriptor.dpl != cs_selector.rpl) { - BX_INFO(("(mch) iret: Return with DPL != RPL. #GP(selector)")); + BX_INFO(("iret: Return with DPL != RPL. #GP(selector)")); exception(BX_GP_EXCEPTION, raw_cs_selector & 0xfffc, 0); return; } @@ -1590,7 +1634,7 @@ /* NT = 0: INTERRUPT RETURN ON STACK -or STACK_RETURN_TO_V86 */ Bit16u top_nbytes_same, top_nbytes_outer; Bit32u cs_offset, ss_offset; - Bit32u new_eip, new_esp, temp_ESP, new_eflags; + Bit32u new_eip, new_esp, temp_RSP, new_eflags; Bit16u new_ip, new_sp, new_flags; Bit8u prev_cpl; @@ -1625,17 +1669,17 @@ } if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) - temp_ESP = ESP; + temp_RSP = ESP; else - temp_ESP = SP; + temp_RSP = SP; - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + cs_offset, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + cs_offset, 2, CPL==3, BX_READ, &raw_cs_selector); if (i->os32L()) { - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 0, 4, CPL==3, BX_READ, &new_eip); - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 8, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 8, 4, CPL==3, BX_READ, &new_eflags); // if VM=1 in flags image on stack then STACK_RETURN_TO_V86 @@ -1648,9 +1692,9 @@ } } else { - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 0, 2, CPL==3, BX_READ, &new_ip); - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 4, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 4, 2, CPL==3, BX_READ, &new_flags); } @@ -1775,7 +1819,7 @@ } /* examine return SS selector and associated descriptor */ - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + ss_offset, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + ss_offset, 2, 0, BX_READ, &raw_ss_selector); /* selector must be non-null, else #GP(0) */ @@ -1829,19 +1873,19 @@ } if (i->os32L()) { - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 0, 4, 0, BX_READ, &new_eip); - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 8, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 8, 4, 0, BX_READ, &new_eflags); - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 12, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 12, 4, 0, BX_READ, &new_esp); } else { - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 0, 2, 0, BX_READ, &new_ip); - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 4, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 4, 2, 0, BX_READ, &new_flags); - access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 6, + access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 6, 2, 0, BX_READ, &new_sp); new_eip = new_ip; new_esp = new_sp; Index: segment_ctrl_pro.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/segment_ctrl_pro.cc,v retrieving revision 1.39 retrieving revision 1.40 diff -u -d -r1.39 -r1.40 --- segment_ctrl_pro.cc 10 Jul 2005 20:32:32 -0000 1.39 +++ segment_ctrl_pro.cc 20 Jul 2005 01:26:46 -0000 1.40 @@ -623,12 +623,9 @@ { if (selector->ti == 0) { /* GDT */ if ((selector->index*8 + 7) > BX_CPU_THIS_PTR gdtr.limit) { -BX_INFO(("-----------------------------------")); -BX_INFO(("selector->index*8 + 7 = %u", (unsigned) selector->index*8 + 7)); -BX_INFO(("gdtr.limit = %u", (unsigned) BX_CPU_THIS_PTR gdtr.limit)); - BX_INFO(("fetch_raw_descriptor: GDT: index > limit")); -debug(BX_CPU_THIS_PTR prev_eip); -BX_INFO(("-----------------------------------")); + BX_ERROR(("fetch_raw_descriptor: GDT: index (%x)%x > limit (%x)", + (selector->index*8 + 7), selector->index, + BX_CPU_THIS_PTR gdtr.limit)); exception(exception_no, selector->value & 0xfffc, 0); return; } @@ -672,6 +669,10 @@ return(1); } else { /* LDT */ + if (BX_CPU_THIS_PTR ldtr.cache.valid==0) { + BX_PANIC(("fetch_raw_descriptor2: LDTR.valid=0")); + return(0); + } if ((selector->index*8 + 7) > BX_CPU_THIS_PTR ldtr.cache.u.ldt.limit) return(0); access_linear(BX_CPU_THIS_PTR ldtr.cache.u.ldt.base + selector->index*8, 4, 0, Index: stack_pro.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/stack_pro.cc,v retrieving revision 1.22 retrieving revision 1.23 diff -u -d -r1.22 -r1.23 --- stack_pro.cc 1 Jul 2005 14:06:02 -0000 1.22 +++ stack_pro.cc 20 Jul 2005 01:26:47 -0000 1.23 @@ -123,7 +123,7 @@ if (!can_push(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache, RSP, 8)) { BX_INFO(("push_64(): push outside stack limits")); exception(BX_SS_EXCEPTION, 0, 0); /* #SS(0) */ - } + } #endif write_virtual_qword(BX_SEG_REG_SS, RSP-8, &value64); |