Menu
▾
▴
CVS: blob/include/blob/arch assabet.h,1.4,1.5 brutus.h,1.2,1.3 clart.h,1.3,1.4 h3600.h,1.3,1.4 lart.h,1.2,1.3 nesa.h,1.2,1.3 pleb.h,1.2,1.3 shannon.h,1.2,1.3 system3.h,1.3,1.4
|
From: Erik M. <er...@us...> - 2001-11-04 23:04:40
|
Update of /cvsroot/blob/blob/include/blob/arch In directory usw-pr-cvs1:/tmp/cvs-serv13120 Modified Files: assabet.h brutus.h clart.h h3600.h lart.h nesa.h pleb.h shannon.h system3.h Log Message: Add BLOB_ABS_BASE_ADDR to all architectures that defines where the second stage loader is loaded in memory. This also shuffles various parts in memory a bit, but it seems to work (tested on Assabet, LART, and Ipaq). Shannon was a bit precious, but I think this setup should work for both 8MB and 32MB SODIMMs. Index: assabet.h =================================================================== RCS file: /cvsroot/blob/blob/include/blob/arch/assabet.h,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- assabet.h 2001/10/31 16:40:45 1.4 +++ assabet.h 2001/11/04 23:04:37 1.5 @@ -41,11 +41,15 @@ #define LED_GPIO (0x00020000) /* GPIO 17 */ +/* the base address were BLOB is loaded by the first stage loader */ +#define BLOB_ABS_BASE_ADDR (0xc0200400) + + /* where do various parts live in RAM */ #define BLOB_RAM_BASE (0xc0100000) #define KERNEL_RAM_BASE (0xC0008000) #define PARAM_RAM_BASE (0xc0110000) -#define RAMDISK_RAM_BASE (0xC0800000) +#define RAMDISK_RAM_BASE (0xC0400000) /* and where do they live in flash */ Index: brutus.h =================================================================== RCS file: /cvsroot/blob/blob/include/blob/arch/brutus.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- brutus.h 2001/10/31 16:40:45 1.2 +++ brutus.h 2001/11/04 23:04:37 1.3 @@ -42,11 +42,15 @@ #define LED_GPIO (0x00000000) /* safe mode: no GPIO, no LED */ +/* the base address were blob-rest is loaded by the first stage loader */ +#define BLOB_ABS_BASE_ADDR (0xc0200400) + + /* where do various parts live in RAM */ #define BLOB_RAM_BASE (0xc0100000) #define KERNEL_RAM_BASE (0xC0008000) #define PARAM_RAM_BASE (0xc0110000) -#define RAMDISK_RAM_BASE (0xC0400000) +#define RAMDISK_RAM_BASE (0xC8000000) /* and where do they live in flash */ Index: clart.h =================================================================== RCS file: /cvsroot/blob/blob/include/blob/arch/clart.h,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- clart.h 2001/10/31 16:40:45 1.3 +++ clart.h 2001/11/04 23:04:37 1.4 @@ -41,6 +41,10 @@ #define LED_GPIO (0x00800000) /* GPIO 23 */ +/* the base address were blob-rest is loaded by the first stage loader */ +#define BLOB_ABS_BASE_ADDR (0xc0200400) + + /* where do various parts live in RAM */ #define BLOB_RAM_BASE (0xc0100000) #define KERNEL_RAM_BASE (0xC0008000) Index: h3600.h =================================================================== RCS file: /cvsroot/blob/blob/include/blob/arch/h3600.h,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- h3600.h 2001/10/31 16:40:45 1.3 +++ h3600.h 2001/11/04 23:04:37 1.4 @@ -41,11 +41,15 @@ #define LED_GPIO (0x00000000) /* No LED */ +/* the base address were blob-rest is loaded by the first stage loader */ +#define BLOB_ABS_BASE_ADDR (0xc0200400) + + /* where do various parts live in RAM */ #define BLOB_RAM_BASE (0xc0100000) #define KERNEL_RAM_BASE (0xC0008000) #define PARAM_RAM_BASE (0xc0110000) -#define RAMDISK_RAM_BASE (0xC0800000) +#define RAMDISK_RAM_BASE (0xC0400000) /* and where do they live in flash */ Index: lart.h =================================================================== RCS file: /cvsroot/blob/blob/include/blob/arch/lart.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- lart.h 2001/10/31 16:40:45 1.2 +++ lart.h 2001/11/04 23:04:37 1.3 @@ -41,6 +41,10 @@ #define LED_GPIO (0x00800000) /* GPIO 23 */ +/* the base address were blob-rest is loaded by the first stage loader */ +#define BLOB_ABS_BASE_ADDR (0xc0200400) + + /* where do various parts live in RAM */ #define BLOB_RAM_BASE (0xc0100000) #define KERNEL_RAM_BASE (0xC0008000) Index: nesa.h =================================================================== RCS file: /cvsroot/blob/blob/include/blob/arch/nesa.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- nesa.h 2001/10/31 16:40:45 1.2 +++ nesa.h 2001/11/04 23:04:37 1.3 @@ -42,6 +42,10 @@ #define LED_GPIO (0x00800000) /* GPIO 23 */ +/* the base address were blob-rest is loaded by the first stage loader */ +#define BLOB_ABS_BASE_ADDR (0xc0200400) + + /* where do various parts live in RAM */ #define BLOB_RAM_BASE (0xc0100000) #define KERNEL_RAM_BASE (0xC0008000) Index: pleb.h =================================================================== RCS file: /cvsroot/blob/blob/include/blob/arch/pleb.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- pleb.h 2001/10/31 16:40:45 1.2 +++ pleb.h 2001/11/04 23:04:37 1.3 @@ -42,6 +42,10 @@ #define LED_GPIO (0x00010000) /* GPIO 16 */ +/* the base address were blob-rest is loaded by the first stage loader */ +#define BLOB_ABS_BASE_ADDR (0xc0200400) + + /* where do various parts live in RAM */ #define BLOB_RAM_BASE (0xc0100000) #define KERNEL_RAM_BASE (0xC0008000) Index: shannon.h =================================================================== RCS file: /cvsroot/blob/blob/include/blob/arch/shannon.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- shannon.h 2001/10/31 16:40:45 1.2 +++ shannon.h 2001/11/04 23:04:37 1.3 @@ -42,11 +42,27 @@ #define LED_GPIO (0x00000000) /* safe mode: no GPIO, no LED */ +/* Shannon memory layout is a bit precious because we want to be able + * to load blob at the correct location for both 8 and 32MB + * SODIMMs. We assume that the following amount of memory is at least + * available in both situations: + * + * 1MB @ 0xc0000000 + * 1MB @ 0xc8000000 + * 4MB @ 0xd0000000 + * 4MB @ 0xd8000000 + * + */ + +/* the base address were blob-rest is loaded by the first stage loader */ +#define BLOB_ABS_BASE_ADDR (0xc8000400) + + /* where do various parts live in RAM */ -#define BLOB_RAM_BASE (0xc0100000) +#define BLOB_RAM_BASE (0xc8020000) #define KERNEL_RAM_BASE (0xC0008000) -#define PARAM_RAM_BASE (0xc0110000) -#define RAMDISK_RAM_BASE (0xC8000000) +#define PARAM_RAM_BASE (0xc8040000) +#define RAMDISK_RAM_BASE (0xd0000000) /* and where do they live in flash */ Index: system3.h =================================================================== RCS file: /cvsroot/blob/blob/include/blob/arch/system3.h,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- system3.h 2001/10/31 16:40:45 1.3 +++ system3.h 2001/11/04 23:04:37 1.4 @@ -42,11 +42,15 @@ #define LED_GPIO (0x00000400) /* GPIO 10 */ +/* the base address were BLOB is loaded by the first stage loader */ +#define BLOB_ABS_BASE_ADDR (0xc0200400) + + /* where do various parts live in RAM */ #define BLOB_RAM_BASE (0xc0100000) #define KERNEL_RAM_BASE (0xC0008000) #define PARAM_RAM_BASE (0xc0110000) -#define RAMDISK_RAM_BASE (0xC0800000) +#define RAMDISK_RAM_BASE (0xC0400000) /* and where do they live in flash */ |