CVS: blob/src/blob memsetup-sa1110.S,1.4,1.5

[Stefan E. <se...@us...>]

Update of /cvsroot/blob/blob/src/blob
In directory usw-pr-cvs1:/tmp/cvs-serv7736

Modified Files:
	memsetup-sa1110.S 
Log Message:
- cleanups, memory config now in arch dependent include files
- bugfix: forgot to enable E0PIN
- added SMCNFG, MECR settings


Index: memsetup-sa1110.S
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/memsetup-sa1110.S,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- memsetup-sa1110.S	2001/10/27 21:04:20	1.4
+++ memsetup-sa1110.S	2001/10/29 11:41:50	1.5
@@ -44,47 +44,29 @@
 # include <blob/config.h>
 #endif
 
-#include <blob/memsetup.h>
+#define BLOB_NEED_MEMCONFIG
+#include <memsetup.h>
+#include <blob/arch.h>
 
 			
 .text
 MEM_REG_BASE:	.long	0xa0000000
 MEM_START:	.long	0xc0000000
 
-#if (defined ASSABET) || (defined CLART) || (defined H3600)
 MEMORY_CONFIG:
 	.long	0x72547254		/* 0x0  MDCNFG */
-	.long	0xAAAAAA7F		/* 0x04 MDCAS00 */
-	.long	0xAAAAAAAA		/* 0x08 MDCAS01 */
-	.long	0xAAAAAAAA		/* 0x0c MDCAS02 */
-	.long	0x4b384370		/* 0x10 MCS0 */
-	.long	0x22212419		/* 0x14 MCS1 */
-	.long	0x994a994a		/* 0x18 MECR */
-	.long	0x49fc0327		/* 0x1C MDREFR */
-	.long	0xAAAAAA7F		/* 0x20 MDCAS20 */
-	.long	0xAAAAAAAA		/* 0x24 MDCAS21 */
-	.long	0xAAAAAAAA		/* 0x28 MDCAS22 */
-	.long	0x42196669		/* 0x2C MCS2 */
-	.long	0xafccafcc		/* 0x30 SMCNFG */
-#endif
-
-#if defined PT_SYSTEM3
-MEMORY_CONFIG:
-	.long	0x72547254		/* 0x0  MDCNFG */
-	.long	0xAAAAAA7F		/* 0x04 MDCAS00 */
-	.long	0xAAAAAAAA		/* 0x08 MDCAS01 */
-	.long	0xAAAAAAAA		/* 0x0c MDCAS02 */
-	.long	0x00004380		/* 0x10 MCS0 */
-	.long	0xfef5212c		/* 0x14 MCS1 */
-	.long	0x994a994a		/* 0x18 MECR */
-	.long	0x023600c1		/* 0x1C MDREFR */
-	.long	0xAAAAAA7F		/* 0x20 MDCAS20 */
-	.long	0xAAAAAAAA		/* 0x24 MDCAS21 */
-	.long	0xAAAAAAAA		/* 0x28 MDCAS22 */
-	.long	0x00002249		/* 0x2C MCS2 */
-	.long	0xafccafcc		/* 0x30 SMCNFG */
-#endif
-
+	.long	MDCAS00_VALUE		/* 0x04 MDCAS00 */
+	.long	MDCAS01_VALUE		/* 0x08 MDCAS01 */
+	.long	MDCAS02_VALUE		/* 0x0c MDCAS02 */
+	.long	MSC0_VALUE		/* 0x10 MSC0 */
+	.long	MSC1_VALUE		/* 0x14 MSC1 */
+	.long	MECR_VALUE		/* 0x18 MECR */
+	.long	0xdeadbeef		/* 0x1C MDREFR */
+	.long	MDCAS20_VALUE		/* 0x20 MDCAS20 */
+	.long	MDCAS21_VALUE		/* 0x24 MDCAS21 */
+	.long	MDCAS22_VALUE		/* 0x28 MDCAS22 */
+	.long	MSC2_VALUE		/* 0x2C MSC2 */
+	.long	SMCNFG_VALUE		/* 0x30 SMCNFG */
 
 .globl memsetup
 memsetup:
@@ -115,21 +97,27 @@
 	ldr	r2, [r1, #MDCAS22 ]
 	str	r2, [r0, #MDCAS22 ]
 
-	/* clear K1DB2 K2DB2 */
+	/* clear KxDB2 */
 	ldr r2, [ r0, #MDREFR ]
-	bic r2, r2, #(MDREFR_K1DB2 | MDREFR_K2DB2)
+	bic r2, r2, #MDREFR_K0DB2
+	bic r2, r2, #MDREFR_K1DB2
+	bic r2, r2, #MDREFR_K2DB2
 	str r2, [ r0, #MDREFR ]
 
-	/* set TRASR and DRI, K1DB2 K2DB2 */
+	/* set TRASR and DRI, KxDB2 */
 	ldr r2, [ r0, #MDREFR ]
 	orr r2, r2, #MDREFR_TRASR(7)
 	orr r2, r2, #MDREFR_DRI(12)
-	orr r2, r2, #(MDREFR_K1DB2 | MDREFR_K2DB2)
+	orr r2, r2, #MDREFR_K0DB2
+	orr r2, r2, #MDREFR_K1DB2
+	orr r2, r2, #MDREFR_K2DB2
 	str r2, [ r0, #MDREFR ]
 
-	/* set K1RUN K2RUN */
+	/* set KxRUN */
 	ldr r2, [ r0, #MDREFR ]
-	orr r2, r2, #(MDREFR_K1RUN | MDREFR_K2RUN)
+	orr r2, r2, #MDREFR_K0RUN
+	orr r2, r2, #MDREFR_K1RUN
+	orr r2, r2, #MDREFR_K2RUN
 	str r2, [ r0, #MDREFR ]
 
 	/* clear SLFRSH */
@@ -158,7 +146,7 @@
 	str	r2, [r0, #MDCNFG]
 
 	/* OPTIONALLY enable Autopowerup/down */
-#if defined PT_SYSTEM3
+#if 0
 	ldr r2, [ r0, #MDREFR ]
 	orr r2, r2, #MDREFR_EAPD
 	orr r2, r2, #MDREFR_KAPD
@@ -171,10 +159,13 @@
 	ldr	r2, [r1, #MCS1 ]
 	str	r2, [r0, #MCS1 ]
 
-	ldr	r2, [r1, #MECR ]
-	str	r2, [r0, #MECR ]
-
 	ldr	r2, [r1, #MCS2 ]
 	str	r2, [r0, #MCS2 ]
+
+	ldr	r2, [r1, #SMCNFG ]
+	str	r2, [r0, #SMCNFG ]
+
+	ldr	r2, [r1, #MECR ]
+	str	r2, [r0, #MECR ]
 	
 	mov	pc, r5