[Armadeus-commitlog] armadeus/u-boot branch, armadeus-2024.01, updated. 750950a0beb840862c36424770
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[Armadeus-commitlog] armadeus/u-boot branch, armadeus-2024.01, updated. 750950a0beb840862c3642477038361ff63d2520
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From: sszy <ss...@us...> - 2024-11-07 16:27:39
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- Log -----------------------------------------------------------------
commit 750950a0beb840862c3642477038361ff63d2520
Author: Sébastien Szymanski <seb...@ar...>
Date: Thu Nov 7 16:24:45 2024 +0100
configs: opos93dev_defconfig: enable MEMINFO
commit 5c30ec34558bf19902e5306e24c0e7408788940d
Author: Sébastien Szymanski <seb...@ar...>
Date: Thu Nov 7 16:23:18 2024 +0100
imx9: opos93: add opos93 with 1GB of RAM support
-----------------------------------------------------------------------
Summary of changes:
arch/arm/include/asm/arch-imx9/opos93.h | 12 ++++
arch/arm/mach-imx/imx9/Makefile | 2 +-
arch/arm/mach-imx/imx9/opos93.c | 11 +++-
..._lpddr4_timing.c => opos93_1gb_lpddr4_timing.c} | 70 +++++++++++-----------
configs/opos93dev_defconfig | 1 +
5 files changed, 59 insertions(+), 37 deletions(-)
create mode 100644 arch/arm/include/asm/arch-imx9/opos93.h
copy arch/arm/mach-imx/imx9/{opos93_lpddr4_timing.c => opos93_1gb_lpddr4_timing.c} (97%)
diff --git a/arch/arm/include/asm/arch-imx9/opos93.h b/arch/arm/include/asm/arch-imx9/opos93.h
new file mode 100644
index 0000000000..d5beb7df14
--- /dev/null
+++ b/arch/arm/include/asm/arch-imx9/opos93.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2024 Armadeus Systems <co...@ar...>
+ */
+
+
+#ifndef __ASM_ARCH_IMX93_OPOS93_H
+#define __ASM_ARCH_IMX93_OPOS93_H
+
+extern struct dram_timing_info opos93_1gb_dram_timing;
+
+#endif
diff --git a/arch/arm/mach-imx/imx9/Makefile b/arch/arm/mach-imx/imx9/Makefile
index 3c63e637de..7376d51f8a 100644
--- a/arch/arm/mach-imx/imx9/Makefile
+++ b/arch/arm/mach-imx/imx9/Makefile
@@ -4,7 +4,7 @@
obj-y += lowlevel_init.o
obj-y += soc.o clock.o clock_root.o trdc.o
-obj-$(CONFIG_IMX93_OPOS93) += opos93_lpddr4_timing.o opos93.o
+obj-$(CONFIG_IMX93_OPOS93) += opos93_lpddr4_timing.o opos93_1gb_lpddr4_timing.o opos93.o
#ifndef CONFIG_SPL_BUILD
obj-y += imx_bootaux.o
diff --git a/arch/arm/mach-imx/imx9/opos93.c b/arch/arm/mach-imx/imx9/opos93.c
index e58dc466ec..2d7cbba119 100644
--- a/arch/arm/mach-imx/imx9/opos93.c
+++ b/arch/arm/mach-imx/imx9/opos93.c
@@ -30,8 +30,10 @@
#include <asm/arch/ccm_regs.h>
#include <asm/arch/ddr.h>
#include <asm/arch/trdc.h>
+#include <asm/arch/opos93.h>
#include <miiphy.h>
#include <netdev.h>
+#include <fuse.h>
#define UART_PAD_CTRL (PAD_CTL_DSE(6) | PAD_CTL_FSEL2)
@@ -86,7 +88,14 @@ void spl_board_init(void)
void spl_dram_init(void)
{
- ddr_init(&dram_timing);
+ u32 val;
+
+ fuse_read(47, 0, &val);
+
+ if (val & 0x1)
+ ddr_init(&opos93_1gb_dram_timing);
+ else
+ ddr_init(&dram_timing);
}
void board_init_f(ulong dummy)
diff --git a/arch/arm/mach-imx/imx9/opos93_lpddr4_timing.c b/arch/arm/mach-imx/imx9/opos93_1gb_lpddr4_timing.c
similarity index 97%
copy from arch/arm/mach-imx/imx9/opos93_lpddr4_timing.c
copy to arch/arm/mach-imx/imx9/opos93_1gb_lpddr4_timing.c
index 0c927a3ce2..c3c2b410aa 100644
--- a/arch/arm/mach-imx/imx9/opos93_lpddr4_timing.c
+++ b/arch/arm/mach-imx/imx9/opos93_1gb_lpddr4_timing.c
@@ -13,9 +13,9 @@
/* Initialize DDRC registers */
static struct dram_cfg_param ddr_ddrc_cfg[] = {
{0x4e300110, 0x44100001},
- {0x4e300000, 0x80009f},
+ {0x4e300000, 0x8000bf},
{0x4e300008, 0x0},
- {0x4e300080, 0x80000312},
+ {0x4e300080, 0x80000412},
{0x4e300084, 0x0},
{0x4e300114, 0x1002},
{0x4e300260, 0x80},
@@ -37,7 +37,7 @@ static struct dram_cfg_param ddr_ddrc_cfg[] = {
static struct dram_fsp_cfg ddr_dram_fsp_cfg[] = {
{
{
- {0x4e300100, 0x1451311B},
+ {0x4e300100, 0x145B311B},
{0x4e300104, 0xF8CC0017},
{0x4e300108, 0xD4D68E00},
{0x4e30010C, 0x0071E100},
@@ -50,7 +50,7 @@ static struct dram_fsp_cfg ddr_dram_fsp_cfg[] = {
{0x4e300258, 0x00000008},
{0x4e30025C, 0x00000400},
{0x4e300300, 0x1D441D0D},
- {0x4e300304, 0x00881E10},
+ {0x4e300304, 0x00D81E10},
{0x4e300308, 0x0C3C0C34},
},
{
@@ -59,19 +59,19 @@ static struct dram_fsp_cfg ddr_dram_fsp_cfg[] = {
{0x03, 0x33},
{0x0b, 0x46},
{0x0c, 0x49},
- {0x0e, 0x18},
+ {0x0e, 0x19},
{0x16, 0x04},
},
0,
},
{
{
- {0x4e300100, 0x02081100},
+ {0x4e300100, 0x020D1100},
{0x4e300104, 0xF866000C},
{0x4e300108, 0xF2FA8088},
{0x4e30010C, 0x006101A0},
{0x4e300124, 0x0C340000},
- {0x4e300160, 0x00009100},
+ {0x4e300160, 0x00009101},
{0x4e30016C, 0x30700000},
{0x4e300170, 0x8A0A0508},
{0x4e300250, 0x00000011},
@@ -85,16 +85,16 @@ static struct dram_fsp_cfg ddr_dram_fsp_cfg[] = {
{0x03, 0x33},
{0x0b, 0x46},
{0x0c, 0x49},
- {0x0e, 0x18},
+ {0x0e, 0x19},
{0x16, 0x04},
},
0,
},
{
{
- {0x4e300100, 0x00031000},
+ {0x4e300100, 0x00051000},
{0x4e300104, 0xF855000A},
- {0x4e300108, 0x6E621A48},
+ {0x4e300108, 0x6E620A48},
{0x4e30010C, 0x0031010D},
{0x4e300124, 0x04C50000},
{0x4e300160, 0x00009100},
@@ -111,7 +111,7 @@ static struct dram_fsp_cfg ddr_dram_fsp_cfg[] = {
{0x03, 0x33},
{0x0b, 0x46},
{0x0c, 0x49},
- {0x0e, 0x18},
+ {0x0e, 0x19},
{0x16, 0x04},
},
1,
@@ -211,17 +211,17 @@ static struct dram_cfg_param ddr_ddrphy_cfg[] = {
{0x120008, 0x190},
{0x220008, 0x9c},
{0x20088, 0x9},
- {0x200b2, 0x134},
+ {0x200b2, 0x14c},
{0x10043, 0x5a1},
{0x10143, 0x5a1},
{0x11043, 0x5a1},
{0x11143, 0x5a1},
- {0x1200b2, 0x134},
+ {0x1200b2, 0x14c},
{0x110043, 0x5a1},
{0x110143, 0x5a1},
{0x111043, 0x5a1},
{0x111143, 0x5a1},
- {0x2200b2, 0x134},
+ {0x2200b2, 0x14c},
{0x210043, 0x5a1},
{0x210143, 0x5a1},
{0x211043, 0x5a1},
@@ -1239,7 +1239,7 @@ static struct dram_cfg_param ddr_fsp0_cfg[] = {
{0xd0000, 0x0},
{0x54003, 0xc80},
{0x54004, 0x4},
- {0x54006, 0x18},
+ {0x54006, 0x1a},
{0x54008, 0x131f},
{0x54009, 0xc8},
{0x5400b, 0x4},
@@ -1249,24 +1249,24 @@ static struct dram_cfg_param ddr_fsp0_cfg[] = {
{0x54019, 0x2dd4},
{0x5401a, 0x33},
{0x5401b, 0x4946},
- {0x5401c, 0x1808},
+ {0x5401c, 0x1908},
{0x5401e, 0x4},
{0x5401f, 0x2dd4},
{0x54020, 0x33},
{0x54021, 0x4946},
- {0x54022, 0x1808},
+ {0x54022, 0x1908},
{0x54024, 0x4},
{0x54032, 0xd400},
{0x54033, 0x332d},
{0x54034, 0x4600},
{0x54035, 0x849},
- {0x54036, 0x18},
+ {0x54036, 0x19},
{0x54037, 0x400},
{0x54038, 0xd400},
{0x54039, 0x332d},
{0x5403a, 0x4600},
{0x5403b, 0x849},
- {0x5403c, 0x18},
+ {0x5403c, 0x19},
{0x5403d, 0x400},
{0xd0000, 0x1}
};
@@ -1277,7 +1277,7 @@ static struct dram_cfg_param ddr_fsp1_cfg[] = {
{0x54002, 0x1},
{0x54003, 0x640},
{0x54004, 0x4},
- {0x54006, 0x18},
+ {0x54006, 0x1a},
{0x54008, 0x121f},
{0x54009, 0xc8},
{0x5400b, 0x4},
@@ -1287,24 +1287,24 @@ static struct dram_cfg_param ddr_fsp1_cfg[] = {
{0x54019, 0x52a4},
{0x5401a, 0x33},
{0x5401b, 0x4946},
- {0x5401c, 0x1808},
+ {0x5401c, 0x1908},
{0x5401e, 0x4},
{0x5401f, 0x52a4},
{0x54020, 0x33},
{0x54021, 0x4946},
- {0x54022, 0x1808},
+ {0x54022, 0x1908},
{0x54024, 0x4},
{0x54032, 0xa400},
{0x54033, 0x3352},
{0x54034, 0x4600},
{0x54035, 0x849},
- {0x54036, 0x18},
+ {0x54036, 0x19},
{0x54037, 0x400},
{0x54038, 0xa400},
{0x54039, 0x3352},
{0x5403a, 0x4600},
{0x5403b, 0x849},
- {0x5403c, 0x18},
+ {0x5403c, 0x19},
{0x5403d, 0x400},
{0xd0000, 0x1}
};
@@ -1315,7 +1315,7 @@ static struct dram_cfg_param ddr_fsp2_cfg[] = {
{0x54002, 0x102},
{0x54003, 0x270},
{0x54004, 0x4},
- {0x54006, 0x18},
+ {0x54006, 0x1a},
{0x54008, 0x121f},
{0x54009, 0xc8},
{0x5400b, 0x4},
@@ -1325,24 +1325,24 @@ static struct dram_cfg_param ddr_fsp2_cfg[] = {
{0x54019, 0x994},
{0x5401a, 0x33},
{0x5401b, 0x4946},
- {0x5401c, 0x1800},
+ {0x5401c, 0x1900},
{0x5401e, 0x4},
{0x5401f, 0x994},
{0x54020, 0x33},
{0x54021, 0x4946},
- {0x54022, 0x1800},
+ {0x54022, 0x1900},
{0x54024, 0x4},
{0x54032, 0x9400},
{0x54033, 0x3309},
{0x54034, 0x4600},
{0x54035, 0x49},
- {0x54036, 0x18},
+ {0x54036, 0x19},
{0x54037, 0x400},
{0x54038, 0x9400},
{0x54039, 0x3309},
{0x5403a, 0x4600},
{0x5403b, 0x49},
- {0x5403c, 0x18},
+ {0x5403c, 0x19},
{0x5403d, 0x400},
{0xd0000, 0x1}
};
@@ -1353,7 +1353,7 @@ static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
{0xd0000, 0x0},
{0x54003, 0xc80},
{0x54004, 0x4},
- {0x54006, 0x18},
+ {0x54006, 0x1a},
{0x54008, 0x61},
{0x54009, 0xc8},
{0x5400b, 0x4},
@@ -1364,24 +1364,24 @@ static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
{0x54019, 0x2dd4},
{0x5401a, 0x33},
{0x5401b, 0x4946},
- {0x5401c, 0x1808},
+ {0x5401c, 0x1908},
{0x5401e, 0x4},
{0x5401f, 0x2dd4},
{0x54020, 0x33},
{0x54021, 0x4946},
- {0x54022, 0x1808},
+ {0x54022, 0x1908},
{0x54024, 0x4},
{0x54032, 0xd400},
{0x54033, 0x332d},
{0x54034, 0x4600},
{0x54035, 0x849},
- {0x54036, 0x18},
+ {0x54036, 0x19},
{0x54037, 0x400},
{0x54038, 0xd400},
{0x54039, 0x332d},
{0x5403a, 0x4600},
{0x5403b, 0x849},
- {0x5403c, 0x18},
+ {0x5403c, 0x19},
{0x5403d, 0x400},
{0xd0000, 0x1}
};
@@ -1981,7 +1981,7 @@ static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
};
/* ddr timing config params */
-struct dram_timing_info dram_timing = {
+struct dram_timing_info opos93_1gb_dram_timing = {
.ddrc_cfg = ddr_ddrc_cfg,
.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
.ddrphy_cfg = ddr_ddrphy_cfg,
diff --git a/configs/opos93dev_defconfig b/configs/opos93dev_defconfig
index 75aad61ac8..fee131eb79 100644
--- a/configs/opos93dev_defconfig
+++ b/configs/opos93dev_defconfig
@@ -56,6 +56,7 @@ CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_CMD_ERASEENV=y
# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_ADC=y
CONFIG_CMD_CLK=y
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