[Armadeus-commitlog] armadeus branch, master, updated. armadeus-7.0-353-g7facb5263
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-7.0-353-g7facb5263
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From: sszy <ss...@us...> - 2023-01-05 20:26:51
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The branch, master has been updated
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via 55b0cbfd0c0c5b91a98e60c4bd036d71434d017f (commit)
from f4c1bb4e294742f64341886758f50f27d881fcc5 (commit)
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- Log -----------------------------------------------------------------
commit 7facb5263a494c4975abb8d6ec9eb4725a53e9a2
Author: Sébastien Szymanski <seb...@ar...>
Date: Thu Jan 5 21:20:15 2023 +0100
[BUILDROOT] apf51: bump linux to 5.10.162 and add APF51v2 support
commit 55b0cbfd0c0c5b91a98e60c4bd036d71434d017f
Author: Sébastien Szymanski <seb...@ar...>
Date: Thu Jan 5 11:04:49 2023 +0100
[LINUX] apf51: 5.10: enable GPIOs driver
-----------------------------------------------------------------------
Summary of changes:
buildroot/configs/apf51_defconfig | 6 +-
.../device/armadeus/apf51/apf51-linux-5.10.config | 10 +-
...1-apf51dev-rework-device-tree-to-support.patch} | 1057 +++++++++-----------
...f51dev-add-pinctrl-properties-to-gpio-key.patch | 58 ++
...f51dev-add-pinctrl-properties-to-gpio-led.patch | 52 +
5 files changed, 600 insertions(+), 583 deletions(-)
copy patches/linux/{4.0/0415-armadeus-apf51-add_apf51_v1-and_v2_device_trees.patch => 5.10/0815-ARM-dts-apf51-apf51dev-rework-device-tree-to-support.patch} (61%)
create mode 100644 patches/linux/5.10/0816-ARM-dts-apf51dev-add-pinctrl-properties-to-gpio-key.patch
create mode 100644 patches/linux/5.10/0817-ARM-dts-apf51dev-add-pinctrl-properties-to-gpio-led.patch
diff --git a/buildroot/configs/apf51_defconfig b/buildroot/configs/apf51_defconfig
index ab082189e..c813a983f 100644
--- a/buildroot/configs/apf51_defconfig
+++ b/buildroot/configs/apf51_defconfig
@@ -26,14 +26,14 @@ BR2_CPU_NAME="imx51"
BR2_TARGET_ARMADEUS_SDRAM_SIZE="256"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.10.60"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.10.162"
BR2_LINUX_KERNEL_PATCH="$(TOPDIR)/../patches/linux/5.10"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
-BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-$(BR2_LINUX_KERNEL_VERSION).config"
+BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-5.10.config"
BR2_LINUX_KERNEL_UIMAGE=y
BR2_LINUX_KERNEL_UIMAGE_LOADADDR="0x90008000"
BR2_LINUX_KERNEL_DTS_SUPPORT=y
-BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx51-apf51dev"
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx51-apf51dev imx51-apf51v2dev"
BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
BR2_PACKAGE_BUSYBOX_CONFIG="$(ARMADEUS_PATH)/busybox.config"
BR2_PACKAGE_FPGAREGS=y
diff --git a/buildroot/target/device/armadeus/apf51/apf51-linux-5.10.config b/buildroot/target/device/armadeus/apf51/apf51-linux-5.10.config
index fdfff6a35..8de2da697 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-linux-5.10.config
+++ b/buildroot/target/device/armadeus/apf51/apf51-linux-5.10.config
@@ -100,12 +100,12 @@ CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=m
CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_MXC=y
CONFIG_GPIO_WM831X=m
CONFIG_POWER_SUPPLY=y
CONFIG_WM831X_BACKUP=m
CONFIG_WM831X_POWER=m
-CONFIG_HWMON=m
-CONFIG_SENSORS_MC13783_ADC=m
+CONFIG_SENSORS_MC13783_ADC=y
CONFIG_SENSORS_WM831X=m
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
@@ -115,7 +115,7 @@ CONFIG_MFD_MC13XXX_I2C=y
CONFIG_MFD_WM831X_I2C=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_MC13892=m
+CONFIG_REGULATOR_MC13892=y
CONFIG_MEDIA_SUPPORT=m
# CONFIG_RADIO_ADAPTERS is not set
# CONFIG_MEDIA_TUNER_SIMPLE is not set
@@ -188,12 +188,12 @@ CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_WM831X_STATUS=m
-CONFIG_LEDS_MC13783=m
+CONFIG_LEDS_MC13783=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_WM831X=y
-CONFIG_RTC_DRV_MC13XXX=m
+CONFIG_RTC_DRV_MC13XXX=y
CONFIG_STAGING=y
CONFIG_IIO=m
CONFIG_EXT2_FS=y
diff --git a/patches/linux/4.0/0415-armadeus-apf51-add_apf51_v1-and_v2_device_trees.patch b/patches/linux/5.10/0815-ARM-dts-apf51-apf51dev-rework-device-tree-to-support.patch
similarity index 61%
copy from patches/linux/4.0/0415-armadeus-apf51-add_apf51_v1-and_v2_device_trees.patch
copy to patches/linux/5.10/0815-ARM-dts-apf51-apf51dev-rework-device-tree-to-support.patch
index 22df1f01c..6d1f00730 100644
--- a/patches/linux/4.0/0415-armadeus-apf51-add_apf51_v1-and_v2_device_trees.patch
+++ b/patches/linux/5.10/0815-ARM-dts-apf51-apf51dev-rework-device-tree-to-support.patch
@@ -1,262 +1,92 @@
-Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51.dtsi
-===================================================================
---- /dev/null
-+++ linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51.dtsi
-@@ -0,0 +1,182 @@
-+/*
-+ * Copyright 2014 Armadeus Systems - <su...@ar...>
-+ * Copyright 2012 Laurent Cans <lau...@gm...>
-+ *
-+ * Based on mx51-babbage.dts
-+ * Copyright 2011 Freescale Semiconductor, Inc.
-+ * Copyright 2011 Linaro Ltd.
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+#include "imx51.dtsi"
-+
-+/ {
-+ memory {
-+ reg = <0x90000000 0x20000000>;
-+ };
-+
-+ clocks {
-+ osc {
-+ clock-frequency = <33554432>;
-+ };
-+ };
-+
-+ regulators {
-+ compatible = "simple-bus";
-+
-+ reg_usbotg_vbus: usbotg_vbus {
-+ compatible = "regulator-fixed";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usbotgreg>;
-+ regulator-name = "usbotg_vbus";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
-+ enable-active-high;
-+ };
-+ };
-+};
-+
-+&fec {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_fec>;
-+ phy-mode = "mii";
-+ phy-reset-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
-+ phy-reset-duration = <1>;
-+ status = "okay";
-+};
-+
-+&i2c2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c2>;
-+ clock-frequency = <400000>;
-+ status = "okay";
-+};
-+
-+&nfc {
-+ nand-bus-width = <8>;
-+ nand-ecc-mode = "hw";
-+ nand-on-flash-bbt;
-+ status = "okay";
-+};
-+
-+&uart3 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart3>;
-+ status = "okay";
-+};
-+
-+&usbphy1 {
-+ reset-gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
-+};
-+
-+&usbh1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usbh1>;
-+ phy_type = "ulpi";
-+ dr_mode = "host";
-+ ext-clk-en;
-+ status = "okay";
-+};
-+
-+&usbh2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usbh2>;
-+ phy_type = "ulpi";
-+ dr_mode = "host";
-+ ext-clk-en;
-+ status = "okay";
-+};
-+
-+&usbotg {
-+ phy_type = "utmi_wide";
-+ vbus-supply = <®_usbotg_vbus>;
-+ status = "okay";
-+};
-+
-+&iomuxc {
-+ imx51-apf51 {
-+ pinctrl_fec: fecgrp {
-+ fsl,pins = <
-+ MX51_PAD_DI_GP3__FEC_TX_ER 0x80000000
-+ MX51_PAD_DI2_PIN4__FEC_CRS 0x80000000
-+ MX51_PAD_DI2_PIN2__FEC_MDC 0x80000000
-+ MX51_PAD_DI2_PIN3__FEC_MDIO 0x80000000
-+ MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x80000000
-+ MX51_PAD_DI_GP4__FEC_RDATA2 0x80000000
-+ MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x80000000
-+ MX51_PAD_DISP2_DAT1__FEC_RX_ER 0x80000000
-+ MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x80000000
-+ MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x80000000
-+ MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x80000000
-+ MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x80000000
-+ MX51_PAD_DISP2_DAT10__FEC_COL 0x80000000
-+ MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x80000000
-+ MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x80000000
-+ MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x80000000
-+ MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x80000000
-+ MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x80000000
-+ >;
-+ };
-+
-+ pinctrl_i2c2: i2c2grp {
-+ fsl,pins = <
-+ MX51_PAD_EIM_D27__I2C2_SCL 0x400001ed
-+ MX51_PAD_EIM_D24__I2C2_SDA 0x400001ed
-+ >;
-+ };
-+
-+ pinctrl_uart3: uart3grp {
-+ fsl,pins = <
-+ MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
-+ MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
-+ >;
-+ };
-+
-+ pinctrl_usbh1: usbh1grp {
-+ fsl,pins = <
-+ MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
-+ MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
-+ MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
-+ MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
-+ MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
-+ MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
-+ MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
-+ MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
-+ MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5
-+ MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5
-+ MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5
-+ MX51_PAD_USBH1_STP__USBH1_STP 0x1e5
-+ >;
-+ };
-+
-+ pinctrl_usbh2: usbh2grp {
-+ fsl,pins = <
-+ MX51_PAD_EIM_D16__USBH2_DATA0 0x1e5
-+ MX51_PAD_EIM_D17__USBH2_DATA1 0x1e5
-+ MX51_PAD_EIM_D18__USBH2_DATA2 0x1e5
-+ MX51_PAD_EIM_D19__USBH2_DATA3 0x1e5
-+ MX51_PAD_EIM_D20__USBH2_DATA4 0x1e5
-+ MX51_PAD_EIM_D21__USBH2_DATA5 0x1e5
-+ MX51_PAD_EIM_D22__USBH2_DATA6 0x1e5
-+ MX51_PAD_EIM_D23__USBH2_DATA7 0x1e5
-+ MX51_PAD_EIM_A24__USBH2_CLK 0x1e5
-+ MX51_PAD_EIM_A25__USBH2_DIR 0x1e5
-+ MX51_PAD_EIM_A27__USBH2_NXT 0x1e5
-+ MX51_PAD_EIM_A26__USBH2_STP 0x1e5
-+ >;
-+ };
-+
-+ pinctrl_usbotgreg: usbotgreggrp {
-+ fsl,pins = <
-+ MX51_PAD_GPIO1_8__GPIO1_8 0x0c5
-+ >;
-+ };
-+ };
-+};
-Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51-v1.dtsi
-===================================================================
+From af6332e87452068b7c88da5b059f8b87188221cf Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
+ <seb...@ar...>
+Date: Thu, 5 Jan 2023 17:31:02 +0100
+Subject: [PATCH 815/817] ARM: dts: apf51/apf51dev: rework device tree to
+ support APF51v2
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Rework the device trees of the APF51 and APF51Dev boards to support
+the APF51 v2 SoM. The device trees are now as following:
+
+- imx51-apf51.dtsi: common for both APF51 SoM
+- imx51-apf51-v1.dtsi: for APF51 SoM, includes imx51-apf51.dtsi
+- imx51-apf51-v2.dtsi: for APF51v2 SoM, includes imx51-apf51.dtsi
+- imx51-apf51.dts: kept for compatibility, includes imx51-apf51-v1.dtsi
+
+- imx51-apf51dev.dtsi: APF51 Dev board base device tree
+- imx51-apf51dev.dts: APF51 Dev board with APF51 SoM, includes
+ imx51-apf51-v1.dtsi and imx51-apf51dev.dtsi.
+- imx51-apf51v2dev.dts: APF51 Dev board with APF51v2 SoM, includes
+ imx51-apf51-v2.dtsi and imx51-apf51dev.dtsi.
+
+Signed-off-by: Sébastien Szymanski <seb...@ar...>
+---
+ arch/arm/boot/dts/Makefile | 2 +-
+ arch/arm/boot/dts/imx51-apf51-v1.dtsi | 5 +
+ arch/arm/boot/dts/imx51-apf51-v2.dtsi | 96 +++++++++++
+ arch/arm/boot/dts/imx51-apf51.dts | 85 +---------
+ arch/arm/boot/dts/imx51-apf51.dtsi | 94 +++++++++++
+ arch/arm/boot/dts/imx51-apf51dev.dts | 216 +------------------------
+ arch/arm/boot/dts/imx51-apf51dev.dtsi | 202 +++++++++++++++++++++++
+ arch/arm/boot/dts/imx51-apf51v2dev.dts | 12 ++
+ 8 files changed, 419 insertions(+), 293 deletions(-)
+ create mode 100644 arch/arm/boot/dts/imx51-apf51-v1.dtsi
+ create mode 100644 arch/arm/boot/dts/imx51-apf51-v2.dtsi
+ create mode 100644 arch/arm/boot/dts/imx51-apf51.dtsi
+ create mode 100644 arch/arm/boot/dts/imx51-apf51dev.dtsi
+ create mode 100644 arch/arm/boot/dts/imx51-apf51v2dev.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 5e39a06d21ad..1d7caf11f404 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -389,8 +389,8 @@ dtb-$(CONFIG_SOC_IMX50) += \
+ imx50-evk.dtb \
+ imx50-kobo-aura.dtb
+ dtb-$(CONFIG_SOC_IMX51) += \
+- imx51-apf51.dtb \
+ imx51-apf51dev.dtb \
++ imx51-apf51v2dev.dtb \
+ imx51-babbage.dtb \
+ imx51-digi-connectcore-jsk.dtb \
+ imx51-eukrea-mbimxsd51-baseboard.dtb \
+diff --git a/arch/arm/boot/dts/imx51-apf51-v1.dtsi b/arch/arm/boot/dts/imx51-apf51-v1.dtsi
+new file mode 100644
+index 000000000000..a646ea13392a
--- /dev/null
-+++ linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51-v1.dtsi
-@@ -0,0 +1,22 @@
-+/*
-+ * Copyright 2014 Armadeus Systems - <su...@ar...>
-+ * Copyright 2012 Laurent Cans <lau...@gm...>
-+ *
-+ * Based on mx51-babbage.dts
-+ * Copyright 2011 Freescale Semiconductor, Inc.
-+ * Copyright 2011 Linaro Ltd.
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
++++ b/arch/arm/boot/dts/imx51-apf51-v1.dtsi
+@@ -0,0 +1,5 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++//
++// Copyright 2023 Armadeus Systems <su...@ar...>
+
+#include "imx51-apf51.dtsi"
-+
-+/ {
-+ model = "Armadeus Systems APF51 V1 module";
-+ compatible = "armadeus,imx51-apf51", "fsl,imx51";
-+};
-Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51-v2.dtsi
-===================================================================
+diff --git a/arch/arm/boot/dts/imx51-apf51-v2.dtsi b/arch/arm/boot/dts/imx51-apf51-v2.dtsi
+new file mode 100644
+index 000000000000..595a480490e9
--- /dev/null
-+++ linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51-v2.dtsi
-@@ -0,0 +1,69 @@
-+/*
-+ * Copyright 2014 Armadeus Systems - <su...@ar...>
-+ * Copyright 2012 Laurent Cans <lau...@gm...>
-+ *
-+ * Based on mx51-babbage.dts
-+ * Copyright 2011 Freescale Semiconductor, Inc.
-+ * Copyright 2011 Linaro Ltd.
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
++++ b/arch/arm/boot/dts/imx51-apf51-v2.dtsi
+@@ -0,0 +1,96 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++//
++// Copyright 2023 Armadeus Systems <su...@ar...>
+
+#include "imx51-apf51.dtsi"
+
-+/ {
-+ model = "Armadeus Systems APF51 V2 module";
-+ compatible = "armadeus,imx51-apf51", "fsl,imx51";
-+};
-+
+&i2c2 {
-+ pmic: mc13892@09 {
++ pmic: mc13892@9 {
+ compatible = "fsl,mc13892";
-+ reg = <0x09>;
++ reg = <0x9>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pmic>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,mc13xxx-uses-rtc;
+ fsl,mc13xxx-uses-touch;
-+ /* adc makes the board reset so let's disable it for now */
-+ //fsl,mc13xxx-uses-adc;
-+
-+ touchscreen {
-+ ato = <128>;
-+ atox;
-+ };
++ fsl,mc13xxx-uses-adc;
+
+ leds {
+ #address-cells = <1>;
@@ -271,321 +101,77 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51-v2.dtsi
+ };
+
+ regulators {
-+ gpo2_reg: gpo2 { };
-+ gpo3_reg: gpo3 { };
-+ };
-+ };
-+};
-+
-+&iomuxc {
-+ imx51-apf51-v2 {
-+ pinctrl_pmic: pmicgrp {
-+ fsl,pins = <
-+ MX51_PAD_GPIO1_7__GPIO1_7 0x0c5 /* PMIC_IRQ */
-+ >;
-+ };
-+ };
-+};
-Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev-v2.dts
-===================================================================
---- /dev/null
-+++ linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev-v2.dts
-@@ -0,0 +1,19 @@
-+/*
-+ * Copyright 2014 Armadeus Systems - <su...@ar...>
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+#include "imx51-apf51-v2.dtsi"
-+#include "imx51-apf51dev.dtsi"
-+
-+/ {
-+ model = "Armadeus Systems APF51Dev docking/development board with APF51 V2 SOM";
-+ compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51";
-+};
-Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev.dtsi
-===================================================================
---- /dev/null
-+++ linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev.dtsi
-@@ -0,0 +1,252 @@
-+/*
-+ * Copyright 2014 Armadeus Systems - <su...@ar...>
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/ {
-+ backlight@bl1{
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_backlight>;
-+ compatible = "gpio-backlight";
-+ gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
-+ default-on;
-+ };
-+
-+ display@di1 {
-+ compatible = "fsl,imx-parallel-display";
-+ interface-pix-fmt = "bgr666";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ipu_disp1>;
-+
-+ display-timings {
-+ native-mode = <&timing0>;
-+ timing0: lw700 {
-+ clock-frequency = <33000033>;
-+ hactive = <800>;
-+ vactive = <480>;
-+ hback-porch = <96>;
-+ hfront-porch = <96>;
-+ vback-porch = <20>;
-+ vfront-porch = <21>;
-+ hsync-len = <64>;
-+ vsync-len = <4>;
-+ hsync-active = <1>;
-+ vsync-active = <1>;
-+ de-active = <1>;
-+ pixelclk-active = <1>;
++ pmic_reg_vddgp: sw1 {
++ regulator-name = "pmic_reg_vddgp";
++ regulator-min-microvolt = <1050000>;
++ regulator-max-microvolt = <1050000>;
++ regulator-boot-on;
++ regulator-always-on;
+ };
-+ };
+
-+ port {
-+ display_in: endpoint {
-+ remote-endpoint = <&ipu_di0_disp0>;
++ pmic_reg_vcore: sw2 {
++ regulator-name = "pmic_reg_vcore";
++ regulator-min-microvolt = <1225000>;
++ regulator-max-microvolt = <1225000>;
++ regulator-boot-on;
++ regulator-always-on;
+ };
-+ };
-+ };
+
-+ gpio-keys {
-+ compatible = "gpio-keys";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_gpio_keys>;
++ pmic_reg_1v2: sw3 {
++ regulator-name = "pmic_reg_1v2";
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
+
-+ user-key {
-+ label = "user";
-+ gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
-+ linux,code = <256>; /* BTN_0 */
-+ gpio-key,wakeup;
-+ };
-+ };
++ pmic_reg_1v8: sw4 {
++ regulator-name = "pmic_reg_1v8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
+
-+ leds {
-+ compatible = "gpio-leds";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_gpio_leds>;
++ pmic_reg_1v8_ana_pll: vpll {
++ regulator-name = "pmic_reg_1v8_ana_pll";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
+
-+ user {
-+ label = "Heartbeat";
-+ gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
-+ linux,default-trigger = "heartbeat";
++ pmic_reg_vusb: vusb2 {
++ regulator-name = "pmic_reg_vusb";
++ regulator-min-microvolt = <2600000>;
++ regulator-max-microvolt = <2600000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
+ };
+
-+ backlight {
-+ label = "Backlight";
-+ gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
-+ default-state = "on";
++ touchscreen {
++ ato = <128>;
++ atox;
+ };
+ };
+};
+
-+&ecspi1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ecspi1>;
-+ fsl,spi-num-chipselects = <2>;
-+ cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
-+ <&gpio4 25 GPIO_ACTIVE_HIGH>;
-+ status = "okay";
-+};
-+
-+&ecspi2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ecspi2>;
-+ fsl,spi-num-chipselects = <2>;
-+ cs-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>,
-+ <&gpio3 27 GPIO_ACTIVE_LOW>;
-+ status = "okay";
-+
-+ spidev: spidev@1 {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ compatible = "spidev";
-+ spi-max-frequency = <25000000>;
-+ reg = <1>;
-+ };
-+};
-+
-+&esdhc1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_esdhc1>;
-+ cd-gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
-+ bus-width = <4>;
-+ status = "okay";
-+};
-+
-+&esdhc2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_esdhc2 &pinctrl_wifi>;
-+ bus-width = <4>;
-+ status = "okay";
-+};
-+
-+&uart2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart2 &pinctrl_bluetooth>;
-+ fsl,uart-has-rtscts;
-+ status = "okay";
-+};
-+
-+&ipu_di0_disp0 {
-+ remote-endpoint = <&display_in>;
-+};
-+
+&iomuxc {
-+ imx51-apf51dev {
-+ pinctrl_backlight: bl1grp {
-+ fsl,pins = <
-+ MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5
-+ >;
-+ };
-+
-+ pinctrl_bluetooth: bluetoothgrp {
-+ fsl,pins = <
-+ MX51_PAD_EIM_CS3__GPIO2_28 0x0c5
-+ >;
-+ };
-+
-+ pinctrl_ecspi1: ecspi1grp {
-+ fsl,pins = <
-+ MX51_PAD_CSPI1_SS0__GPIO4_24 0x0c5
-+ MX51_PAD_CSPI1_SS1__GPIO4_25 0x0c5
-+ MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
-+ MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
-+ MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
-+ >;
-+ };
-+
-+ pinctrl_ecspi2: ecspi2grp {
-+ fsl,pins = <
-+ MX51_PAD_NANDF_D13__GPIO3_27 0x0c5
-+ MX51_PAD_NANDF_D12__GPIO3_28 0x0c5
-+ MX51_PAD_NANDF_RB3__ECSPI2_MISO 0x185
-+ MX51_PAD_NANDF_D15__ECSPI2_MOSI 0x185
-+ MX51_PAD_NANDF_RB2__ECSPI2_SCLK 0x185
-+ >;
-+ };
-+
-+ pinctrl_esdhc1: esdhc1grp {
-+ fsl,pins = <
-+ MX51_PAD_EIM_CS4__GPIO2_29 0x100
-+ MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
-+ MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
-+ MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
-+ MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
-+ MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
-+ MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
-+ >;
-+ };
-+
-+ pinctrl_esdhc2: esdhc2grp {
-+ fsl,pins = <
-+ MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5
-+ MX51_PAD_SD2_CLK__SD2_CLK 0x20d5
-+ MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5
-+ MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5
-+ MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5
-+ MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5
-+ >;
-+ };
-+
-+ pinctrl_gpio_keys: gpiokeysgrp {
-+ fsl,pins = <
-+ MX51_PAD_GPIO1_3__GPIO1_3 0x0c5
-+ >;
-+ };
-+
-+ pinctrl_gpio_leds: gpioledsgrp {
-+ fsl,pins = <
-+ MX51_PAD_GPIO1_2__GPIO1_2 0x0c5
-+ MX51_PAD_DI1_D1_CS__GPIO3_4 0x0c5
-+ >;
-+ };
-+
-+ pinctrl_ipu_disp1: ipudisp1grp {
-+ fsl,pins = <
-+ MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
-+ MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
-+ MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
-+ MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
-+ MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
-+ MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
-+ MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
-+ MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
-+ MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
-+ MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
-+ MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
-+ MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
-+ MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
-+ MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
-+ MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
-+ MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
-+ MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
-+ MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
-+ MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
-+ MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
-+ MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
-+ MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
-+ MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
-+ MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
-+ MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
-+ MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
-+ >;
-+ };
-+
-+ pinctrl_uart2: uart2grp {
-+ fsl,pins = <
-+ MX51_PAD_UART2_RXD__UART2_RXD 0x1c5
-+ MX51_PAD_UART2_TXD__UART2_TXD 0x1c5
-+ >;
-+ };
-+
-+ pinctrl_wifi: wifigrp {
++ imx51-apf51-v2 {
++ pinctrl_pmic: pmicgrp {
+ fsl,pins = <
-+ MX51_PAD_EIM_EB2__GPIO2_22 0x0c5
-+ MX51_PAD_EIM_EB3__GPIO2_23 0x0c5
++ MX51_PAD_GPIO1_7__GPIO1_7 0x0c5 /* PMIC_IRQ */
+ >;
+ };
+ };
+};
-Index: linux-4.0-rc1/arch/arm/boot/dts/Makefile
-===================================================================
---- linux-4.0-rc1.orig/arch/arm/boot/dts/Makefile
-+++ linux-4.0-rc1/arch/arm/boot/dts/Makefile
-@@ -230,8 +230,8 @@ dtb-$(CONFIG_SOC_IMX35) += \
- dtb-$(CONFIG_SOC_IMX50) += \
- imx50-evk.dtb
- dtb-$(CONFIG_SOC_IMX51) += \
-- imx51-apf51.dtb \
- imx51-apf51dev.dtb \
-+ imx51-apf51dev-v2.dtb \
- imx51-babbage.dtb \
- imx51-digi-connectcore-jsk.dtb \
- imx51-eukrea-mbimxsd51-baseboard.dtb
-Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51.dts
-===================================================================
---- linux-4.0-rc1.orig/arch/arm/boot/dts/imx51-apf51.dts
-+++ /dev/null
-@@ -1,89 +0,0 @@
+diff --git a/arch/arm/boot/dts/imx51-apf51.dts b/arch/arm/boot/dts/imx51-apf51.dts
+index ba28ffe06fe2..a74cc1680dc2 100644
+--- a/arch/arm/boot/dts/imx51-apf51.dts
++++ b/arch/arm/boot/dts/imx51-apf51.dts
+@@ -1,84 +1,5 @@
+ // SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright 2012 Armadeus Systems - <su...@ar...>
- * Copyright 2012 Laurent Cans <lau...@gm...>
@@ -593,15 +179,10 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51.dts
- * Based on mx51-babbage.dts
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
-- *
-- * The code contained herein is licensed under the GNU General Public
-- * License. You may obtain a copy of the GNU General Public License
-- * Version 2 or later at the following locations:
-- *
-- * http://www.opensource.org/licenses/gpl-license.html
-- * http://www.gnu.org/copyleft/gpl.html
- */
--
++//
++// Copyright 2023 Armadeus Systems <su...@ar...>
+
-/dts-v1/;
-#include "imx51.dtsi"
-
@@ -609,7 +190,8 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51.dts
- model = "Armadeus Systems APF51 module";
- compatible = "armadeus,imx51-apf51", "fsl,imx51";
-
-- memory {
+- memory@90000000 {
+- device_type = "memory";
- reg = <0x90000000 0x20000000>;
- };
-
@@ -624,7 +206,7 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51.dts
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec>;
- phy-mode = "mii";
-- phy-reset-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
+- phy-reset-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
- phy-reset-duration = <1>;
- status = "okay";
-};
@@ -675,20 +257,118 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51.dts
- pinctrl-0 = <&pinctrl_uart3>;
- status = "okay";
-};
-Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev.dts
-===================================================================
---- linux-4.0-rc1.orig/arch/arm/boot/dts/imx51-apf51dev.dts
-+++ linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev.dts
-@@ -1,5 +1,5 @@
- /*
++#include "imx51-apf51-v1.dtsi"
+diff --git a/arch/arm/boot/dts/imx51-apf51.dtsi b/arch/arm/boot/dts/imx51-apf51.dtsi
+new file mode 100644
+index 000000000000..b6f39957286b
+--- /dev/null
++++ b/arch/arm/boot/dts/imx51-apf51.dtsi
+@@ -0,0 +1,94 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++/*
++ * Copyright 2014 Armadeus Systems - <su...@ar...>
++ * Copyright 2012 Laurent Cans <lau...@gm...>
++ *
++ * Based on mx51-babbage.dts
++ * Copyright 2011 Freescale Semiconductor, Inc.
++ * Copyright 2011 Linaro Ltd.
++ */
++
++#include "imx51.dtsi"
++
++/ {
++ memory@90000000 {
++ device_type = "memory";
++ reg = <0x90000000 0x20000000>;
++ };
++
++ clocks {
++ osc {
++ clock-frequency = <33554432>;
++ };
++ };
++};
++
++&fec {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_fec>;
++ phy-mode = "mii";
++ phy-reset-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
++ phy-reset-duration = <1>;
++ status = "okay";
++};
++
++&i2c2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c2>;
++ clock-frequency = <400000>;
++ status = "okay";
++};
++
++&nfc {
++ nand-bus-width = <8>;
++ nand-ecc-mode = "hw";
++ nand-on-flash-bbt;
++ status = "okay";
++};
++
++&uart3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart3>;
++ status = "okay";
++};
++
++&iomuxc {
++ imx51-apf51 {
++ pinctrl_fec: fecgrp {
++ fsl,pins = <
++ MX51_PAD_DI_GP3__FEC_TX_ER 0x80000000
++ MX51_PAD_DI2_PIN4__FEC_CRS 0x80000000
++ MX51_PAD_DI2_PIN2__FEC_MDC 0x80000000
++ MX51_PAD_DI2_PIN3__FEC_MDIO 0x80000000
++ MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x80000000
++ MX51_PAD_DI_GP4__FEC_RDATA2 0x80000000
++ MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x80000000
++ MX51_PAD_DISP2_DAT1__FEC_RX_ER 0x80000000
++ MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x80000000
++ MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x80000000
++ MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x80000000
++ MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x80000000
++ MX51_PAD_DISP2_DAT10__FEC_COL 0x80000000
++ MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x80000000
++ MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x80000000
++ MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x80000000
++ MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x80000000
++ MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x80000000
++ >;
++ };
++
++ pinctrl_i2c2: i2c2grp {
++ fsl,pins = <
++ MX51_PAD_EIM_D27__I2C2_SCL 0x400001ed
++ MX51_PAD_EIM_D24__I2C2_SDA 0x400001ed
++ >;
++ };
++
++ pinctrl_uart3: uart3grp {
++ fsl,pins = <
++ MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
++ MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
++ >;
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/imx51-apf51dev.dts b/arch/arm/boot/dts/imx51-apf51dev.dts
+index c66f274ba4e9..d4fd5ccc0a8a 100644
+--- a/arch/arm/boot/dts/imx51-apf51dev.dts
++++ b/arch/arm/boot/dts/imx51-apf51dev.dts
+@@ -1,217 +1,13 @@
+ // SPDX-License-Identifier: GPL-2.0-or-later
+-/*
- * Copyright 2013 Armadeus Systems - <su...@ar...>
-+ * Copyright 2014 Armadeus Systems - <su...@ar...>
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
-@@ -9,217 +9,11 @@
- * http://www.gnu.org/copyleft/gpl.html
- */
+- */
++//
++// Copyright 2023 Armadeus Systems - <su...@ar...>
-/* APF51Dev is a docking board for the APF51 SOM */
-#include "imx51-apf51.dts"
@@ -698,10 +378,10 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev.dts
/ {
- model = "Armadeus Systems APF51Dev docking/development board";
-+ model = "Armadeus Systems APF51Dev docking/development board with APF51 V1 SOM";
++ model = "Armadeus Systems APF51Dev docking/development board with APF51v1 SoM";
compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51";
--
-- backlight@bl1{
+
+- backlight {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_backlight>;
- compatible = "gpio-backlight";
@@ -709,7 +389,7 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev.dts
- default-on;
- };
-
-- display@di1 {
+- disp1 {
- compatible = "fsl,imx-parallel-display";
- interface-pix-fmt = "bgr666";
- pinctrl-names = "default";
@@ -736,7 +416,7 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev.dts
-
- port {
- display_in: endpoint {
-- remote-endpoint = <&ipu_di0_disp0>;
+- remote-endpoint = <&ipu_di0_disp1>;
- };
- };
- };
@@ -765,16 +445,14 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev.dts
-&ecspi1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1>;
-- fsl,spi-num-chipselects = <2>;
-- cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
-- <&gpio4 25 GPIO_ACTIVE_HIGH>;
+- cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>,
+- <&gpio4 25 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&ecspi2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi2>;
-- fsl,spi-num-chipselects = <2>;
- cs-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>,
- <&gpio3 27 GPIO_ACTIVE_LOW>;
- status = "okay";
@@ -783,7 +461,7 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev.dts
-&esdhc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_esdhc1>;
-- cd-gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
+- cd-gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
- bus-width = <4>;
- status = "okay";
-};
@@ -807,7 +485,7 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev.dts
- pinctrl-0 = <&pinctrl_hog>;
-
- imx51-apf51dev {
-- pinctrl_backlight: bl1grp {
+- pinctrl_backlight: backlightgrp {
- fsl,pins = <
- MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5
- >;
@@ -905,6 +583,235 @@ Index: linux-4.0-rc1/arch/arm/boot/dts/imx51-apf51dev.dts
- };
-};
-
--&ipu_di0_disp0 {
+-&ipu_di0_disp1 {
- remote-endpoint = <&display_in>;
};
+diff --git a/arch/arm/boot/dts/imx51-apf51dev.dtsi b/arch/arm/boot/dts/imx51-apf51dev.dtsi
+new file mode 100644
+index 000000000000..84eec372a4a9
+--- /dev/null
++++ b/arch/arm/boot/dts/imx51-apf51dev.dtsi
+@@ -0,0 +1,202 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++//
++// Copyright 2023 Armadeus Systems - <su...@ar...>
++
++/ {
++ backlight {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_backlight>;
++ compatible = "gpio-backlight";
++ gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
++ default-on;
++ };
++
++ display {
++ compatible = "fsl,imx-parallel-display";
++ interface-pix-fmt = "bgr666";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ipu_disp1>;
++
++ display-timings {
++ native-mode = <&timing0>;
++ timing0: lw700 {
++ clock-frequency = <33000033>;
++ hactive = <800>;
++ vactive = <480>;
++ hback-porch = <96>;
++ hfront-porch = <96>;
++ vback-porch = <20>;
++ vfront-porch = <21>;
++ hsync-len = <64>;
++ vsync-len = <4>;
++ hsync-active = <1>;
++ vsync-active = <1>;
++ de-active = <1>;
++ pixelclk-active = <1>;
++ };
++ };
++
++ port {
++ display_in: endpoint {
++ remote-endpoint = <&ipu_di0_disp1>;
++ };
++ };
++ };
++
++ gpio-keys {
++ compatible = "gpio-keys";
++
++ user-key {
++ label = "user";
++ gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
++ linux,code = <256>; /* BTN_0 */
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ led-user {
++ label = "Heartbeat";
++ gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ };
++ };
++};
++
++&ecspi1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ecspi1>;
++ cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>,
++ <&gpio4 25 GPIO_ACTIVE_LOW>;
++ status = "okay";
++};
++
++&ecspi2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ecspi2>;
++ cs-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>,
++ <&gpio3 27 GPIO_ACTIVE_LOW>;
++ status = "okay";
++};
++
++&esdhc1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_esdhc1>;
++ cd-gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
++ bus-width = <4>;
++ status = "okay";
++};
++
++&esdhc2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_esdhc2>;
++ bus-width = <4>;
++ non-removable;
++ status = "okay";
++};
++
++&ipu_di0_disp1 {
++ remote-endpoint = <&display_in>;
++};
++
++&iomuxc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hog>;
++
++ imx51-apf51dev {
++ pinctrl_backlight: backlightgrp {
++ fsl,pins = <
++ MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5
++ >;
++ };
++
++ pinctrl_hog: hoggrp {
++ fsl,pins = <
++ MX51_PAD_EIM_EB2__GPIO2_22 0x0C5
++ MX51_PAD_EIM_EB3__GPIO2_23 0x0C5
++ MX51_PAD_EIM_CS4__GPIO2_29 0x100
++ MX51_PAD_NANDF_D13__GPIO3_27 0x0C5
++ MX51_PAD_NANDF_D12__GPIO3_28 0x0C5
++ MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5
++ MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5
++ MX51_PAD_GPIO1_2__GPIO1_2 0x0C5
++ MX51_PAD_GPIO1_3__GPIO1_3 0x0C5
++ >;
++ };
++
++ pinctrl_ecspi1: ecspi1grp {
++ fsl,pins = <
++ MX51_PAD_CSPI1_SS0__GPIO4_24 0x0c5
++ MX51_PAD_CSPI1_SS1__GPIO4_25 0x0c5
++ MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
++ MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
++ MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
++ >;
++ };
++
++ pinctrl_ecspi2: ecspi2grp {
++ fsl,pins = <
++ MX51_PAD_NANDF_D13__GPIO3_27 0x0c5
++ MX51_PAD_NANDF_D12__GPIO3_28 0x0c5
++ MX51_PAD_NANDF_RB3__ECSPI2_MISO 0x185
++ MX51_PAD_NANDF_D15__ECSPI2_MOSI 0x185
++ MX51_PAD_NANDF_RB2__ECSPI2_SCLK 0x185
++ >;
++ };
++
++ pinctrl_esdhc1: esdhc1grp {
++ fsl,pins = <
++ MX51_PAD_EIM_CS4__GPIO2_29 0x100
++ MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
++ MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
++ MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
++ MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
++ MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
++ MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
++ >;
++ };
++
++ pinctrl_esdhc2: esdhc2grp {
++ fsl,pins = <
++ MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5
++ MX51_PAD_SD2_CLK__SD2_CLK 0x20d5
++ MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5
++ MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5
++ MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5
++ MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5
++ >;
++ };
++
++ pinctrl_ipu_disp1: ipudisp1grp {
++ fsl,pins = <
++ MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
++ MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
++ MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
++ MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
++ MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
++ MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
++ MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
++ MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
++ MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
++ MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
++ MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
++ MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
++ MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
++ MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
++ MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
++ MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
++ MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
++ MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
++ MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
++ MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
++ MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
++ MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
++ MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
++ MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
++ MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
++ MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
++ >;
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/imx51-apf51v2dev.dts b/arch/arm/boot/dts/imx51-apf51v2dev.dts
+new file mode 100644
+index 000000000000..c2d42b864b79
+--- /dev/null
++++ b/arch/arm/boot/dts/imx51-apf51v2dev.dts
+@@ -0,0 +1,12 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++//
++// Copyright 2023 Armadeus Systems - <su...@ar...>
++
++/dts-v1/;
++#include "imx51-apf51-v2.dtsi"
++#include "imx51-apf51dev.dtsi"
++
++/ {
++ model = "Armadeus Systems APF51Dev docking/development board with APF51v2 SoM";
++ compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51";
++};
+--
+2.38.2
+
diff --git a/patches/linux/5.10/0816-ARM-dts-apf51dev-add-pinctrl-properties-to-gpio-key.patch b/patches/linux/5.10/0816-ARM-dts-apf51dev-add-pinctrl-properties-to-gpio-key.patch
new file mode 100644
index 000000000..55e59244f
--- /dev/null
+++ b/patches/linux/5.10/0816-ARM-dts-apf51dev-add-pinctrl-properties-to-gpio-key.patch
@@ -0,0 +1,58 @@
+From 5a45e39a34adad5f56b34ade98a802eb7c147b47 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
+ <seb...@ar...>
+Date: Thu, 5 Jan 2023 17:52:39 +0100
+Subject: [PATCH 816/817] ARM: dts: apf51dev: add pinctrl properties to
+ gpio-key
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Sébastien Szymanski <seb...@ar...>
+---
+ arch/arm/boot/dts/imx51-apf51dev.dtsi | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/imx51-apf51dev.dtsi b/arch/arm/boot/dts/imx51-apf51dev.dtsi
+index 84eec372a4a9..104fe769abc7 100644
+--- a/arch/arm/boot/dts/imx51-apf51dev.dtsi
++++ b/arch/arm/boot/dts/imx51-apf51dev.dtsi
+@@ -45,11 +45,14 @@ display_in: endpoint {
+
+ gpio-keys {
+ compatible = "gpio-keys";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_gpio_keys>;
+
+ user-key {
+ label = "user";
+ gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ linux,code = <256>; /* BTN_0 */
++ gpio-key,wakeup;
+ };
+ };
+
+@@ -121,7 +124,6 @@ MX51_PAD_NANDF_D12__GPIO3_28 0x0C5
+ MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5
+ MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5
+ MX51_PAD_GPIO1_2__GPIO1_2 0x0C5
+- MX51_PAD_GPIO1_3__GPIO1_3 0x0C5
+ >;
+ };
+
+@@ -168,6 +170,12 @@ MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5
+ >;
+ };
+
++ pinctrl_gpio_keys: gpiokeysgrp {
++ fsl,pins = <
++ MX51_PAD_GPIO1_3__GPIO1_3 0x0c5
++ >;
++ };
++
+ pinctrl_ipu_disp1: ipudisp1grp {
+ fsl,pins = <
+ MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
+--
+2.38.2
+
diff --git a/patches/linux/5.10/0817-ARM-dts-apf51dev-add-pinctrl-properties-to-gpio-led.patch b/patches/linux/5.10/0817-ARM-dts-apf51dev-add-pinctrl-properties-to-gpio-led.patch
new file mode 100644
index 000000000..405e3fe7e
--- /dev/null
+++ b/patches/linux/5.10/0817-ARM-dts-apf51dev-add-pinctrl-properties-to-gpio-led.patch
@@ -0,0 +1,52 @@
+From feb840f85f569052782c42294219a627e8f9d3f3 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
+ <seb...@ar...>
+Date: Thu, 5 Jan 2023 17:54:23 +0100
+Subject: [PATCH 817/817] ARM: dts: apf51dev: add pinctrl properties to
+ gpio-led
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Sébastien Szymanski <seb...@ar...>
+---
+ arch/arm/boot/dts/imx51-apf51dev.dtsi | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/imx51-apf51dev.dtsi b/arch/arm/boot/dts/imx51-apf51dev.dtsi
+index 104fe769abc7..646e751a27a5 100644
+--- a/arch/arm/boot/dts/imx51-apf51dev.dtsi
++++ b/arch/arm/boot/dts/imx51-apf51dev.dtsi
+@@ -58,6 +58,8 @@ user-key {
+
+ leds {
+ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ led-user {
+ label = "Heartbeat";
+@@ -123,7 +125,6 @@ MX51_PAD_NANDF_D13__GPIO3_27 0x0C5
+ MX51_PAD_NANDF_D12__GPIO3_28 0x0C5
+ MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5
+ MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5
+- MX51_PAD_GPIO1_2__GPIO1_2 0x0C5
+ >;
+ };
+
+@@ -176,6 +177,12 @@ MX51_PAD_GPIO1_3__GPIO1_3 0x0c5
+ >;
+ };
+
++ pinctrl_gpio_leds: gpioledsgrp {
++ fsl,pins = <
++ MX51_PAD_GPIO1_2__GPIO1_2 0x0c5
++ >;
++ };
++
+ pinctrl_ipu_disp1: ipudisp1grp {
+ fsl,pins = <
+ MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
+--
+2.38.2
+
hooks/post-receive
--
armadeus
|