[Armadeus-commitlog] armadeus branch, master, updated. armadeus-7.0-330-gbcb88e7e3
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-7.0-330-gbcb88e7e3
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From: Sébastien S. <ss...@us...> - 2022-04-26 12:41:16
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This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via bcb88e7e3f439875edc39607bd1e66e438b08fc3 (commit)
from c62e1930f7df5147d662fd2ff148a15c8e8cbdf7 (commit)
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- Log -----------------------------------------------------------------
commit bcb88e7e3f439875edc39607bd1e66e438b08fc3
Author: Sébastien Szymanski <seb...@ar...>
Date: Tue Apr 26 14:38:36 2022 +0200
[BUILDROOT] opos8mmdev: add PI connector (J3) support
-----------------------------------------------------------------------
Summary of changes:
buildroot/configs/opos8mm-legacy-5.10_defconfig | 2 +-
...4-dts-opos8mm-add-PI-connector-J3-devices.patch | 178 +++++++++++++++++++++
2 files changed, 179 insertions(+), 1 deletion(-)
create mode 100644 patches/linux/5.4.imx_legacy/0547-arm64-dts-opos8mm-add-PI-connector-J3-devices.patch
diff --git a/buildroot/configs/opos8mm-legacy-5.10_defconfig b/buildroot/configs/opos8mm-legacy-5.10_defconfig
index c18a46d64..f0af3d0f4 100644
--- a/buildroot/configs/opos8mm-legacy-5.10_defconfig
+++ b/buildroot/configs/opos8mm-legacy-5.10_defconfig
@@ -23,7 +23,7 @@ BR2_TARGET_ARMADEUS_SDRAM_SIZE="1024"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_GIT=y
BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git://git.code.sf.net/p/armadeus/linux"
-BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="17fca1cefc03afe15dcc0eed41df923c4f1bd80b"
+BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="b2b967715afac4607ad5b44e07e2e5631cc8cad0"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-legacy-5.10_defconfig"
BR2_LINUX_KERNEL_DTS_SUPPORT=y
diff --git a/patches/linux/5.4.imx_legacy/0547-arm64-dts-opos8mm-add-PI-connector-J3-devices.patch b/patches/linux/5.4.imx_legacy/0547-arm64-dts-opos8mm-add-PI-connector-J3-devices.patch
new file mode 100644
index 000000000..284165d02
--- /dev/null
+++ b/patches/linux/5.4.imx_legacy/0547-arm64-dts-opos8mm-add-PI-connector-J3-devices.patch
@@ -0,0 +1,178 @@
+From 5f50af9099d18fbf07e3403a2258bfe9e7874c0f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
+ <seb...@ar...>
+Date: Tue, 26 Apr 2022 13:21:05 +0200
+Subject: [PATCH 1/1] arm64: dts: opos8mm: add PI connector (J3) devices
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Sébastien Szymanski <seb...@ar...>
+---
+ .../boot/dts/freescale/imx8mm-opos8mmdev.dts | 87 +++++++++++++++++++
+ 1 file changed, 87 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/freescale/imx8mm-opos8mmdev.dts b/arch/arm64/boot/dts/freescale/imx8mm-opos8mmdev.dts
+index 979032820561b..79cb951d3ad92 100644
+--- a/arch/arm64/boot/dts/freescale/imx8mm-opos8mmdev.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mm-opos8mmdev.dts
+@@ -152,6 +152,25 @@
+ };
+ };
+
++&ecspi1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ecspi1>;
++ cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>, <&gpio1 6 GPIO_ACTIVE_LOW>;
++ status = "okay";
++
++ spi@0 {
++ compatible = "spidev";
++ reg = <0>;
++ spi-max-frequency = <5000000>;
++ };
++
++ spi@1 {
++ compatible = "spidev";
++ reg = <1>;
++ spi-max-frequency = <5000000>;
++ };
++};
++
+ &ecspi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi2>;
+@@ -236,6 +255,13 @@
+ };
+ };
+
++&i2c4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c4>;
++ clock-frequency = <384000>;
++ status = "okay";
++};
++
+ &lcdif {
+ status = "okay";
+ };
+@@ -290,6 +316,12 @@
+ status = "okay";
+ };
+
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>;
++ status = "okay";
++};
++
+ &sai5 {
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default";
+@@ -305,6 +337,12 @@
+ status = "okay";
+ };
+
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart1>;
++ status = "okay";
++};
++
+ /* console */
+ &uart4 {
+ pinctrl-names = "default";
+@@ -346,6 +384,9 @@
+ };
+
+ &iomuxc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_gpios>;
++
+ pinctrl_backlight: backlightgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x10
+@@ -361,6 +402,16 @@
+ >;
+ };
+
++ pinctrl_ecspi1: ecspi1grp {
++ fsl,pins = <
++ MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x10
++ MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x90
++ MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x90
++ MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x90
++ MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x90
++ >;
++ };
++
+ pinctrl_ecspi2: ecspi2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x10
+@@ -382,6 +433,23 @@
+ >;
+ };
+
++ pinctrl_gpios: gpiosgrp {
++ fsl,pins = <
++ MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x90
++ MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x90
++ MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x90
++ MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x90
++ MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x90
++ MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x90
++ MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x90
++ MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x90
++ MX8MM_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x90
++ MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x90
++ MX8MM_IOMUXC_UART3_RXD_GPIO5_IO26 0x90
++ MX8MM_IOMUXC_UART3_TXD_GPIO5_IO27 0x90
++ >;
++ };
++
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000082
+@@ -396,6 +464,12 @@
+ >;
+ };
+
++ pinctrl_i2c4: i2c4grp {
++ fsl,pins = <
++ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000082
++ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000082
++ >;
++ };
+
+ pinctrl_imx219_regs: imx219regsgrp {
+ fsl,pins = <
+@@ -418,6 +492,12 @@
+ >;
+ };
+
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX8MM_IOMUXC_GPIO1_IO14_PWM3_OUT 0x10
++ >;
++ };
++
+ pinctrl_touchscreen: touchscreengrp {
+ fsl,pins = <
+ /* TOUCH_RST */
+@@ -437,6 +517,13 @@
+ >;
+ };
+
++ pinctrl_uart1: uart1grp {
++ fsl,pins = <
++ MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x90
++ MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x90
++ >;
++ };
++
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x0E
+--
+2.35.1
+
hooks/post-receive
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armadeus
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