[Armadeus-commitlog] UNNAMED PROJECT branch, opos6ul-2018.05, updated. 175d7b94a15d705cccbd6bad4f2
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From: Sébastien S. <ss...@us...> - 2020-02-13 18:06:49
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- Log -----------------------------------------------------------------
commit 175d7b94a15d705cccbd6bad4f214fea40383cef
Author: Sébastien Szymanski <seb...@ar...>
Date: Thu Feb 13 18:47:22 2020 +0100
ARM: dts: opos6ulsp{,dev}: update with latest schemas
-----------------------------------------------------------------------
Summary of changes:
arch/arm/dts/imx6ul-imx6ull-opos6ulsp.dtsi | 28 +++++-----------
arch/arm/dts/imx6ul-imx6ull-opos6ulspdev.dtsi | 46 ++++++++++++++-------------
2 files changed, 32 insertions(+), 42 deletions(-)
diff --git a/arch/arm/dts/imx6ul-imx6ull-opos6ulsp.dtsi b/arch/arm/dts/imx6ul-imx6ull-opos6ulsp.dtsi
index e951fd97cf..aef07954bb 100644
--- a/arch/arm/dts/imx6ul-imx6ull-opos6ulsp.dtsi
+++ b/arch/arm/dts/imx6ul-imx6ull-opos6ulsp.dtsi
@@ -47,6 +47,7 @@
/ {
memory@80000000 {
+ device_type = "memory";
reg = <0x80000000 0>; /* will be filled by U-Boot */
};
@@ -88,10 +89,10 @@
};
};
-&i2c3 {
+&i2c4 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3>;
- clock_frequency = <400000>;
+ pinctrl-0 = <&pinctrl_i2c4>;
+ clock-frequency = <400000>;
status = "okay";
eeprom@50 {
@@ -107,12 +108,6 @@
status = "okay";
};
-&uart5 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart5>;
- status = "okay";
-};
-
/* eMMC */
&usdhc1 {
u-boot,dm-spl;
@@ -127,7 +122,7 @@
&weim {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_weim>;
- ranges = <0 0 0x08000000 0x08000000>;
+ ranges = <0 0 0x50000000 0x08000000>;
status = "okay";
fpga@0,0 {
@@ -163,10 +158,10 @@
>;
};
- pinctrl_i2c3: i2c3grp {
+ pinctrl_i2c4: i2c4grp {
fsl,pins = <
- MX6UL_PAD_ENET2_RX_DATA1__I2C3_SDA 0x4001b8b0
- MX6UL_PAD_ENET2_RX_DATA0__I2C3_SCL 0x4001b8b0
+ MX6UL_PAD_ENET2_TX_DATA0__I2C4_SDA 0x4001b8b0
+ MX6UL_PAD_ENET2_RX_EN__I2C4_SCL 0x4001b8b0
>;
};
@@ -178,13 +173,6 @@
>;
};
- pinctrl_uart5: uart5grp {
- fsl,pins = <
- MX6UL_PAD_GPIO1_IO04__UART5_DCE_TX 0x1b0b1
- MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX 0x1b0b1
- >;
- };
-
pinctrl_usdhc1: usdhc1grp {
u-boot,dm-spl;
fsl,pins = <
diff --git a/arch/arm/dts/imx6ul-imx6ull-opos6ulspdev.dtsi b/arch/arm/dts/imx6ul-imx6ull-opos6ulspdev.dtsi
index 63d9fbca88..720708f664 100644
--- a/arch/arm/dts/imx6ul-imx6ull-opos6ulspdev.dtsi
+++ b/arch/arm/dts/imx6ul-imx6ull-opos6ulspdev.dtsi
@@ -50,9 +50,9 @@
stdout-path = &uart1;
};
- backlight {
+ backlight: backlight {
compatible = "pwm-backlight";
- pwms = <&pwm2 0 191000>;
+ pwms = <&pwm6 0 191000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
power-supply = <®_5v>;
@@ -93,10 +93,10 @@
};
};
-&i2c4 {
+&i2c3 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c4>;
- clock_frequency = <400000>;
+ pinctrl-0 = <&pinctrl_i2c3>;
+ clock-frequency = <400000>;
status = "okay";
};
@@ -145,9 +145,15 @@
};
};
-&pwm2 {
+&pwm6 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm2>;
+ pinctrl-0 = <&pinctrl_pwm6>;
+ status = "okay";
+};
+
+&pwm7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm7>;
status = "okay";
};
@@ -200,27 +206,17 @@
pinctrl_gpios: gpiosgrp {
fsl,pins = <
- MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x1b0b0
MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12 0x1b0b0
MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14 0x1b0b0
MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0
MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x1b0b0
- MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0
- MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0
- MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x1b0b0
- MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0
- MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
- MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x1b0b0
- MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x1b0b0
- MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x1b0b0
- MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
>;
};
- pinctrl_i2c4: i2c4grp {
+ pinctrl_i2c3: i2c3grp {
fsl,pins = <
- MX6UL_PAD_ENET2_RX_EN__I2C4_SCL 0x4001b8b0
- MX6UL_PAD_ENET2_TX_DATA0__I2C4_SDA 0x4001b8b0
+ MX6UL_PAD_ENET2_RX_DATA0__I2C3_SCL 0x4001b8b0
+ MX6UL_PAD_ENET2_RX_DATA1__I2C3_SDA 0x4001b8b0
>;
};
@@ -251,9 +247,15 @@
>;
};
- pinctrl_pwm2: pwm2grp {
+ pinctrl_pwm6: pwm6grp {
+ fsl,pins = <
+ MX6UL_PAD_JTAG_TDI__PWM6_OUT 0x1b0b0
+ >;
+ };
+
+ pinctrl_pwm7: pwm7grp {
fsl,pins = <
- MX6UL_PAD_GPIO1_IO09__PWM2_OUT 0x1b0b0
+ MX6UL_PAD_JTAG_TCK__PWM7_OUT 0x1b0b0
>;
};
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UNNAMED PROJECT
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