[Armadeus-commitlog] armadeus branch, master, updated. armadeus-7.0-85-g74117da62
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-7.0-85-g74117da62
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From: Sébastien S. <ss...@us...> - 2019-06-19 10:24:35
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- Log -----------------------------------------------------------------
commit 74117da62d51b3b257549a0e9d9eb842cf9c9dba
Author: Sébastien Szymanski <seb...@ar...>
Date: Wed Jun 19 12:23:37 2019 +0200
[LINUX] 4.19: dts: imx6ul: fix PWM[1-4] interrupts
-----------------------------------------------------------------------
Summary of changes:
...113-ARM-dts-imx6ul-fix-PWM-1-4-interrupts.patch | 61 ++++++++++++++++++++++
1 file changed, 61 insertions(+)
create mode 100644 patches/linux/4.19/0113-ARM-dts-imx6ul-fix-PWM-1-4-interrupts.patch
diff --git a/patches/linux/4.19/0113-ARM-dts-imx6ul-fix-PWM-1-4-interrupts.patch b/patches/linux/4.19/0113-ARM-dts-imx6ul-fix-PWM-1-4-interrupts.patch
new file mode 100644
index 000000000..d80bd7050
--- /dev/null
+++ b/patches/linux/4.19/0113-ARM-dts-imx6ul-fix-PWM-1-4-interrupts.patch
@@ -0,0 +1,61 @@
+From ab040fee0e097eeeadafa26d3899d0435b4bc424 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
+ <seb...@ar...>
+Date: Tue, 18 Jun 2019 17:42:14 +0200
+Subject: [PATCH 1/1] ARM: dts: imx6ul: fix PWM[1-4] interrupts
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt
+summary", the interrupts for the PWM[1-4] go from 83 to 86.
+
+Fixes: b9901fe84f02 ("ARM: dts: imx6ul: add pwm[1-4] nodes")
+Signed-off-by: Sébastien Szymanski <seb...@ar...>
+---
+ arch/arm/boot/dts/imx6ul.dtsi | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
+index bbf010c73336..a7f6d1d58e20 100644
+--- a/arch/arm/boot/dts/imx6ul.dtsi
++++ b/arch/arm/boot/dts/imx6ul.dtsi
+@@ -358,7 +358,7 @@
+ pwm1: pwm@2080000 {
+ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
+ reg = <0x02080000 0x4000>;
+- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
++ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_PWM1>,
+ <&clks IMX6UL_CLK_PWM1>;
+ clock-names = "ipg", "per";
+@@ -369,7 +369,7 @@
+ pwm2: pwm@2084000 {
+ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
+ reg = <0x02084000 0x4000>;
+- interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
++ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_PWM2>,
+ <&clks IMX6UL_CLK_PWM2>;
+ clock-names = "ipg", "per";
+@@ -380,7 +380,7 @@
+ pwm3: pwm@2088000 {
+ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
+ reg = <0x02088000 0x4000>;
+- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
++ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_PWM3>,
+ <&clks IMX6UL_CLK_PWM3>;
+ clock-names = "ipg", "per";
+@@ -391,7 +391,7 @@
+ pwm4: pwm@208c000 {
+ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
+ reg = <0x0208c000 0x4000>;
+- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
++ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_PWM4>,
+ <&clks IMX6UL_CLK_PWM4>;
+ clock-names = "ipg", "per";
+--
+2.21.0
+
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