[Armadeus-commitlog] armadeus branch, master, updated. armadeus-6.0-402-g4921341
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-6.0-402-g4921341
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From: Sébastien S. <ss...@us...> - 2018-04-20 06:57:16
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The branch, master has been updated
via 4921341a682ec943ff73ccccdbd91b2f54e056a3 (commit)
via 5c43c4f251647fd48100c0bc6f7a376bbe077c85 (commit)
via e369271b463395ed11da429e4dda977303c48eba (commit)
via 01aa4762ae14c3afc7bdfde2f4050ba4cc77c6d4 (commit)
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- Log -----------------------------------------------------------------
commit 4921341a682ec943ff73ccccdbd91b2f54e056a3
Author: Sébastien Szymanski <seb...@ar...>
Date: Fri Apr 20 09:06:12 2018 +0200
[UBOOT] opos6ul: bump to 2018.05-rc2
commit 5c43c4f251647fd48100c0bc6f7a376bbe077c85
Author: Sébastien Szymanski <seb...@ar...>
Date: Fri Apr 20 08:44:15 2018 +0200
[LINUX] opos6ul: bump to 4.17-rc1
commit e369271b463395ed11da429e4dda977303c48eba
Author: Sébastien Szymanski <seb...@ar...>
Date: Fri Apr 20 08:18:20 2018 +0200
[BUILDROOT] fix URL for -rc kernel
commit 01aa4762ae14c3afc7bdfde2f4050ba4cc77c6d4
Author: Sébastien Szymanski <seb...@ar...>
Date: Fri Apr 20 08:16:21 2018 +0200
[BUILDROOT] 2017.02: rootfs: just disable ext4 64bit feature
-----------------------------------------------------------------------
Summary of changes:
buildroot/configs/opos6ul_defconfig | 14 +-
.../opos6ul-linux-4.17.config} | 1 -
...mke2img-use-mkfs-to-generate-rootfs-image.patch | 4 +-
...ux-Fix-URL-for-release-candidate-versions.patch | 43 +
patches/buildroot/2017.02/cleanup_buildroot.sh | 6 +-
...6ul-rework-device-tree-to-support-i.MX6U.patch} | 912 ++++++++++-----------
...req-imx6q-check-speed-grades-for-i.MX6ULL.patch | 79 ++
...0102-ARM-dts-imx6ull-add-operating-points.patch | 51 ++
...ARM-dts-opos6uldev-fix-pixel-clk-polarity.patch | 30 +
.../0505-armadeus-add_mcp7940x_rtc_driver.patch | 0
...s-remove-spidev-oops-warning-at-load-time.patch | 0
.../0703-armadeus-mxs-uart-add-rs485-support.patch | 0
...armadeus-dts-opos6uldev-LQ043-LCD-support.patch | 12 +-
...rmadeus-dts-opos6uldev-add-csi-pin-muxing.patch | 8 +-
...3-armadeus-brcmfmac-increase-boot-timeout.patch | 0
15 files changed, 674 insertions(+), 486 deletions(-)
copy buildroot/target/device/armadeus/{opos6ulnano/opos6ulnano-linux-4.9.config => opos6ul/opos6ul-linux-4.17.config} (99%)
create mode 100644 patches/buildroot/2017.02/231-linux-Fix-URL-for-release-candidate-versions.patch
copy patches/linux/{4.14/0805-armadeus-dts-opos6ul-rework-to-support-imx6ull.patch => 4.17-rc1/0100-ARM-dts-opos6ul-rework-device-tree-to-support-i.MX6U.patch} (88%)
create mode 100644 patches/linux/4.17-rc1/0101-cpufreq-imx6q-check-speed-grades-for-i.MX6ULL.patch
create mode 100644 patches/linux/4.17-rc1/0102-ARM-dts-imx6ull-add-operating-points.patch
create mode 100644 patches/linux/4.17-rc1/0103-ARM-dts-opos6uldev-fix-pixel-clk-polarity.patch
copy patches/linux/{4.14 => 4.17-rc1}/0505-armadeus-add_mcp7940x_rtc_driver.patch (100%)
copy patches/linux/{4.14 => 4.17-rc1}/0514-armadeus-remove-spidev-oops-warning-at-load-time.patch (100%)
copy patches/linux/{4.14 => 4.17-rc1}/0703-armadeus-mxs-uart-add-rs485-support.patch (100%)
copy patches/linux/{4.14 => 4.17-rc1}/0800-armadeus-dts-opos6uldev-LQ043-LCD-support.patch (70%)
copy patches/linux/{4.14 => 4.17-rc1}/0800-armadeus-dts-opos6uldev-add-csi-pin-muxing.patch (79%)
copy patches/linux/{4.14 => 4.17-rc1}/0803-armadeus-brcmfmac-increase-boot-timeout.patch (100%)
diff --git a/buildroot/configs/opos6ul_defconfig b/buildroot/configs/opos6ul_defconfig
index ed85481..eea9dc5 100644
--- a/buildroot/configs/opos6ul_defconfig
+++ b/buildroot/configs/opos6ul_defconfig
@@ -23,10 +23,10 @@ BR2_CPU_NAME="imx6ul"
BR2_TARGET_ARMADEUS_SDRAM_SIZE="256"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.19"
-BR2_LINUX_KERNEL_PATCH="../patches/linux/4.14"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.17-rc1"
+BR2_LINUX_KERNEL_PATCH="../patches/linux/4.17-rc1"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
-BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-4.14.config"
+BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-4.17.config"
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx6ul-opos6uldev imx6ull-opos6uldev"
BR2_LINUX_KERNEL_INSTALL_TARGET=y
@@ -132,9 +132,11 @@ BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
BR2_TARGET_UBOOT_CUSTOM_GIT=y
BR2_TARGET_UBOOT_CUSTOM_REPO_URL="git://git.code.sf.net/p/armadeus/u-boot"
-BR2_TARGET_UBOOT_CUSTOM_REPO_VERSION="e026b020579847d2088df445a1ec43f17b45f981"
-BR2_TARGET_UBOOT_BOARD_DEFCONFIG="opos6ul"
-BR2_TARGET_UBOOT_FORMAT_IMG=y
+BR2_TARGET_UBOOT_CUSTOM_REPO_VERSION="c531e4a7e1ceb2f32ff8c73e6c4ddeb02ed51724"
+BR2_TARGET_UBOOT_BOARD_DEFCONFIG="opos6uldev"
+BR2_TARGET_UBOOT_NEEDS_DTC=y
+# BR2_TARGET_UBOOT_FORMAT_BIN is not set
+BR2_TARGET_UBOOT_FORMAT_DTB_IMG=y
BR2_TARGET_UBOOT_SPL=y
BR2_TARGET_UBOOT_SPL_NAME="SPL"
BR2_PACKAGE_HOST_E2TOOLS=y
diff --git a/buildroot/target/device/armadeus/opos6ulnano/opos6ulnano-linux-4.9.config b/buildroot/target/device/armadeus/opos6ul/opos6ul-linux-4.17.config
similarity index 99%
copy from buildroot/target/device/armadeus/opos6ulnano/opos6ulnano-linux-4.9.config
copy to buildroot/target/device/armadeus/opos6ul/opos6ul-linux-4.17.config
index 19cf0fb..e5b7262 100644
--- a/buildroot/target/device/armadeus/opos6ulnano/opos6ulnano-linux-4.9.config
+++ b/buildroot/target/device/armadeus/opos6ul/opos6ul-linux-4.17.config
@@ -32,7 +32,6 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_ARM_IMX6Q_CPUFREQ=y
-CONFIG_CPU_IDLE=y
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_BINFMT_MISC=m
diff --git a/patches/buildroot/2017.02/227-package-mke2img-use-mkfs-to-generate-rootfs-image.patch b/patches/buildroot/2017.02/227-package-mke2img-use-mkfs-to-generate-rootfs-image.patch
index a30944f..a0c6a53 100644
--- a/patches/buildroot/2017.02/227-package-mke2img-use-mkfs-to-generate-rootfs-image.patch
+++ b/patches/buildroot/2017.02/227-package-mke2img-use-mkfs-to-generate-rootfs-image.patch
@@ -68,7 +68,7 @@ Index: buildroot/package/mke2img/mke2img
fi
+ # Disable some defaults features
-+ mkfs_O_opts+=",^ext_attr,^64bit,^flex_bg,^large_file,^huge_file,^dir_nlink,^extra_isize"
++ mkfs_O_opts+=",^64bit"
+
# Add our -O options (there will be at most one leading comma, remove it)
- if [ -n "${tune2fs_O_opts}" ]; then
@@ -137,7 +137,7 @@ Index: buildroot/package/mke2img/mke2img
- # issues by tremendously slowing down the boot.
- tune2fs -c 0 -i 0 "${image}"
+ # Generate the filesystem
-+ mkfs_opts+=( -d "${root_dir}" -N ${nb_inodes} -T small -F )
++ mkfs_opts+=( -d "${root_dir}" -N ${nb_inodes} -F )
+ if [ -n "${nb_res_blocks}" ]; then
+ mkfs_opts+=( -m ${nb_res_blocks} )
+ fi
diff --git a/patches/buildroot/2017.02/231-linux-Fix-URL-for-release-candidate-versions.patch b/patches/buildroot/2017.02/231-linux-Fix-URL-for-release-candidate-versions.patch
new file mode 100644
index 0000000..5d9b01a
--- /dev/null
+++ b/patches/buildroot/2017.02/231-linux-Fix-URL-for-release-candidate-versions.patch
@@ -0,0 +1,43 @@
+From ff4cccbdcf5417a5a8c251ff302791a306023cc1 Mon Sep 17 00:00:00 2001
+From: Luis Araneda <lua...@gm...>
+Date: Thu, 10 Aug 2017 23:50:35 -0400
+Subject: [PATCH] linux: Fix URL for release candidate versions
+
+Starting with 4.12-rc1, tarballs are generated by cgit directly from
+Linus's tree. This also implies that no .tar.xz can be used for them.
+
+This method also applies to older release candidates.
+
+Signed-off-by: Luis Araneda <lua...@gm...>
+[Arnout: added comment in the code]
+Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <ar...@mi...>
+---
+ linux/linux.mk | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+Index: buildroot/linux/linux.mk
+===================================================================
+--- buildroot.orig/linux/linux.mk
++++ buildroot/linux/linux.mk
+@@ -30,6 +30,10 @@ LINUX_SITE_METHOD = hg
+ else ifeq ($(BR2_LINUX_KERNEL_CUSTOM_SVN),y)
+ LINUX_SITE = $(call qstrip,$(BR2_LINUX_KERNEL_CUSTOM_REPO_URL))
+ LINUX_SITE_METHOD = svn
++else ifneq ($(findstring -rc,$(LINUX_VERSION)),)
++# Since 4.12-rc1, -rc kernels are generated from cgit. This also works for
++# older -rc kernels.
++LINUX_SITE = https://git.kernel.org/torvalds/t
+ else
+ LINUX_SOURCE = linux-$(LINUX_VERSION).tar.xz
+ ifeq ($(BR2_LINUX_KERNEL_CUSTOM_VERSION),y)
+@@ -45,10 +49,6 @@ LINUX_SITE = $(BR2_KERNEL_MIRROR)/linux/
+ else ifeq ($(findstring x4.,x$(LINUX_VERSION)),x4.)
+ LINUX_SITE = $(BR2_KERNEL_MIRROR)/linux/kernel/v4.x
+ endif
+-# release candidates are in testing/ subdir
+-ifneq ($(findstring -rc,$(LINUX_VERSION)),)
+-LINUX_SITE := $(LINUX_SITE)/testing
+-endif # -rc
+ endif
+
+ LINUX_PATCHES = $(call qstrip,$(BR2_LINUX_KERNEL_PATCH))
diff --git a/patches/buildroot/2017.02/cleanup_buildroot.sh b/patches/buildroot/2017.02/cleanup_buildroot.sh
index c83cc6c..442a01b 100755
--- a/patches/buildroot/2017.02/cleanup_buildroot.sh
+++ b/patches/buildroot/2017.02/cleanup_buildroot.sh
@@ -15,8 +15,11 @@ rm -rf buildroot/boot/uboot/Config.in
rm -rf buildroot/boot/uboot/uboot.mk
rm -rf buildroot/linux/Config.ext.in
rm -rf buildroot/linux/linux-ext-xenomai.mk
+rm -rf buildroot/linux/linux.mk
rm -rf buildroot/package/Config.in
-rm -rf buildroot/package/abootimg/
+rm -rf buildroot/package/abootimg/Config.in
+rm -rf buildroot/package/abootimg/abootimg.hash
+rm -rf buildroot/package/abootimg/abootimg.mk
rm -rf buildroot/package/agg/Config.in
rm -rf buildroot/package/agg/agg.mk
rm -rf buildroot/package/alsa-utils/alsa-utils.mk
@@ -44,7 +47,6 @@ rm -rf buildroot/package/expect/expect.mk
rm -rf buildroot/package/fb-test-app/001-fixes-tty-vc-config-on-fb-test-exit.patch
rm -rf buildroot/package/fbgrab/0002-fix-1.3-version.patch
rm -rf buildroot/package/freescale-imx/Config.in
-rm -rf buildroot/package/freescale-imx/imx-lib/imx-lib.mk
rm -rf buildroot/package/gnash/Config.in
rm -rf buildroot/package/gnash/gnash.mk
rm -rf buildroot/package/gnokii/Config.in
diff --git a/patches/linux/4.14/0805-armadeus-dts-opos6ul-rework-to-support-imx6ull.patch b/patches/linux/4.17-rc1/0100-ARM-dts-opos6ul-rework-device-tree-to-support-i.MX6U.patch
similarity index 88%
copy from patches/linux/4.14/0805-armadeus-dts-opos6ul-rework-to-support-imx6ull.patch
copy to patches/linux/4.17-rc1/0100-ARM-dts-opos6ul-rework-device-tree-to-support-i.MX6U.patch
index 8ca3210..c064b5c 100644
--- a/patches/linux/4.14/0805-armadeus-dts-opos6ul-rework-to-support-imx6ull.patch
+++ b/patches/linux/4.17-rc1/0100-ARM-dts-opos6ul-rework-device-tree-to-support-i.MX6U.patch
@@ -1,7 +1,49 @@
-Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
-===================================================================
---- linux-4.14.18.orig/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
-+++ linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
+From b48b0dd7ec2af0ce79b99986bf41a5e5ae0955cb Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
+ <seb...@ar...>
+Date: Wed, 18 Apr 2018 13:48:53 +0200
+Subject: [PATCH 100/103] ARM: dts: opos6ul: rework device tree to support
+ i.MX6ULL
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Rework the device tree of the OPOS6ULDEV board to support the OPOS6UL
+SoM with an i.MX6ULL SoC.
+
+Signed-off-by: Sébastien Szymanski <seb...@ar...>
+---
+ arch/arm/boot/dts/Makefile | 3 +-
+ ...ul-opos6ul.dtsi => imx6ul-imx6ull-opos6ul.dtsi} | 4 +-
+ arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi | 406 +++++++++++++++++++++
+ arch/arm/boot/dts/imx6ul-opos6uldev.dts | 366 +------------------
+ arch/arm/boot/dts/imx6ull-opos6uldev.dts | 56 +++
+ 5 files changed, 470 insertions(+), 365 deletions(-)
+ rename arch/arm/boot/dts/{imx6ul-opos6ul.dtsi => imx6ul-imx6ull-opos6ul.dtsi} (98%)
+ create mode 100644 arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
+ create mode 100644 arch/arm/boot/dts/imx6ull-opos6uldev.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 7e2424957809..eb5ed60b92a2 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -538,7 +538,8 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
+ imx6ul-tx6ul-mainboard.dtb \
+ imx6ull-14x14-evk.dtb \
+ imx6ull-colibri-eval-v3.dtb \
+- imx6ull-colibri-wifi-eval-v3.dtb
++ imx6ull-colibri-wifi-eval-v3.dtb \
++ imx6ull-opos6uldev.dtb
+ dtb-$(CONFIG_SOC_IMX7D) += \
+ imx7d-cl-som-imx7.dtb \
+ imx7d-colibri-emmc-eval-v3.dtb \
+diff --git a/arch/arm/boot/dts/imx6ul-opos6ul.dtsi b/arch/arm/boot/dts/imx6ul-imx6ull-opos6ul.dtsi
+similarity index 98%
+rename from arch/arm/boot/dts/imx6ul-opos6ul.dtsi
+rename to arch/arm/boot/dts/imx6ul-imx6ull-opos6ul.dtsi
+index a031bee311df..a4621f3688e3 100644
+--- a/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
++++ b/arch/arm/boot/dts/imx6ul-imx6ull-opos6ul.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright 2017 Armadeus Systems <su...@ar...>
@@ -16,429 +58,15 @@ Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
-#include "imx6ul.dtsi"
-
/ {
- memory {
+ memory@80000000 {
reg = <0x80000000 0>; /* will be filled by U-Boot */
-Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dts
-===================================================================
---- linux-4.14.18.orig/arch/arm/boot/dts/imx6ul-opos6uldev.dts
-+++ linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dts
-@@ -1,5 +1,5 @@
- /*
-- * Copyright 2017 Armadeus Systems <su...@ar...>
-+ * Copyright 2018 Armadeus Systems <su...@ar...>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
-@@ -46,400 +46,11 @@
- */
-
- /dts-v1/;
-+#include "imx6ul.dtsi"
- #include "imx6ul-opos6ul.dtsi"
-+#include "imx6ul-opos6uldev.dtsi"
-
- / {
-- model = "Armadeus Systems OPOS6UL SoM on OPOS6ULDev board";
-+ model = "Armadeus Systems OPOS6UL SoM (i.MX6UL) on OPOS6ULDev board";
- compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ul";
--
-- chosen {
-- stdout-path = &uart1;
-- };
--
-- backlight {
-- compatible = "pwm-backlight";
-- pwms = <&pwm3 0 191000>;
-- brightness-levels = <0 4 8 16 32 64 128 255>;
-- default-brightness-level = <7>;
-- power-supply = <®_5v>;
-- status = "okay";
-- };
--
-- gpio-keys {
-- compatible = "gpio-keys";
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_gpio_keys>;
--
-- user-button {
-- label = "User button";
-- gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
-- linux,code = <BTN_MISC>;
-- wakeup-source;
-- };
-- };
--
-- leds {
-- compatible = "gpio-leds";
--
-- user-led {
-- label = "User";
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_led>;
-- gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
-- linux,default-trigger = "heartbeat";
-- };
-- };
--
-- onewire {
-- compatible = "w1-gpio";
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_w1>;
-- gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
-- };
--
-- reg_5v: regulator-5v {
-- compatible = "regulator-fixed";
-- regulator-name = "5V";
-- regulator-min-microvolt = <5000000>;
-- regulator-max-microvolt = <5000000>;
-- };
--
-- reg_usbotg1_vbus: regulator-usbotg1vbus {
-- compatible = "regulator-fixed";
-- regulator-name = "usbotg1vbus";
-- regulator-min-microvolt = <5000000>;
-- regulator-max-microvolt = <5000000>;
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usbotg1_vbus>;
-- gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
-- enable-active-high;
-- };
--
-- reg_usbotg2_vbus: regulator-usbotg2vbus {
-- compatible = "regulator-fixed";
-- regulator-name = "usbotg2vbus";
-- regulator-min-microvolt = <5000000>;
-- regulator-max-microvolt = <5000000>;
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usbotg2_vbus>;
-- gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
-- enable-active-high;
-- };
--};
--
--&adc1 {
-- vref-supply = <®_3v3>;
-- status = "okay";
--};
--
--&can1 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_flexcan1>;
-- xceiver-supply = <®_5v>;
-- status = "okay";
--};
--
--&can2 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_flexcan2>;
-- xceiver-supply = <®_5v>;
-- status = "okay";
--};
--
--&ecspi4 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_ecspi4>;
-- cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>;
-- status = "okay";
--
-- spidev0: spi@0 {
-- compatible = "spidev";
-- reg = <0>;
-- spi-max-frequency = <5000000>;
-- };
--
-- spidev1: spi@1 {
-- compatible = "spidev";
-- reg = <1>;
-- spi-max-frequency = <5000000>;
-- };
--};
--
--&i2c1 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_i2c1>;
-- clock_frequency = <400000>;
-- status = "okay";
--};
--
--&i2c2 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_i2c2>;
-- clock_frequency = <400000>;
-- status = "okay";
--};
--
--&lcdif {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_lcdif>;
-- display = <&display0>;
-- lcd-supply = <®_3v3>;
-- status = "okay";
--
-- display0: display0 {
-- bits-per-pixel = <32>;
-- bus-width = <18>;
--
-- display-timings {
-- ST0700 {
-- clock-frequency = <33000033>;
-- hactive = <800>;
-- vactive = <480>;
-- hback-porch = <96>;
-- hfront-porch = <96>;
-- vback-porch = <20>;
-- vfront-porch = <21>;
-- hsync-len = <64>;
-- vsync-len = <4>;
-- de-active = <1>;
-- pixelclk-active = <0>;
-- };
--
-- LQ043 {
-- clock-frequency = <8690000>;
-- hactive = <480>;
-- vactive = <272>;
-- hback-porch = <16>;
-- hfront-porch = <16>;
-- vback-porch = <4>;
-- vfront-porch = <2>;
-- hsync-len = <4>;
-- vsync-len = <4>;
-- hsync-active = <0>;
-- vsync-active = <0>;
-- de-active = <0>;
-- pixelclk-active = <1>;
-- };
-- };
-- };
--};
--
--&pwm3 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_pwm3>;
-- status = "okay";
--};
--
--&snvs_pwrkey {
-- status = "disabled";
--};
--
--&tsc {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_tsc>;
-- xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
-- measure-delay-time = <0xffff>;
-- pre-charge-time = <0xffff>;
-- status = "okay";
--};
--
--&uart1 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_uart1>;
-- status = "okay";
--};
--
--&uart2 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_uart2>;
-- status = "okay";
--};
--
--&usbotg1 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usbotg1_id>;
-- vbus-supply = <®_usbotg1_vbus>;
-- dr_mode = "otg";
-- disable-over-current;
-- status = "okay";
--};
--
--&usbotg2 {
-- vbus-supply = <®_usbotg2_vbus>;
-- dr_mode = "host";
-- disable-over-current;
-- status = "okay";
--};
--
--&iomuxc {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_gpios>;
--
-- pinctrl_csi1: csi1grp {
-- fsl,pins = <
-- MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
-- MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
-- MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
-- MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
-- MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
-- MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
-- MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
-- MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
-- MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
-- MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
-- MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
-- MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
-- >;
-- };
--
-- pinctrl_ecspi4: ecspi4grp {
-- fsl,pins = <
-- MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK 0x1b0b0
-- MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI 0x1b0b0
-- MX6UL_PAD_NAND_DATA06__ECSPI4_MISO 0x1b0b0
-- MX6UL_PAD_NAND_DATA01__GPIO4_IO03 0x1b0b0
-- MX6UL_PAD_NAND_DATA07__GPIO4_IO09 0x1b0b0
-- >;
-- };
--
-- pinctrl_flexcan1: flexcan1grp {
-- fsl,pins = <
-- MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x0b0b0
-- MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x0b0b0
-- >;
-- };
--
-- pinctrl_flexcan2: flexcan2grp {
-- fsl,pins = <
-- MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x0b0b0
-- MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x0b0b0
-- >;
-- };
--
-- pinctrl_gpios: gpiosgrp {
-- fsl,pins = <
-- MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x0b0b0
-- MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x0b0b0
-- MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x0b0b0
-- MX6UL_PAD_NAND_RE_B__GPIO4_IO00 0x0b0b0
-- MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x0b0b0
-- MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x0b0b0
-- MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0b0b0
-- MX6UL_PAD_NAND_WE_B__GPIO4_IO01 0x0b0b0
-- MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0
-- MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
-- MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
-- MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
-- MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
-- MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0
-- MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
-- MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0
-- >;
-- };
--
-- pinctrl_gpio_keys: gpiokeysgrp {
-- fsl,pins = <
-- MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x0b0b0
-- >;
-- };
--
-- pinctrl_i2c1: i2c1grp {
-- fsl,pins = <
-- MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
-- MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
-- >;
-- };
--
-- pinctrl_i2c2: i2c2grp {
-- fsl,pins = <
-- MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
-- MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
-- >;
-- };
--
-- pinctrl_lcdif: lcdifgrp {
-- fsl,pins = <
-- MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x100b1
-- MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x100b1
-- MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x100b1
-- MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x100b1
-- MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x100b1
-- MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x100b1
-- MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x100b1
-- MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x100b1
-- MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x100b1
-- MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x100b1
-- MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x100b1
-- MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x100b1
-- MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x100b1
-- MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x100b1
-- MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x100b1
-- MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x100b1
-- MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x100b1
-- MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x100b1
-- MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x100b1
-- MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x100b1
-- MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x100b1
-- MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x100b1
-- >;
-- };
--
-- pinctrl_led: ledgrp {
-- fsl,pins = <
-- MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x0b0b0
-- >;
-- };
--
-- pinctrl_pwm3: pwm3grp {
-- fsl,pins = <
-- MX6UL_PAD_NAND_ALE__PWM3_OUT 0x1b0b0
-- >;
-- };
--
-- pinctrl_tsc: tscgrp {
-- fsl,pins = <
-- MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
-- MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
-- MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
-- MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
-- >;
-- };
--
-- pinctrl_uart1: uart1grp {
-- fsl,pins = <
-- MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
-- MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
-- >;
-- };
--
-- pinctrl_uart2: uart2grp {
-- fsl,pins = <
-- MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
-- MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
-- >;
-- };
--
-- pinctrl_usbotg1_id: usbotg1idgrp {
-- fsl,pins = <
-- MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x1b0b0
-- >;
-- };
--
-- pinctrl_usbotg1_vbus: usbotg1vbusgrp {
-- fsl,pins = <
-- MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b0b0
-- >;
-- };
--
-- pinctrl_usbotg2_vbus: usbotg2vbusgrp {
-- fsl,pins = <
-- MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
-- >;
-- };
--
-- pinctrl_w1: w1grp {
-- fsl,pins = <
-- MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
-- >;
-- };
- };
-Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dtsi
-===================================================================
---- /dev/null
-+++ linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dtsi
-@@ -0,0 +1,439 @@
-+/*
+diff --git a/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi b/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
+new file mode 100644
+index 000000000000..0b79a246a07f
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
+@@ -0,0 +1,406 @@
++/*
+ * Copyright 2018 Armadeus Systems <su...@ar...>
+ *
+ * This file is dual-licensed: you can use it either under the terms
@@ -625,7 +253,7 @@ Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dtsi
+ bus-width = <18>;
+
+ display-timings {
-+ ST0700 {
++ timing0: timing0 {
+ clock-frequency = <33000033>;
+ hactive = <800>;
+ vactive = <480>;
@@ -638,22 +266,6 @@ Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dtsi
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
-+
-+ LQ043 {
-+ clock-frequency = <8690000>;
-+ hactive = <480>;
-+ vactive = <272>;
-+ hback-porch = <16>;
-+ hfront-porch = <16>;
-+ vback-porch = <4>;
-+ vfront-porch = <2>;
-+ hsync-len = <4>;
-+ vsync-len = <4>;
-+ hsync-active = <0>;
-+ vsync-active = <0>;
-+ de-active = <0>;
-+ pixelclk-active = <1>;
-+ };
+ };
+ };
+};
@@ -709,23 +321,6 @@ Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dtsi
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpios>;
+
-+ pinctrl_csi1: csi1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
-+ MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
-+ MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
-+ MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
-+ MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
-+ MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
-+ MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
-+ MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
-+ MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
-+ MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
-+ MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
-+ MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
-+ >;
-+ };
-+
+ pinctrl_ecspi4: ecspi4grp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK 0x1b0b0
@@ -877,10 +472,394 @@ Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dtsi
+ >;
+ };
+};
-Index: linux-4.14.18/arch/arm/boot/dts/imx6ull-opos6uldev.dts
-===================================================================
+diff --git a/arch/arm/boot/dts/imx6ul-opos6uldev.dts b/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+index 0e59ee57fd55..3ad25a9de4d4 100644
+--- a/arch/arm/boot/dts/imx6ul-opos6uldev.dts
++++ b/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright 2017 Armadeus Systems <su...@ar...>
++ * Copyright 2018 Armadeus Systems <su...@ar...>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+@@ -46,367 +46,11 @@
+ */
+
+ /dts-v1/;
+-#include "imx6ul-opos6ul.dtsi"
++#include "imx6ul.dtsi"
++#include "imx6ul-imx6ull-opos6ul.dtsi"
++#include "imx6ul-imx6ull-opos6uldev.dtsi"
+
+ / {
+- model = "Armadeus Systems OPOS6UL SoM on OPOS6ULDev board";
++ model = "Armadeus Systems OPOS6UL SoM (i.MX6UL) on OPOS6ULDev board";
+ compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ul";
+-
+- chosen {
+- stdout-path = &uart1;
+- };
+-
+- backlight {
+- compatible = "pwm-backlight";
+- pwms = <&pwm3 0 191000>;
+- brightness-levels = <0 4 8 16 32 64 128 255>;
+- default-brightness-level = <7>;
+- power-supply = <®_5v>;
+- status = "okay";
+- };
+-
+- gpio-keys {
+- compatible = "gpio-keys";
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_gpio_keys>;
+-
+- user-button {
+- label = "User button";
+- gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
+- linux,code = <BTN_MISC>;
+- wakeup-source;
+- };
+- };
+-
+- leds {
+- compatible = "gpio-leds";
+-
+- user-led {
+- label = "User";
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_led>;
+- gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
+- linux,default-trigger = "heartbeat";
+- };
+- };
+-
+- onewire {
+- compatible = "w1-gpio";
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_w1>;
+- gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+- };
+-
+- reg_5v: regulator-5v {
+- compatible = "regulator-fixed";
+- regulator-name = "5V";
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- };
+-
+- reg_usbotg1_vbus: regulator-usbotg1vbus {
+- compatible = "regulator-fixed";
+- regulator-name = "usbotg1vbus";
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usbotg1_vbus>;
+- gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+- enable-active-high;
+- };
+-
+- reg_usbotg2_vbus: regulator-usbotg2vbus {
+- compatible = "regulator-fixed";
+- regulator-name = "usbotg2vbus";
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usbotg2_vbus>;
+- gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
+- enable-active-high;
+- };
+-};
+-
+-&adc1 {
+- vref-supply = <®_3v3>;
+- status = "okay";
+-};
+-
+-&can1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_flexcan1>;
+- xceiver-supply = <®_5v>;
+- status = "okay";
+-};
+-
+-&can2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_flexcan2>;
+- xceiver-supply = <®_5v>;
+- status = "okay";
+-};
+-
+-&ecspi4 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_ecspi4>;
+- cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>;
+- status = "okay";
+-
+- spidev0: spi@0 {
+- compatible = "spidev";
+- reg = <0>;
+- spi-max-frequency = <5000000>;
+- };
+-
+- spidev1: spi@1 {
+- compatible = "spidev";
+- reg = <1>;
+- spi-max-frequency = <5000000>;
+- };
+-};
+-
+-&i2c1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_i2c1>;
+- clock_frequency = <400000>;
+- status = "okay";
+-};
+-
+-&i2c2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_i2c2>;
+- clock_frequency = <400000>;
+- status = "okay";
+-};
+-
+-&lcdif {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_lcdif>;
+- display = <&display0>;
+- lcd-supply = <®_3v3>;
+- status = "okay";
+-
+- display0: display0 {
+- bits-per-pixel = <32>;
+- bus-width = <18>;
+-
+- display-timings {
+- timing0: timing0 {
+- clock-frequency = <33000033>;
+- hactive = <800>;
+- vactive = <480>;
+- hback-porch = <96>;
+- hfront-porch = <96>;
+- vback-porch = <20>;
+- vfront-porch = <21>;
+- hsync-len = <64>;
+- vsync-len = <4>;
+- de-active = <1>;
+- pixelclk-active = <0>;
+- };
+- };
+- };
+-};
+-
+-&pwm3 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_pwm3>;
+- status = "okay";
+-};
+-
+-&snvs_pwrkey {
+- status = "disabled";
+-};
+-
+-&tsc {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_tsc>;
+- xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
+- measure-delay-time = <0xffff>;
+- pre-charge-time = <0xffff>;
+- status = "okay";
+-};
+-
+-&uart1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart1>;
+- status = "okay";
+-};
+-
+-&uart2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart2>;
+- status = "okay";
+-};
+-
+-&usbotg1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usbotg1_id>;
+- vbus-supply = <®_usbotg1_vbus>;
+- dr_mode = "otg";
+- disable-over-current;
+- status = "okay";
+-};
+-
+-&usbotg2 {
+- vbus-supply = <®_usbotg2_vbus>;
+- dr_mode = "host";
+- disable-over-current;
+- status = "okay";
+-};
+-
+-&iomuxc {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_gpios>;
+-
+- pinctrl_ecspi4: ecspi4grp {
+- fsl,pins = <
+- MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK 0x1b0b0
+- MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI 0x1b0b0
+- MX6UL_PAD_NAND_DATA06__ECSPI4_MISO 0x1b0b0
+- MX6UL_PAD_NAND_DATA01__GPIO4_IO03 0x1b0b0
+- MX6UL_PAD_NAND_DATA07__GPIO4_IO09 0x1b0b0
+- >;
+- };
+-
+- pinctrl_flexcan1: flexcan1grp {
+- fsl,pins = <
+- MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x0b0b0
+- MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x0b0b0
+- >;
+- };
+-
+- pinctrl_flexcan2: flexcan2grp {
+- fsl,pins = <
+- MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x0b0b0
+- MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x0b0b0
+- >;
+- };
+-
+- pinctrl_gpios: gpiosgrp {
+- fsl,pins = <
+- MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x0b0b0
+- MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x0b0b0
+- MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x0b0b0
+- MX6UL_PAD_NAND_RE_B__GPIO4_IO00 0x0b0b0
+- MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x0b0b0
+- MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x0b0b0
+- MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0b0b0
+- MX6UL_PAD_NAND_WE_B__GPIO4_IO01 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0
+- >;
+- };
+-
+- pinctrl_gpio_keys: gpiokeysgrp {
+- fsl,pins = <
+- MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x0b0b0
+- >;
+- };
+-
+- pinctrl_i2c1: i2c1grp {
+- fsl,pins = <
+- MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+- MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+- >;
+- };
+-
+- pinctrl_i2c2: i2c2grp {
+- fsl,pins = <
+- MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+- MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+- >;
+- };
+-
+- pinctrl_lcdif: lcdifgrp {
+- fsl,pins = <
+- MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x100b1
+- MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x100b1
+- MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x100b1
+- MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x100b1
+- MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x100b1
+- MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x100b1
+- MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x100b1
+- MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x100b1
+- MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x100b1
+- MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x100b1
+- MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x100b1
+- MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x100b1
+- MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x100b1
+- MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x100b1
+- MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x100b1
+- MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x100b1
+- MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x100b1
+- MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x100b1
+- MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x100b1
+- MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x100b1
+- MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x100b1
+- MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x100b1
+- >;
+- };
+-
+- pinctrl_led: ledgrp {
+- fsl,pins = <
+- MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x0b0b0
+- >;
+- };
+-
+- pinctrl_pwm3: pwm3grp {
+- fsl,pins = <
+- MX6UL_PAD_NAND_ALE__PWM3_OUT 0x1b0b0
+- >;
+- };
+-
+- pinctrl_tsc: tscgrp {
+- fsl,pins = <
+- MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
+- MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
+- MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
+- MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
+- >;
+- };
+-
+- pinctrl_uart1: uart1grp {
+- fsl,pins = <
+- MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+- MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+- >;
+- };
+-
+- pinctrl_uart2: uart2grp {
+- fsl,pins = <
+- MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
+- MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
+- >;
+- };
+-
+- pinctrl_usbotg1_id: usbotg1idgrp {
+- fsl,pins = <
+- MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x1b0b0
+- >;
+- };
+-
+- pinctrl_usbotg1_vbus: usbotg1vbusgrp {
+- fsl,pins = <
+- MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b0b0
+- >;
+- };
+-
+- pinctrl_usbotg2_vbus: usbotg2vbusgrp {
+- fsl,pins = <
+- MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
+- >;
+- };
+-
+- pinctrl_w1: w1grp {
+- fsl,pins = <
+- MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
+- >;
+- };
+ };
+diff --git a/arch/arm/boot/dts/imx6ull-opos6uldev.dts b/arch/arm/boot/dts/imx6ull-opos6uldev.dts
+new file mode 100644
+index 000000000000..47fbe3e23489
--- /dev/null
-+++ linux-4.14.18/arch/arm/boot/dts/imx6ull-opos6uldev.dts
++++ b/arch/arm/boot/dts/imx6ull-opos6uldev.dts
@@ -0,0 +1,56 @@
+/*
+ * Copyright 2018 Armadeus Systems <su...@ar...>
@@ -931,10 +910,13 @@ Index: linux-4.14.18/arch/arm/boot/dts/imx6ull-opos6uldev.dts
+
+/dts-v1/;
+#include "imx6ull.dtsi"
-+#include "imx6ul-opos6ul.dtsi"
-+#include "imx6ul-opos6uldev.dtsi"
++#include "imx6ul-imx6ull-opos6ul.dtsi"
++#include "imx6ul-imx6ull-opos6uldev.dtsi"
+
+/ {
+ model = "Armadeus Systems OPOS6UL SoM (i.MX6ULL) on OPOS6ULDev board";
+ compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ull";
+};
+--
+2.16.1
+
diff --git a/patches/linux/4.17-rc1/0101-cpufreq-imx6q-check-speed-grades-for-i.MX6ULL.patch b/patches/linux/4.17-rc1/0101-cpufreq-imx6q-check-speed-grades-for-i.MX6ULL.patch
new file mode 100644
index 0000000..ed9171f
--- /dev/null
+++ b/patches/linux/4.17-rc1/0101-cpufreq-imx6q-check-speed-grades-for-i.MX6ULL.patch
@@ -0,0 +1,79 @@
+From 4bd24c66ad947cd4a7bb85a33e2b33ce93c6800c Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
+ <seb...@ar...>
+Date: Wed, 18 Apr 2018 15:54:44 +0200
+Subject: [PATCH 101/103] cpufreq: imx6q: check speed grades for i.MX6ULL
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Check the max speed supported from the fuses for i.MX6ULL and update the
+operating points table accordingly.
+
+Signed-off-by: Sébastien Szymanski <seb...@ar...>
+---
+ drivers/cpufreq/imx6q-cpufreq.c | 29 +++++++++++++++++++++++------
+ 1 file changed, 23 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
+index 83cf631fc9bc..f094687cae52 100644
+--- a/drivers/cpufreq/imx6q-cpufreq.c
++++ b/drivers/cpufreq/imx6q-cpufreq.c
+@@ -266,6 +266,8 @@ static void imx6q_opp_check_speed_grading(struct device *dev)
+ }
+
+ #define OCOTP_CFG3_6UL_SPEED_696MHZ 0x2
++#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2
++#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3
+
+ static void imx6ul_opp_check_speed_grading(struct device *dev)
+ {
+@@ -287,16 +289,30 @@ static void imx6ul_opp_check_speed_grading(struct device *dev)
+ * Speed GRADING[1:0] defines the max speed of ARM:
+ * 2b'00: Reserved;
+ * 2b'01: 528000000Hz;
+- * 2b'10: 696000000Hz;
+- * 2b'11: Reserved;
++ * 2b'10: 696000000Hz on i.MX6UL, 792000000Hz on i.MX6ULL;
++ * 2b'11: 900000000Hz on i.MX6ULL only;
+ * We need to set the max speed of ARM according to fuse map.
+ */
+ val = readl_relaxed(base + OCOTP_CFG3);
+ val >>= OCOTP_CFG3_SPEED_SHIFT;
+ val &= 0x3;
+- if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
+- if (dev_pm_opp_disable(dev, 696000000))
+- dev_warn(dev, "failed to disable 696MHz OPP\n");
++
++ if (of_machine_is_compatible("fsl,imx6ul")) {
++ if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
++ if (dev_pm_opp_disable(dev, 696000000))
++ dev_warn(dev, "failed to disable 696MHz OPP\n");
++ }
++
++ if (of_machine_is_compatible("fsl,imx6ull")) {
++ if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
++ if (dev_pm_opp_disable(dev, 792000000))
++ dev_warn(dev, "failed to disable 792MHz OPP\n");
++
++ if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
++ if (dev_pm_opp_disable(dev, 900000000))
++ dev_warn(dev, "failed to disable 900MHz OPP\n");
++ }
++
+ iounmap(base);
+ put_node:
+ of_node_put(np);
+@@ -356,7 +372,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
+ goto put_reg;
+ }
+
+- if (of_machine_is_compatible("fsl,imx6ul"))
++ if (of_machine_is_compatible("fsl,imx6ul") ||
++ of_machine_is_compatible("fsl,imx6ull"))
+ imx6ul_opp_check_speed_grading(cpu_dev);
+ else
+ imx6q_opp_check_speed_grading(cpu_dev);
+--
+2.16.1
+
diff --git a/patches/linux/4.17-rc1/0102-ARM-dts-imx6ull-add-operating-points.patch b/patches/linux/4.17-rc1/0102-ARM-dts-imx6ull-add-operating-points.patch
new file mode 100644
index 0000000..0a6b5bb
--- /dev/null
+++ b/patches/linux/4.17-rc1/0102-ARM-dts-imx6ull-add-operating-points.patch
@@ -0,0 +1,51 @@
+From f6bc8e8f9e184efae476ccf1322082fa3d248bc3 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
+ <seb...@ar...>
+Date: Wed, 18 Apr 2018 16:02:39 +0200
+Subject: [PATCH 102/103] ARM: dts: imx6ull: add operating points
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+i.MX6ULL has different operating ranges than i.MX6UL so add the
+operating points for the i.MX6ULL. A 25mV offset is added to the minimum
+allowed values like for the i.MX6UL.
+
+Signed-off-by: Sébastien Szymanski <seb...@ar...>
+---
+ arch/arm/boot/dts/imx6ull.dtsi | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
+index 571ddd71cdba..530d5526b890 100644
+--- a/arch/arm/boot/dts/imx6ull.dtsi
++++ b/arch/arm/boot/dts/imx6ull.dtsi
+@@ -46,6 +46,25 @@
+ /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
+ /delete-node/ &uart8;
+
++&cpu0 {
++ operating-points = <
++ /* kHz uV */
++ 900000 1275000
++ 792000 1225000
++ 528000 1175000
++ 396000 1025000
++ 198000 950000
++ >;
++ fsl,soc-operating-points = <
++ /* KHz uV */
++ 900000 1175000
++ 792000 1175000
++ 528000 1175000
++ 396000 1175000
++ 198000 1175000
++ >;
++};
++
+ / {
+ soc {
+ aips3: aips-bus@2200000 {
+--
+2.16.1
+
diff --git a/patches/linux/4.17-rc1/0103-ARM-dts-opos6uldev-fix-pixel-clk-polarity.patch b/patches/linux/4.17-rc1/0103-ARM-dts-opos6uldev-fix-pixel-clk-polarity.patch
new file mode 100644
index 0000000..39782ca
--- /dev/null
+++ b/patches/linux/4.17-rc1/0103-ARM-dts-opos6uldev-fix-pixel-clk-polarity.patch
@@ -0,0 +1,30 @@
+From db45b2905d8df5cd565009e48e07c492312116c5 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
+ <seb...@ar...>
+Date: Thu, 19 Apr 2018 15:59:07 +0200
+Subject: [PATCH 103/103] ARM: dts: opos6uldev: fix pixel clk polarity
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Sébastien Szymanski <seb...@ar...>
+---
+ arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi b/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
+index 0b79a246a07f..e4c3cc81d263 100644
+--- a/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
++++ b/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
+@@ -196,7 +196,7 @@
+ hsync-len = <64>;
+ vsync-len = <4>;
+ de-active = <1>;
+- pixelclk-active = <0>;
++ pixelclk-active = <1>;
+ };
+ };
+ };
+--
+2.16.1
+
diff --git a/patches/linux/4.14/0505-armadeus-add_mcp7940x_rtc_driver.patch b/patches/linux/4.17-rc1/0505-armadeus-add_mcp7940x_rtc_driver.patch
similarity index 100%
copy from patches/linux/4.14/0505-armadeus-add_mcp7940x_rtc_driver.patch
copy to patches/linux/4.17-rc1/0505-armadeus-add_mcp7940x_rtc_driver.patch
diff --git a/patches/linux/4.14/0514-armadeus-remove-spidev-oops-warning-at-load-time.patch b/patches/linux/4.17-rc1/0514-armadeus-remove-spidev-oops-warning-at-load-time.patch
similarity index 100%
copy from patches/linux/4.14/0514-armadeus-remove-spidev-oops-warning-at-load-time.patch
copy to patches/linux/4.17-rc1/0514-armadeus-remove-spidev-oops-warning-at-load-time.patch
diff --git a/patches/linux/4.14/0703-armadeus-mxs-uart-add-rs485-support.patch b/patches/linux/4.17-rc1/0703-armadeus-mxs-uart-add-rs485-support.patch
similarity index 100%
copy from patches/linux/4.14/0703-armadeus-mxs-uart-add-rs485-support.patch
copy to patches/linux/4.17-rc1/0703-armadeus-mxs-uart-add-rs485-support.patch
diff --git a/patches/linux/4.14/0800-armadeus-dts-opos6uldev-LQ043-LCD-support.patch b/patches/linux/4.17-rc1/0800-armadeus-dts-opos6uldev-LQ043-LCD-support.patch
similarity index 70%
copy from patches/linux/4.14/0800-armadeus-dts-opos6uldev-LQ043-LCD-support.patch
copy to patches/linux/4.17-rc1/0800-armadeus-dts-opos6uldev-LQ043-LCD-support.patch
index 53e16b1..3d8630b 100644
--- a/patches/linux/4.14/0800-armadeus-dts-opos6uldev-LQ043-LCD-support.patch
+++ b/patches/linux/4.17-rc1/0800-armadeus-dts-opos6uldev-LQ043-LCD-support.patch
@@ -1,9 +1,9 @@
Signed-off-by: Julien BOIBESSOT <jul...@ar...>
-Index: linux-4.14.17/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+Index: linux-4.17-rc1/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
===================================================================
---- linux-4.14.17.orig/arch/arm/boot/dts/imx6ul-opos6uldev.dts
-+++ linux-4.14.17/arch/arm/boot/dts/imx6ul-opos6uldev.dts
-@@ -191,7 +191,7 @@
+--- linux-4.17-rc1.orig/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
++++ linux-4.17-rc1/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
+@@ -185,7 +185,7 @@
bus-width = <18>;
display-timings {
@@ -12,9 +12,9 @@ Index: linux-4.14.17/arch/arm/boot/dts/imx6ul-opos6uldev.dts
clock-frequency = <33000033>;
hactive = <800>;
vactive = <480>;
-@@ -204,6 +204,22 @@
+@@ -198,6 +198,22 @@
de-active = <1>;
- pixelclk-active = <0>;
+ pixelclk-active = <1>;
};
+
+ LQ043 {
diff --git a/patches/linux/4.14/0800-armadeus-dts-opos6uldev-add-csi-pin-muxing.patch b/patches/linux/4.17-rc1/0800-armadeus-dts-opos6uldev-add-csi-pin-muxing.patch
similarity index 79%
copy from patches/linux/4.14/0800-armadeus-dts-opos6uldev-add-csi-pin-muxing.patch
copy to patches/linux/4.17-rc1/0800-armadeus-dts-opos6uldev-add-csi-pin-muxing.patch
index de984a6..5c4a186 100644
--- a/patches/linux/4.14/0800-armadeus-dts-opos6uldev-add-csi-pin-muxing.patch
+++ b/patches/linux/4.17-rc1/0800-armadeus-dts-opos6uldev-add-csi-pin-muxing.patch
@@ -1,9 +1,9 @@
Signed-off-by: Julien BOIBESSOT <jul...@ar...>
-Index: linux-4.14.17/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+Index: linux-4.17-rc1/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
===================================================================
---- linux-4.14.17.orig/arch/arm/boot/dts/imx6ul-opos6uldev.dts
-+++ linux-4.14.17/arch/arm/boot/dts/imx6ul-opos6uldev.dts
-@@ -275,6 +275,23 @@
+--- linux-4.17-rc1.orig/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
++++ linux-4.17-rc1/arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi
+@@ -269,6 +269,23 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpios>;
diff --git a/patches/linux/4.14/0803-armadeus-brcmfmac-increase-boot-timeout.patch b/patches/linux/4.17-rc1/0803-armadeus-brcmfmac-increase-boot-timeout.patch
similarity index 100%
copy from patches/linux/4.14/0803-armadeus-brcmfmac-increase-boot-timeout.patch
copy to patches/linux/4.17-rc1/0803-armadeus-brcmfmac-increase-boot-timeout.patch
hooks/post-receive
--
armadeus
|