[Armadeus-commitlog] armadeus branch, master, updated. armadeus-6.0-381-gf17d71b
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-6.0-381-gf17d71b
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From: Sébastien S. <ss...@sf...> - 2018-02-16 08:55:02
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This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via f17d71bc9af0392c938fea6172eb7b80ee4468a5 (commit)
via 786625e2b632be2ada85dd09de433eae7092f106 (commit)
via 40410425d02812990a74c6ff7fd5fa8305448271 (commit)
from b7c87b9ccb1c7f0ffaa0ec465dff09910602bb26 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f17d71bc9af0392c938fea6172eb7b80ee4468a5
Author: Sébastien Szymanski <seb...@ar...>
Date: Fri Feb 16 10:02:07 2018 +0100
[UBOOT] opos6ulnano: bump to commit 41c5b7e32c6d54742d5d420e14c72517fb5b0640
commit 786625e2b632be2ada85dd09de433eae7092f106
Author: Sébastien Szymanski <seb...@ar...>
Date: Thu Feb 15 11:21:31 2018 +0100
[TOOLS] quiltify.sh: fix typo
commit 40410425d02812990a74c6ff7fd5fa8305448271
Author: Sébastien Szymanski <seb...@ar...>
Date: Tue Feb 13 16:48:20 2018 +0100
[LINUX] 4.14: opos6ul/opos6ulnano: add i.MX6ULL support
-----------------------------------------------------------------------
Summary of changes:
buildroot/configs/opos6ul_defconfig | 4 +-
buildroot/configs/opos6ulnano_defconfig | 10 +-
...ts-opos6ulnano-rework-to-support-imx6ull.patch} | 547 +++++++-------
...us-dts-opos6ul-rework-to-support-imx6ull.patch} | 802 ++++++++++++++-------
...6ull-add-additional-pinfunc-defines-for-i.patch | 64 ++
...-ARM-dts-imx6ull-add-IOMUXC-SNVS-instance.patch | 45 ++
.../0808-ARM-dts-imx6ull-add-UART8-support.patch | 51 ++
...6ul-add-IOMUXC-SNVS-pinctrl-driver-for-i..patch | 115 +++
scripts/quiltify.sh | 2 +-
9 files changed, 1118 insertions(+), 522 deletions(-)
copy patches/linux/{4.9/0801-ARM-dts-add-Armadeus-Systems-OPOS6UL-and-OPOS6ULDEV-.patch => 4.14/0804-armadeus-dts-opos6ulnano-rework-to-support-imx6ull.patch} (58%)
copy patches/linux/{4.9/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch => 4.14/0805-armadeus-dts-opos6ul-rework-to-support-imx6ull.patch} (54%)
create mode 100644 patches/linux/4.14/0806-ARM-dts-imx6ull-add-additional-pinfunc-defines-for-i.patch
create mode 100644 patches/linux/4.14/0807-ARM-dts-imx6ull-add-IOMUXC-SNVS-instance.patch
create mode 100644 patches/linux/4.14/0808-ARM-dts-imx6ull-add-UART8-support.patch
create mode 100644 patches/linux/4.14/0809-pinctrl-imx6ul-add-IOMUXC-SNVS-pinctrl-driver-for-i..patch
diff --git a/buildroot/configs/opos6ul_defconfig b/buildroot/configs/opos6ul_defconfig
index bd2febb..88aa03f 100644
--- a/buildroot/configs/opos6ul_defconfig
+++ b/buildroot/configs/opos6ul_defconfig
@@ -23,12 +23,12 @@ BR2_CPU_NAME="imx6ul"
BR2_TARGET_ARMADEUS_SDRAM_SIZE="256"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.18"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.19"
BR2_LINUX_KERNEL_PATCH="../patches/linux/4.14"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-4.14.config"
BR2_LINUX_KERNEL_DTS_SUPPORT=y
-BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx6ul-opos6uldev"
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx6ul-opos6uldev imx6ull-opos6uldev"
BR2_LINUX_KERNEL_INSTALL_TARGET=y
BR2_PACKAGE_BUSYBOX_CONFIG="$(ARMADEUS_PATH)/busybox.config"
BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y
diff --git a/buildroot/configs/opos6ulnano_defconfig b/buildroot/configs/opos6ulnano_defconfig
index 50800ae..40f7b25 100644
--- a/buildroot/configs/opos6ulnano_defconfig
+++ b/buildroot/configs/opos6ulnano_defconfig
@@ -21,12 +21,12 @@ BR2_CPU_NAME="imx6ul"
BR2_TARGET_ARMADEUS_SDRAM_SIZE="256"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.9.35"
-BR2_LINUX_KERNEL_PATCH="../patches/linux/$(BR2_LINUX_KERNEL_VERSION)"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.19"
+BR2_LINUX_KERNEL_PATCH="../patches/linux/4.14"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
-BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-$(BR2_LINUX_KERNEL_VERSION).config"
+BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-4.14.config"
BR2_LINUX_KERNEL_DTS_SUPPORT=y
-BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx6ul-opos6ulnanodev"
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx6ul-opos6ulnanodev imx6ull-opos6ulnanodev"
BR2_LINUX_KERNEL_INSTALL_TARGET=y
BR2_PACKAGE_BUSYBOX_CONFIG="$(ARMADEUS_PATH)/busybox.config"
BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y
@@ -127,7 +127,7 @@ BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_BOARDNAME="opos6ulnanodev"
BR2_TARGET_UBOOT_CUSTOM_GIT=y
BR2_TARGET_UBOOT_CUSTOM_REPO_URL="git://git.code.sf.net/p/armadeus/u-boot"
-BR2_TARGET_UBOOT_CUSTOM_REPO_VERSION="5b608772040dec0638711b6bb7b788da62c38c61"
+BR2_TARGET_UBOOT_CUSTOM_REPO_VERSION="41c5b7e32c6d54742d5d420e14c72517fb5b0640"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="opos6ulnanodev"
BR2_TARGET_UBOOT_NEEDS_DTC=y
# BR2_TARGET_UBOOT_FORMAT_BIN is not set
diff --git a/patches/linux/4.9/0801-ARM-dts-add-Armadeus-Systems-OPOS6UL-and-OPOS6ULDEV-.patch b/patches/linux/4.14/0804-armadeus-dts-opos6ulnano-rework-to-support-imx6ull.patch
similarity index 58%
copy from patches/linux/4.9/0801-ARM-dts-add-Armadeus-Systems-OPOS6UL-and-OPOS6ULDEV-.patch
copy to patches/linux/4.14/0804-armadeus-dts-opos6ulnano-rework-to-support-imx6ull.patch
index 8234b61..25756c7 100644
--- a/patches/linux/4.9/0801-ARM-dts-add-Armadeus-Systems-OPOS6UL-and-OPOS6ULDEV-.patch
+++ b/patches/linux/4.14/0804-armadeus-dts-opos6ulnano-rework-to-support-imx6ull.patch
@@ -1,44 +1,30 @@
-From fedc05ba2fc3e6060a6003c1b37d31773c8ccb3a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
- <seb...@ar...>
-Date: Thu, 22 Jun 2017 10:28:57 +0200
-Subject: [PATCH 1/1] ARM: dts: add Armadeus Systems OPOS6UL and OPOS6ULDEV
- support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-OPOS6ULNano is an i.MX6UL based SoM.
-OPOS6ULNanoDev is a carrier board for the OPOS6ULNano SoM.
-
-Signed-off-by: Sébastien Szymanski <seb...@ar...>
----
- arch/arm/boot/dts/Makefile | 1 +
- arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi | 194 +++++++++++++++++++++
- arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts | 251 ++++++++++++++++++++++++++++
- 3 files changed, 446 insertions(+)
- create mode 100644 arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi
- create mode 100644 arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts
-
-Index: linux-4.9.35/arch/arm/boot/dts/Makefile
+Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi
===================================================================
---- linux-4.9.35.orig/arch/arm/boot/dts/Makefile
-+++ linux-4.9.35/arch/arm/boot/dts/Makefile
-@@ -421,6 +421,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
- imx6ul-14x14-evk.dtb \
- imx6ul-geam-kit.dtb \
- imx6ul-opos6uldev.dtb \
-+ imx6ul-opos6ulnanodev.dtb \
- imx6ul-pico-hobbit.dtb \
- imx6ul-tx6ul-0010.dtb \
- imx6ul-tx6ul-0011.dtb \
-Index: linux-4.9.35/arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi
+--- linux-4.14.18.orig/arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi
++++ linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright 2017 Armadeus Systems <su...@ar...>
++ * Copyright 2018 Armadeus Systems <su...@ar...>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+@@ -45,8 +45,6 @@
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+-#include "imx6ul.dtsi"
+-
+ / {
+ memory {
+ reg = <0x80000000 0>; /* will be filled by U-Boot */
+Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6ulnanodev.dtsi
===================================================================
--- /dev/null
-+++ linux-4.9.35/arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi
-@@ -0,0 +1,194 @@
++++ linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6ulnanodev.dtsi
+@@ -0,0 +1,245 @@
+/*
-+ * Copyright 2017 Armadeus Systems <su...@ar...>
++ * Copyright 2018 Armadeus Systems <su...@ar...>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
@@ -84,212 +70,7 @@ Index: linux-4.9.35/arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
-+#include "imx6ul.dtsi"
-+
-+/ {
-+ memory {
-+ reg = <0x80000000 0>; /* will be filled by U-Boot */
-+ };
-+
-+ reg_3v3: regulator-3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "3V3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ usdhc2_pwrseq: usdhc2-pwrseq {
-+ compatible = "mmc-pwrseq-simple";
-+ reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
-+ };
-+};
-+
-+&fec2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_enet2>;
-+ phy-mode = "rmii";
-+ phy-reset-duration = <1>;
-+ phy-reset-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
-+ phy-handle = <ðphy1>;
-+ phy-supply = <®_3v3>;
-+ status = "okay";
-+
-+ mdio: mdio {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ ethphy1: ethernet-phy@1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ interrupt-parent = <&gpio2>;
-+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
-+ status = "okay";
-+ };
-+ };
-+};
-+
-+/* Bluetooth */
-+&uart3 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart3>;
-+ uart-has-rtscts;
-+ status = "okay";
-+};
-+
-+/* eMMC */
-+&usdhc1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usdhc1>;
-+ bus-width = <8>;
-+ no-1-8-v;
-+ non-removable;
-+ status = "okay";
-+};
-+
-+/* WiFi */
-+&usdhc2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usdhc2>;
-+ bus-width = <4>;
-+ no-1-8-v;
-+ non-removable;
-+ mmc-pwrseq = <&usdhc2_pwrseq>;
-+ status = "okay";
-+
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ brcmf: brcmf@1 {
-+ compatible = "brcm,bcm4329-fmac";
-+ reg = <1>;
-+ /*
-+ interrupt-parent = <&gpio4>;
-+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
-+ interrupt-names = "host-wake";
-+ */
-+ };
-+};
-+
-+&iomuxc {
-+ pinctrl_enet2: enet2grp {
-+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
-+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
-+ MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x130b0
-+ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x130b0
-+ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x130b0
-+ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x130b0
-+ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
-+ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
-+ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
-+ /* INT# */
-+ MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x1b0b0
-+ /* RST# */
-+ MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x130b0
-+ MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
-+ >;
-+ };
-+
-+ pinctrl_uart3: uart3grp {
-+ fsl,pins = <
-+ MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b0
-+ MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b0
-+ MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b0
-+ MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b0
-+ /* BT_REG_ON */
-+ MX6UL_PAD_NAND_DATA01__GPIO4_IO03 0x130b0
-+ >;
-+ };
-+
-+ pinctrl_usdhc1: usdhc1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
-+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
-+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
-+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
-+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
-+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
-+ MX6UL_PAD_NAND_READY_B__USDHC1_DATA4 0x17059
-+ MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5 0x17059
-+ MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6 0x17059
-+ MX6UL_PAD_NAND_CLE__USDHC1_DATA7 0x17059
-+ >;
-+ };
-+
-+ pinctrl_usdhc2: usdhc2grp {
-+ fsl,pins = <
-+ MX6UL_PAD_LCD_DATA18__USDHC2_CMD 0x1b0b0
-+ MX6UL_PAD_LCD_DATA19__USDHC2_CLK 0x100b0
-+ MX6UL_PAD_LCD_DATA20__USDHC2_DATA0 0x1b0b0
-+ MX6UL_PAD_LCD_DATA21__USDHC2_DATA1 0x1b0b0
-+ MX6UL_PAD_LCD_DATA22__USDHC2_DATA2 0x1b0b0
-+ MX6UL_PAD_LCD_DATA23__USDHC2_DATA3 0x1b0b0
-+ /* WL_REG_ON */
-+ MX6UL_PAD_NAND_DATA06__GPIO4_IO08 0x130b0
-+ /* WL_IRQ */
-+ MX6UL_PAD_NAND_DATA02__GPIO4_IO04 0x130b0
-+ >;
-+ };
-+};
-Index: linux-4.9.35/arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts
-===================================================================
---- /dev/null
-+++ linux-4.9.35/arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts
-@@ -0,0 +1,251 @@
-+/*
-+ * Copyright 2017 Armadeus Systems <su...@ar...>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This file is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public
-+ * License along with this file; if not, write to the Free
-+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
-+ * MA 02110-1301 USA
-+ *
-+ * Or, alternatively,
-+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/dts-v1/;
-+#include "imx6ul-opos6ulnano.dtsi"
-+
+/ {
-+ model = "Armadeus Systems OPOS6UL Nano SoM on OPOS6ULDev board (customized for OPOS6UL Nano)";
-+ compatible = "armadeus,opos6ulnanodev", "armadeus,opos6ulnano", "fsl,imx6ul";
-+
+ chosen {
+ stdout-path = &uart1;
+ };
@@ -487,3 +268,285 @@ Index: linux-4.9.35/arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts
+ >;
+ };
+};
+Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts
+===================================================================
+--- linux-4.14.18.orig/arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts
++++ linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright 2017 Armadeus Systems <su...@ar...>
++ * Copyright 2018 Armadeus Systems <su...@ar...>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+@@ -46,206 +46,11 @@
+ */
+
+ /dts-v1/;
++#include "imx6ul.dtsi"
+ #include "imx6ul-opos6ulnano.dtsi"
++#include "imx6ul-opos6ulnanodev.dtsi"
+
+ / {
+- model = "Armadeus Systems OPOS6UL Nano SoM on OPOS6ULDev board (customized for OPOS6UL Nano)";
++ model = "Armadeus Systems OPOS6UL Nano SoM (i.MX6UL) on OPOS6ULDev board (customized for OPOS6UL Nano)";
+ compatible = "armadeus,opos6ulnanodev", "armadeus,opos6ulnano", "fsl,imx6ul";
+-
+- chosen {
+- stdout-path = &uart1;
+- };
+-
+- leds {
+- compatible = "gpio-leds";
+-
+- user-led {
+- label = "User";
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_led>;
+- gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+- linux,default-trigger = "heartbeat";
+- };
+- };
+-
+- reg_5v: regulator-5v {
+- compatible = "regulator-fixed";
+- regulator-name = "5V";
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- };
+-};
+-
+-&ecspi2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_ecspi2>;
+- cs-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+- status = "okay";
+-
+- spidev0: spi@0 {
+- compatible = "spidev";
+- reg = <0>;
+- spi-max-frequency = <5000000>;
+- };
+-};
+-
+-&i2c1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_i2c1>;
+- clock_frequency = <400000>;
+- status = "okay";
+-};
+-
+-&i2c2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_i2c2>;
+- clock_frequency = <400000>;
+- status = "okay";
+-};
+-
+-&lcdif {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_lcdif>;
+- display = <&display0>;
+- lcd-supply = <®_3v3>;
+- status = "okay";
+-
+- display0: display0 {
+- bits-per-pixel = <32>;
+- bus-width = <18>;
+-
+- display-timings {
+- timing0: timing0 {
+- clock-frequency = <33000033>;
+- hactive = <800>;
+- vactive = <480>;
+- hback-porch = <96>;
+- hfront-porch = <96>;
+- vback-porch = <20>;
+- vfront-porch = <21>;
+- hsync-len = <64>;
+- vsync-len = <4>;
+- de-active = <1>;
+- pixelclk-active = <0>;
+- };
+- };
+- };
+-};
+-
+-&snvs_pwrkey {
+- status = "disabled";
+-};
+-
+-&uart1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart1>;
+- status = "okay";
+-};
+-
+-&uart2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart2>;
+- status = "okay";
+-};
+-
+-&usbotg1 {
+- vbus-supply = <®_5v>;
+- dr_mode = "peripheral";
+- disable-over-current;
+- status = "okay";
+-};
+-
+-&usbotg2 {
+- vbus-supply = <®_5v>;
+- dr_mode = "host";
+- disable-over-current;
+- status = "okay";
+-};
+-
+-&iomuxc {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_gpios>;
+-
+- pinctrl_ecspi2: ecspi2grp {
+- fsl,pins = <
+- MX6UL_PAD_CSI_DATA00__ECSPI2_SCLK 0x1b0b0
+- MX6UL_PAD_CSI_DATA02__ECSPI2_MOSI 0x1b0b0
+- MX6UL_PAD_CSI_DATA03__ECSPI2_MISO 0x1b0b0
+- MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x1b0b0
+- >;
+- };
+-
+- pinctrl_gpios: gpiosgrp {
+- fsl,pins = <
+- MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x1b0b0
+- MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x1b0b0
+- MX6UL_PAD_CSI_MCLK__GPIO4_IO17 0x1b0b0
+- MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18 0x1b0b0
+- MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b0b0
+- MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b0b0
+- MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x1b0b0
+- MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x1b0b0
+- >;
+- };
+-
+- pinctrl_i2c1: i2c1grp {
+- fsl,pins = <
+- MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+- MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+- >;
+- };
+-
+- pinctrl_i2c2: i2c2grp {
+- fsl,pins = <
+- MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+- MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+- >;
+- };
+-
+- pinctrl_lcdif: lcdifgrp {
+- fsl,pins = <
+- MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x100b1
+- MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x100b1
+- MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x100b1
+- MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x100b1
+- MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x100b1
+- MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x100b1
+- MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x100b1
+- MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x100b1
+- MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x100b1
+- MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x100b1
+- MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x100b1
+- MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x100b1
+- MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x100b1
+- MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x100b1
+- MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x100b1
+- MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x100b1
+- MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x100b1
+- MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x100b1
+- MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x100b1
+- MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x100b1
+- MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x100b1
+- MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x100b1
+- >;
+- };
+-
+- pinctrl_led: ledgrp {
+- fsl,pins = <
+- MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x0b0b0
+- >;
+- };
+-
+- pinctrl_uart1: uart1grp {
+- fsl,pins = <
+- MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+- MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+- >;
+- };
+-
+- pinctrl_uart2: uart2grp {
+- fsl,pins = <
+- MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
+- MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
+- >;
+- };
+ };
+Index: linux-4.14.18/arch/arm/boot/dts/imx6ull-opos6ulnanodev.dts
+===================================================================
+--- /dev/null
++++ linux-4.14.18/arch/arm/boot/dts/imx6ull-opos6ulnanodev.dts
+@@ -0,0 +1,56 @@
++/*
++ * Copyright 2018 Armadeus Systems <su...@ar...>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ * a) This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public
++ * License along with this file; if not, write to the Free
++ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
++ * MA 02110-1301 USA
++ *
++ * Or, alternatively,
++ *
++ * b) Permission is hereby granted, free of charge, to any person
++ * obtaining a copy of this software and associated documentation
++ * files (the "Software"), to deal in the Software without
++ * restriction, including without limitation the rights to use,
++ * copy, modify, merge, publish, distribute, sublicense, and/or
++ * sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following
++ * conditions:
++ *
++ * The above copyright notice and this permission notice shall be
++ * included in all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++#include "imx6ull.dtsi"
++#include "imx6ul-opos6ulnano.dtsi"
++#include "imx6ul-opos6ulnanodev.dtsi"
++
++/ {
++ model = "Armadeus Systems OPOS6UL Nano SoM (i.MX6ULL) on OPOS6ULDev board (customized for OPOS6UL Nano)";
++ compatible = "armadeus,opos6ulnanodev", "armadeus,opos6ulnano", "fsl,imx6ull";
++};
diff --git a/patches/linux/4.9/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch b/patches/linux/4.14/0805-armadeus-dts-opos6ul-rework-to-support-imx6ull.patch
similarity index 54%
copy from patches/linux/4.9/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch
copy to patches/linux/4.14/0805-armadeus-dts-opos6ul-rework-to-support-imx6ull.patch
index 51da20b..8ca3210 100644
--- a/patches/linux/4.9/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch
+++ b/patches/linux/4.14/0805-armadeus-dts-opos6ul-rework-to-support-imx6ull.patch
@@ -1,237 +1,445 @@
-From c753be8ed1438150ad427c5d8c84e86f9c70109f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
- <seb...@ar...>
-Date: Thu, 2 Jun 2016 18:53:59 +0200
-Subject: [PATCH 1/1] ARM: dts: opos6ul and opos6uldev add initial support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Sébastien Szymanski <seb...@ar...>
----
- arch/arm/boot/dts/Makefile | 1 +
- arch/arm/boot/dts/imx6ul-opos6ul.dtsi | 181 ++++++++++++++
- arch/arm/boot/dts/imx6ul-opos6uldev.dts | 407 ++++++++++++++++++++++++++++++++
- 3 files changed, 589 insertions(+)
- create mode 100644 arch/arm/boot/dts/imx6ul-opos6ul.dtsi
- create mode 100644 arch/arm/boot/dts/imx6ul-opos6uldev.dts
-
-Index: linux-4.9.33/arch/arm/boot/dts/Makefile
+Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
===================================================================
---- linux-4.9.33.orig/arch/arm/boot/dts/Makefile
-+++ linux-4.9.33/arch/arm/boot/dts/Makefile
-@@ -420,6 +420,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
- dtb-$(CONFIG_SOC_IMX6UL) += \
- imx6ul-14x14-evk.dtb \
- imx6ul-geam-kit.dtb \
-+ imx6ul-opos6uldev.dtb \
- imx6ul-pico-hobbit.dtb \
- imx6ul-tx6ul-0010.dtb \
- imx6ul-tx6ul-0011.dtb \
-Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
+--- linux-4.14.18.orig/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
++++ linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright 2017 Armadeus Systems <su...@ar...>
++ * Copyright 2018 Armadeus Systems <su...@ar...>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+@@ -45,8 +45,6 @@
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+-#include "imx6ul.dtsi"
+-
+ / {
+ memory {
+ reg = <0x80000000 0>; /* will be filled by U-Boot */
+Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dts
===================================================================
---- /dev/null
-+++ linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
-@@ -0,0 +1,192 @@
-+/*
-+ * Copyright 2016 Armadeus Systems <su...@ar...>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This file is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public
-+ * License along with this file; if not, write to the Free
-+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
-+ * MA 02110-1301 USA
-+ *
-+ * Or, alternatively,
-+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
+--- linux-4.14.18.orig/arch/arm/boot/dts/imx6ul-opos6uldev.dts
++++ linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright 2017 Armadeus Systems <su...@ar...>
++ * Copyright 2018 Armadeus Systems <su...@ar...>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+@@ -46,400 +46,11 @@
+ */
+
+ /dts-v1/;
+#include "imx6ul.dtsi"
-+
-+/ {
-+ memory {
-+ reg = <0x80000000 0>; /* will be filled by U-Boot */
-+ };
-+
-+ reg_3v3: regulator-3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "3V3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ usdhc3_pwrseq: usdhc3_pwrseq {
-+ compatible = "mmc-pwrseq-simple";
-+ reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
-+ };
-+};
-+
-+&fec1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_enet1>;
-+ phy-mode = "rmii";
-+ phy-reset-duration = <1>;
-+ phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
-+ phy-handle = <ðphy1>;
-+ phy-supply = <®_3v3>;
-+ status = "okay";
-+
-+ mdio: mdio {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ ethphy1: ethernet-phy@1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ interrupt-parent = <&gpio4>;
-+ interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
-+ status = "okay";
-+ };
-+ };
-+};
-+
-+/* Bluetooth */
-+&uart8 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart8>;
-+ fsl,uart-has-rtscts;
-+ status = "okay";
-+};
-+
-+/* eMMC */
-+&usdhc1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usdhc1>;
-+ bus-width = <8>;
-+ no-1-8-v;
-+ non-removable;
-+ status = "okay";
-+};
-+
-+/* WiFi */
-+&usdhc2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usdhc2>;
-+ bus-width = <4>;
-+ no-1-8-v;
-+ non-removable;
-+ mmc-pwrseq = <&usdhc3_pwrseq>;
-+ status = "okay";
-+
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ brcmf: bcrmf@1 {
-+ compatible = "brcm,bcm4329-fmac";
-+ reg = <1>;
-+ interrupt-parent = <&gpio2>;
-+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
-+ interrupt-names = "host-wake";
-+ };
-+};
-+
-+&iomuxc {
-+ pinctrl_enet1: enet1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
-+ MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
-+ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x130b0
-+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x130b0
-+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x130b0
-+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x130b0
-+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
-+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
-+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
-+ /* INT# */
-+ MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x1b0b0
-+ /* RST# */
-+ MX6UL_PAD_NAND_DATA00__GPIO4_IO02 0x130b0
-+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
-+ >;
-+ };
-+
-+ pinctrl_uart8: uart8grp {
-+ fsl,pins = <
-+ MX6UL_PAD_ENET2_TX_EN__UART8_DCE_RX 0x1b0b0
-+ MX6UL_PAD_ENET2_TX_DATA1__UART8_DCE_TX 0x1b0b0
-+ MX6UL_PAD_ENET2_RX_ER__UART8_DCE_RTS 0x1b0b0
-+ MX6UL_PAD_ENET2_TX_CLK__UART8_DCE_CTS 0x1b0b0
-+ /* BT_REG_ON */
-+ MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x130b0
-+ >;
-+ };
-+
-+ pinctrl_usdhc1: usdhc1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
-+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
-+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
-+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
-+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
-+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
-+ MX6UL_PAD_NAND_READY_B__USDHC1_DATA4 0x17059
-+ MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5 0x17059
-+ MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6 0x17059
-+ MX6UL_PAD_NAND_CLE__USDHC1_DATA7 0x17059
-+ >;
-+ };
-+
-+ pinctrl_usdhc2: usdhc2grp {
-+ fsl,pins = <
-+ MX6UL_PAD_LCD_DATA18__USDHC2_CMD 0x1b0b0
-+ MX6UL_PAD_LCD_DATA19__USDHC2_CLK 0x100b0
-+ MX6UL_PAD_LCD_DATA20__USDHC2_DATA0 0x1b0b0
-+ MX6UL_PAD_LCD_DATA21__USDHC2_DATA1 0x1b0b0
-+ MX6UL_PAD_LCD_DATA22__USDHC2_DATA2 0x1b0b0
-+ MX6UL_PAD_LCD_DATA23__USDHC2_DATA3 0x1b0b0
-+ /* WL_REG_ON */
-+ MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x130b0
-+ /* WL_IRQ */
-+ MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x1b0b0
-+ >;
-+ };
-+};
-Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ #include "imx6ul-opos6ul.dtsi"
++#include "imx6ul-opos6uldev.dtsi"
+
+ / {
+- model = "Armadeus Systems OPOS6UL SoM on OPOS6ULDev board";
++ model = "Armadeus Systems OPOS6UL SoM (i.MX6UL) on OPOS6ULDev board";
+ compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ul";
+-
+- chosen {
+- stdout-path = &uart1;
+- };
+-
+- backlight {
+- compatible = "pwm-backlight";
+- pwms = <&pwm3 0 191000>;
+- brightness-levels = <0 4 8 16 32 64 128 255>;
+- default-brightness-level = <7>;
+- power-supply = <®_5v>;
+- status = "okay";
+- };
+-
+- gpio-keys {
+- compatible = "gpio-keys";
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_gpio_keys>;
+-
+- user-button {
+- label = "User button";
+- gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
+- linux,code = <BTN_MISC>;
+- wakeup-source;
+- };
+- };
+-
+- leds {
+- compatible = "gpio-leds";
+-
+- user-led {
+- label = "User";
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_led>;
+- gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
+- linux,default-trigger = "heartbeat";
+- };
+- };
+-
+- onewire {
+- compatible = "w1-gpio";
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_w1>;
+- gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+- };
+-
+- reg_5v: regulator-5v {
+- compatible = "regulator-fixed";
+- regulator-name = "5V";
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- };
+-
+- reg_usbotg1_vbus: regulator-usbotg1vbus {
+- compatible = "regulator-fixed";
+- regulator-name = "usbotg1vbus";
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usbotg1_vbus>;
+- gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+- enable-active-high;
+- };
+-
+- reg_usbotg2_vbus: regulator-usbotg2vbus {
+- compatible = "regulator-fixed";
+- regulator-name = "usbotg2vbus";
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usbotg2_vbus>;
+- gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
+- enable-active-high;
+- };
+-};
+-
+-&adc1 {
+- vref-supply = <®_3v3>;
+- status = "okay";
+-};
+-
+-&can1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_flexcan1>;
+- xceiver-supply = <®_5v>;
+- status = "okay";
+-};
+-
+-&can2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_flexcan2>;
+- xceiver-supply = <®_5v>;
+- status = "okay";
+-};
+-
+-&ecspi4 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_ecspi4>;
+- cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>;
+- status = "okay";
+-
+- spidev0: spi@0 {
+- compatible = "spidev";
+- reg = <0>;
+- spi-max-frequency = <5000000>;
+- };
+-
+- spidev1: spi@1 {
+- compatible = "spidev";
+- reg = <1>;
+- spi-max-frequency = <5000000>;
+- };
+-};
+-
+-&i2c1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_i2c1>;
+- clock_frequency = <400000>;
+- status = "okay";
+-};
+-
+-&i2c2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_i2c2>;
+- clock_frequency = <400000>;
+- status = "okay";
+-};
+-
+-&lcdif {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_lcdif>;
+- display = <&display0>;
+- lcd-supply = <®_3v3>;
+- status = "okay";
+-
+- display0: display0 {
+- bits-per-pixel = <32>;
+- bus-width = <18>;
+-
+- display-timings {
+- ST0700 {
+- clock-frequency = <33000033>;
+- hactive = <800>;
+- vactive = <480>;
+- hback-porch = <96>;
+- hfront-porch = <96>;
+- vback-porch = <20>;
+- vfront-porch = <21>;
+- hsync-len = <64>;
+- vsync-len = <4>;
+- de-active = <1>;
+- pixelclk-active = <0>;
+- };
+-
+- LQ043 {
+- clock-frequency = <8690000>;
+- hactive = <480>;
+- vactive = <272>;
+- hback-porch = <16>;
+- hfront-porch = <16>;
+- vback-porch = <4>;
+- vfront-porch = <2>;
+- hsync-len = <4>;
+- vsync-len = <4>;
+- hsync-active = <0>;
+- vsync-active = <0>;
+- de-active = <0>;
+- pixelclk-active = <1>;
+- };
+- };
+- };
+-};
+-
+-&pwm3 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_pwm3>;
+- status = "okay";
+-};
+-
+-&snvs_pwrkey {
+- status = "disabled";
+-};
+-
+-&tsc {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_tsc>;
+- xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
+- measure-delay-time = <0xffff>;
+- pre-charge-time = <0xffff>;
+- status = "okay";
+-};
+-
+-&uart1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart1>;
+- status = "okay";
+-};
+-
+-&uart2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart2>;
+- status = "okay";
+-};
+-
+-&usbotg1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usbotg1_id>;
+- vbus-supply = <®_usbotg1_vbus>;
+- dr_mode = "otg";
+- disable-over-current;
+- status = "okay";
+-};
+-
+-&usbotg2 {
+- vbus-supply = <®_usbotg2_vbus>;
+- dr_mode = "host";
+- disable-over-current;
+- status = "okay";
+-};
+-
+-&iomuxc {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_gpios>;
+-
+- pinctrl_csi1: csi1grp {
+- fsl,pins = <
+- MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
+- MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
+- MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
+- MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
+- MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
+- MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
+- MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
+- MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
+- MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
+- MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
+- MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
+- MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
+- >;
+- };
+-
+- pinctrl_ecspi4: ecspi4grp {
+- fsl,pins = <
+- MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK 0x1b0b0
+- MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI 0x1b0b0
+- MX6UL_PAD_NAND_DATA06__ECSPI4_MISO 0x1b0b0
+- MX6UL_PAD_NAND_DATA01__GPIO4_IO03 0x1b0b0
+- MX6UL_PAD_NAND_DATA07__GPIO4_IO09 0x1b0b0
+- >;
+- };
+-
+- pinctrl_flexcan1: flexcan1grp {
+- fsl,pins = <
+- MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x0b0b0
+- MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x0b0b0
+- >;
+- };
+-
+- pinctrl_flexcan2: flexcan2grp {
+- fsl,pins = <
+- MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x0b0b0
+- MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x0b0b0
+- >;
+- };
+-
+- pinctrl_gpios: gpiosgrp {
+- fsl,pins = <
+- MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x0b0b0
+- MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x0b0b0
+- MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x0b0b0
+- MX6UL_PAD_NAND_RE_B__GPIO4_IO00 0x0b0b0
+- MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x0b0b0
+- MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x0b0b0
+- MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0b0b0
+- MX6UL_PAD_NAND_WE_B__GPIO4_IO01 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
+- MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0
+- >;
+- };
+-
+- pinctrl_gpio_keys: gpiokeysgrp {
+- fsl,pins = <
+- MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x0b0b0
+- >;
+- };
+-
+- pinctrl_i2c1: i2c1grp {
+- fsl,pins = <
+- MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+- MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+- >;
+- };
+-
+- pinctrl_i2c2: i2c2grp {
+- fsl,pins = <
+- MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+- MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+- >;
+- };
+-
+- pinctrl_lcdif: lcdifgrp {
+- fsl,pins = <
+- MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x100b1
+- MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x100b1
+- MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x100b1
+- MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x100b1
+- MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x100b1
+- MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x100b1
+- MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x100b1
+- MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x100b1
+- MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x100b1
+- MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x100b1
+- MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x100b1
+- MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x100b1
+- MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x100b1
+- MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x100b1
+- MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x100b1
+- MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x100b1
+- MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x100b1
+- MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x100b1
+- MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x100b1
+- MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x100b1
+- MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x100b1
+- MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x100b1
+- >;
+- };
+-
+- pinctrl_led: ledgrp {
+- fsl,pins = <
+- MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x0b0b0
+- >;
+- };
+-
+- pinctrl_pwm3: pwm3grp {
+- fsl,pins = <
+- MX6UL_PAD_NAND_ALE__PWM3_OUT 0x1b0b0
+- >;
+- };
+-
+- pinctrl_tsc: tscgrp {
+- fsl,pins = <
+- MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
+- MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
+- MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
+- MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
+- >;
+- };
+-
+- pinctrl_uart1: uart1grp {
+- fsl,pins = <
+- MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+- MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+- >;
+- };
+-
+- pinctrl_uart2: uart2grp {
+- fsl,pins = <
+- MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
+- MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
+- >;
+- };
+-
+- pinctrl_usbotg1_id: usbotg1idgrp {
+- fsl,pins = <
+- MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x1b0b0
+- >;
+- };
+-
+- pinctrl_usbotg1_vbus: usbotg1vbusgrp {
+- fsl,pins = <
+- MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b0b0
+- >;
+- };
+-
+- pinctrl_usbotg2_vbus: usbotg2vbusgrp {
+- fsl,pins = <
+- MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
+- >;
+- };
+-
+- pinctrl_w1: w1grp {
+- fsl,pins = <
+- MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
+- >;
+- };
+ };
+Index: linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dtsi
===================================================================
--- /dev/null
-+++ linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
-@@ -0,0 +1,450 @@
++++ linux-4.14.18/arch/arm/boot/dts/imx6ul-opos6uldev.dtsi
+@@ -0,0 +1,439 @@
+/*
-+ * Copyright 2016 Armadeus Systems <su...@ar...>
++ * Copyright 2018 Armadeus Systems <su...@ar...>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
@@ -277,22 +485,17 @@ Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
-+/dts-v1/;
-+#include "imx6ul-opos6ul.dtsi"
-+
+/ {
-+ model = "Armadeus Systems OPOS6UL SoM on OPOS6ULDev board";
-+ compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ul";
-+
+ chosen {
+ stdout-path = &uart1;
+ };
+
-+ lcd_backlight {
++ backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm3 0 191000>;
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <7>;
++ power-supply = <®_5v>;
+ status = "okay";
+ };
+
@@ -312,7 +515,7 @@ Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ leds {
+ compatible = "gpio-leds";
+
-+ user_led {
++ user-led {
+ label = "User";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_led>;
@@ -326,7 +529,6 @@ Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_w1>;
+ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
-+ status = "okay";
+ };
+
+ reg_5v: regulator-5v {
@@ -359,12 +561,6 @@ Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ };
+};
+
-+&pwm3 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_pwm3>;
-+ status = "okay";
-+};
-+
+&adc1 {
+ vref-supply = <®_3v3>;
+ status = "okay";
@@ -387,7 +583,6 @@ Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+&ecspi4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi4>;
-+ fsl,spi-num-chipselects = <2>;
+ cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
@@ -440,8 +635,6 @@ Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ vfront-porch = <21>;
+ hsync-len = <64>;
+ vsync-len = <4>;
-+ hsync-active = <0>;
-+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
@@ -465,6 +658,12 @@ Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ };
+};
+
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>;
++ status = "okay";
++};
++
+&snvs_pwrkey {
+ status = "disabled";
+};
@@ -510,10 +709,20 @@ Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpios>;
+
-+
-+ pinctrl_pwm3: pwm3grp {
++ pinctrl_csi1: csi1grp {
+ fsl,pins = <
-+ MX6UL_PAD_NAND_ALE__PWM3_OUT 0x1b0b0
++ MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
++ MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
++ MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
++ MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
++ MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
++ MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
++ MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
++ MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
++ MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
++ MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
++ MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
++ MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
+ >;
+ };
+
@@ -562,13 +771,7 @@ Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ >;
+ };
+
-+ pinctrl_w1: w1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
-+ >;
-+ };
-+
-+ pinctrl_gpio_keys: gpio_keysgrp {
++ pinctrl_gpio_keys: gpiokeysgrp {
+ fsl,pins = <
+ MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x0b0b0
+ >;
@@ -621,6 +824,12 @@ Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ >;
+ };
+
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6UL_PAD_NAND_ALE__PWM3_OUT 0x1b0b0
++ >;
++ };
++
+ pinctrl_tsc: tscgrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
@@ -644,39 +853,88 @@ Index: linux-4.9.33/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ >;
+ };
+
-+ pinctrl_usbotg1_id: usbotg1_idgrp {
++ pinctrl_usbotg1_id: usbotg1idgrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x1b0b0
+ >;
+ };
+
-+ pinctrl_usbotg1_vbus: usbotg1_vbusgrp {
++ pinctrl_usbotg1_vbus: usbotg1vbusgrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b0b0
+ >;
+ };
+
-+ pinctrl_usbotg2_vbus: usbotg2_vbusgrp {
++ pinctrl_usbotg2_vbus: usbotg2vbusgrp {
+ fsl,pins = <
+ MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
+ >;
+ };
+
-+ pinctrl_csi1: csi1grp {
++ pinctrl_w1: w1grp {
+ fsl,pins = <
-+ MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
-+ MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
-+ MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
-+ MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
-+ MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
-+ MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
-+ MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
-+ MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
-+ MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
-+ MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
-+ MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
-+ MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
++ MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
+ >;
+ };
++};
+Index: linux-4.14.18/arch/arm/boot/dts/imx6ull-opos6uldev.dts
+===================================================================
+--- /dev/null
++++ linux-4.14.18/arch/arm/boot/dts/imx6ull-opos6uldev.dts
+@@ -0,0 +1,56 @@
++/*
++ * Copyright 2018 Armadeus Systems <su...@ar...>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ * a) This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public
++ * License along with this file; if not, write to the Free
++ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
++ * MA 02110-1301 USA
++ *
++ * Or, alternatively,
++ *
++ * b) Permission is hereby granted, free of charge, to any person
++ * obtaining a copy of this software and associated documentation
++ * files (the "Software"), to deal in the Software without
++ * restriction, including without limitation the rights to use,
++ * copy, modify, merge, publish, distribute, sublicense, and/or
++ * sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following
++ * conditions:
++ *
++ * The above copyright notice and this permission notice shall be
++ * included in all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++#include "imx6ull.dtsi"
++#include "imx6ul-opos6ul.dtsi"
++#include "imx6ul-opos6uldev.dtsi"
+
++/ {
++ model = "Armadeus Systems OPOS6UL SoM (i.MX6ULL) on OPOS6ULDev board";
++ compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ull";
+};
diff --git a/patches/linux/4.14/0806-ARM-dts-imx6ull-add-additional-pinfunc-defines-for-i.patch b/patches/linux/4.14/0806-ARM-dts-imx6ull-add-additional-pinfunc-defines-for-i.patch
new file mode 100644
index 0000000..dd5767a
--- /dev/null
+++ b/patches/linux/4.14/0806-ARM-dts-imx6ull-add-additional-pinfunc-defines-for-i.patch
@@ -0,0 +1,64 @@
+From bc6805f20bd5982bc1bbc747268fdd567e6b9ee6 Mon Sep 17 00:00:00 2001
+From: Bai Ping <pin...@nx...>
+Date: Wed, 10 Jan 2018 22:04:49 +0100
+Subject: [PATCH] ARM: dts: imx6ull: add additional pinfunc defines for i.MX
+ 6ULL
+
+On i.MX 6ULL, the pin MUX and CTRL register of BOOT_MODEx and TAMPERx
+pins are available through IOMUXC_SNVS. Add additional pinfunc defines.
+
+Signed-off-by: Bai Ping <pin...@nx...>
+Signed-off-by: Stefan Agner <st...@ag...>
+Reviewed-by: Rob Herring <ro...@ke...>
+Acked-by: Dong Aisheng <ais...@nx...>
+Signed-off-by: Shawn Guo <sha...@ke...>
+---
+ arch/arm/boot/dts/imx6ull-pinfunc-snvs.h | 26 ++++++++++++++++++++++++++
+ arch/arm/boot/dts/imx6ull.dtsi | 1 +
+ 2 files changed, 27 insertions(+)
+ create mode 100644 arch/arm/boot/dts/imx6ull-pinfunc-snvs.h
+
+diff --git a/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h b/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h
+new file mode 100644
+index 000000000000..f6fb6783c193
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h
+@@ -0,0 +1,26 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * Copyright (C) 2016 Freescale Semiconductor, Inc.
++ * Copyright (C) 2017 NXP
++ */
++
++#ifndef __DTS_IMX6ULL_PINFUNC_SNVS_H
++#define __DTS_IMX6ULL_PINFUNC_SNVS_H
++/*
++ * The pin function ID is a tuple of
++ * <mux_reg conf_reg input_reg mux_mode input_val>
++ */
++#define MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x0000 0x0044 0x0000 0x5 0x0
++#define MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x0004 0x0048 0x0000 0x5 0x0
++#define MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0008 0x004C 0x0000 0x5 0x0
++#define MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000C 0x0050 0x0000 0x5 0x0
++#define MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0010 0x0054 0x0000 0x5 0x0
++#define MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0014 0x0058 0x0000 0x5 0x0
++#define MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0018 0x005C 0x0000 0x5 0x0
++#define MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x001C 0x0060 0x0000 0x5 0x0
++#define MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0020 0x0064 0x0000 0x5 0x0
++#define MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0024 0x0068 0x0000 0x5 0x0
++#define MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0028 0x006C 0x0000 0x5 0x0
++#define MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x002C 0x0070 0x0000 0x5 0x0
++
++#endif /* __DTS_IMX6ULL_PINFUNC_SNVS_H */
+diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
+index 0c182917b863..a58c01dc15c3 100644
+--- a/arch/arm/boot/dts/imx6ull.dtsi
++++ b/arch/arm/boot/dts/imx6ull.dtsi
+@@ -41,3 +41,4 @@
+
+ #include "imx6ul.dtsi"
+ #include "imx6ull-pinfunc.h"
++#include "imx6ull-pinfunc-snvs.h"
+--
+2.13.6
+
diff --git a/patches/linux/4.14/0807-ARM-dts-imx6ull-add-IOMUXC-SNVS-instance.patch b/patches/linux/4.14/0807-ARM-dts-imx6ull-add-IOMUXC-SNVS-instance.patch
new file mode 100644
index 0000000..8c7b2e9
--- /dev/null
+++ b/patches/linux/4.14/0807-ARM-dts-imx6ull-add-IOMUXC-SNVS-instance.patch
@@ -0,0 +1,45 @@
+From c28bb160662604478d21b744c9525df62445eaf5 Mon Sep 17 00:00:00 2001
+From: Stefan Agner <st...@ag...>
+Date: Wed, 10 Jan 2018 22:04:52 +0100
+Subject: [PATCH] ARM: dts: imx6ull: add IOMUXC SNVS instance
+
+The i.MX 6ULL features another IOMUX Controller called IOMUXC
+SNVS which allows to control BOOT_MODE and TAMPER pins. Add the
+controller to the i.MX 6ULL specific imx6ull.dtsi device tree.
+
+Signed-off-by: Stefan Agner <st...@ag...>
+Reviewed-by: Rob Herring <ro...@ke...>
+Acked-by: Dong Aisheng <ais...@nx...>
+Signed-off-by: Shawn Guo <sha...@ke...>
+---
+ arch/arm/boot/dts/imx6ull.dtsi | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
+index a58c01dc15c3..bc2cd4fb8b12 100644
+--- a/arch/arm/boot/dts/imx6ull.dtsi
++++ b/arch/arm/boot/dts/imx6ull.dtsi
+@@ -42,3 +42,20 @@
+ #include "imx6ul.dtsi"
+ #include "imx6ull-pinfunc.h"
+ #include "imx6ull-pinfunc-snvs.h"
++
++/ {
++ soc {
++ aips3: aips-bus@2200000 {
++ compatible = "fsl,aips-bus", "simple-bus";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ reg = <0x02200000 0x100000>;
++ ranges;
++
++ iomuxc_snvs: iomuxc-snvs@2290000 {
++ compatible = "fsl,imx6ull-iomuxc-snvs";
++ reg = <0x02290000 0x4000>;
++ };
++ };
++ };
++};
+--
+2.13.6
+
diff --git a/patches/linux/4.14/0808-ARM-dts-imx6ull-add-UART8-support.patch b/patches/linux/4.14/0808-ARM-dts-imx6ull-add-UART8-support.patch
new file mode 100644
index 0000000..18af191
--- /dev/null
+++ b/patches/linux/4.14/0808-ARM-dts-imx6ull-add-UART8-support.patch
@@ -0,0 +1,51 @@
+From 71a0febaa443fa5506ba00622047237949b9129d Mon Sep 17 00:00:00 2001
+From: Stefan Agner <st...@ag...>
+Date: Wed, 10 Jan 2018 22:04:53 +0100
+Subject: [PATCH] ARM: dts: imx6ull: add UART8 support
+
+In i.MX 6ULL UART8 is part of the AIPS-3 memory map instead of
+AIPS-1. Clocks and interrupts remain the same.
+
+Signed-off-by: Stefan Agner <st...@ag...>
+Reviewed-by: Rob Herring <ro...@ke...>
+Acked-by: Dong Aisheng <ais...@nx...>
+Signed-off-by: Shawn Guo <sha...@ke...>
+---
+ arch/arm/boot/dts/imx6ull.dtsi | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
+index bc2cd4fb8b12..571ddd71cdba 100644
+--- a/arch/arm/boot/dts/imx6ull.dtsi
++++ b/arch/arm/boot/dts/imx6ull.dtsi
+@@ -43,6 +43,9 @@
+ #include "imx6ull-pinfunc.h"
+ #include "imx6ull-pinfunc-snvs.h"
+
++/* Delete UART8 in AIPS-1 (i.MX6UL specific) */
++/delete-node/ &uart8;
++
+ / {
+ soc {
+ aips3: aips-bus@2200000 {
+@@ -56,6 +59,17 @@
+ compatible = "fsl,imx6ull-iomuxc-snvs";
+ reg = <0x02290000 0x4000>;
+ };
++
++ uart8: serial@2288000 {
++ compatible = "fsl,imx6ul-uart",
++ "fsl,imx6q-uart";
++ reg = <0x02288000 0x4000>;
++ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks IMX6UL_CLK_UART8_IPG>,
++ <&clks IMX6UL_CLK_UART8_SERIAL>;
++ clock-names = "ipg", "per";
++ status = "disabled";
++ };
+ };
+ };
+ };
+--
+2.13.6
+
diff --git a/patches/linux/4.14/0809-pinctrl-imx6ul-add-IOMUXC-SNVS-pinctrl-driver-for-i..patch b/patches/linux/4.14/0809-pinctrl-imx6ul-add-IOMUXC-SNVS-pinctrl-driver-for-i..patch
new file mode 100644
index 0000000..0deaccc
--- /dev/null
+++ b/patches/linux/4.14/0809-pinctrl-imx6ul-add-IOMUXC-SNVS-pinctrl-driver-for-i..patch
@@ -0,0 +1,115 @@
+From ba33f4f42e968854d8367fc4e55b07f835c55832 Mon Sep 17 00:00:00 2001
+From: Bai Ping <pin...@nx...>
+Date: Sat, 6 Jan 2018 15:25:53 +0100
+Subject: [PATCH] pinctrl: imx6ul: add IOMUXC SNVS pinctrl driver for i.MX 6ULL
+
+On i.MX 6ULL, the BOOT_MODEx and TAMPERx pin MUX and CTRL registers
+are available in a separate IOMUXC_SNVS module. Add support for the
+IOMUXC_SNVS module to the i.MX 6UL pinctrl driver.
+
+Signed-off-by: Bai Ping <pin...@nx...>
+Signed-off-by: Stefan Agner <st...@ag...>
+Reviewed-by: Rob Herring <ro...@ke...>
+Signed-off-by: Linus Walleij <lin...@li...>
+---
+ .../bindings/pinctrl/fsl,imx6ul-pinctrl.txt | 3 +-
+ drivers/pinctrl/freescale/pinctrl-imx6ul.c | 52 ++++++++++++++++++++--
+ 2 files changed, 50 insertions(+), 5 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt
+index a81bbf37ed66..7ca4f6118d9a 100644
+--- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt
++++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt
+@@ -4,7 +4,8 @@ Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
+ and usage.
+
+ Required properties:
+-- compatible: "fsl,imx6ul-iomuxc"
++- compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or
++ "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller.
+ - fsl,pins: each entry consists of 6 integers and represents the mux and config
+ setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
+ input_val> are specified using a PIN_FUNC_ID macro, which can be found in
+diff --git a/drivers/pinctrl/freescale/pinctrl-imx6ul.c b/drivers/pinctrl/freescale/pinctrl-imx6ul.c
+index 1aeb840aae1d..4580717ade19 100644
+--- a/drivers/pinctrl/freescale/pinctrl-imx6ul.c
++++ b/drivers/pinctrl/freescale/pinctrl-imx6ul.c
+@@ -150,6 +150,21 @@ enum imx6ul_pads {
+ MX6UL_PAD_CSI_DATA07 = 128,
+ };
+
++enum imx6ull_lpsr_pads {
++ MX6ULL_PAD_BOOT_MODE0 = 0,
++ MX6ULL_PAD_BOOT_MODE1 = 1,
++ MX6ULL_PAD_SNVS_TAMPER0 = 2,
++ MX6ULL_PAD_...
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