[Armadeus-commitlog] armadeus branch, master, updated. armadeus-6.0-350-g1a87d7c
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-6.0-350-g1a87d7c
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From: Julien B a. A. <ar...@us...> - 2017-10-18 09:28:38
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This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 1a87d7c936bb70d3b08ff80d2016b6ea169ef175 (commit)
via e4d5a0ecf281cfe903f3a082561d57f5e41aa5d3 (commit)
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- Log -----------------------------------------------------------------
commit 1a87d7c936bb70d3b08ff80d2016b6ea169ef175
Author: Julien BOIBESSOT <jul...@ar...>
Date: Wed Oct 18 11:24:36 2017 +0200
[BUILDROOT] opos6ullegacy-4.1_defconfig: add Lepton utilities
commit e4d5a0ecf281cfe903f3a082561d57f5e41aa5d3
Author: Julien BOIBESSOT <jul...@ar...>
Date: Wed Oct 18 11:23:40 2017 +0200
[LINUX] 4.1-leagacy: add support for OPOS6ULL (OPOS6UL with i.MX6ULL)
commit efa1767c3bc656041af991eabcaa22c16f5b427f
Author: Julien BOIBESSOT <jul...@ar...>
Date: Wed Oct 18 11:13:37 2017 +0200
[LINUX] opos6ul: Add spidev module to 4.1-legacy config
commit 13a0a31dff924bcdb5abd2386d20c074a610e0bc
Author: Julien BOIBESSOT <jul...@ar...>
Date: Tue Oct 17 15:45:40 2017 +0200
[BUILDROOT] opos6ul: legacy-4.1: add some video related packages (gstreamer+capture+v4l2loopback)
commit e67f617eff24390d4c9f402b52d5c3268d1c1ae7
Author: Julien BOIBESSOT <jul...@ar...>
Date: Tue Oct 17 15:43:36 2017 +0200
[BUILDROOT] genimage.cfg: do not populate failsafe partition with default rootfs as it may oversize it
commit d8fcc4f29667c6626c700d0e1e80958313d1161c
Author: Julien BOIBESSOT <jul...@ar...>
Date: Mon Oct 16 16:48:03 2017 +0200
[BUILDROOT] opos6ultest_defconfig: add some packages from non test configs
commit 15cba131ba0c00ee1a8ac7fe52ce572f83ad2c0f
Author: Julien BOIBESSOT <jul...@ar...>
Date: Mon Oct 16 16:46:49 2017 +0200
[BUILDROOT] opos6ul(nano): add python-requests & links to mainline defconfigs
-----------------------------------------------------------------------
Summary of changes:
buildroot/configs/opos6ul_defconfig | 2 +
buildroot/configs/opos6ullegacy-4.1_defconfig | 42 +-
buildroot/configs/opos6ulnano_defconfig | 2 +
buildroot/configs/opos6ultest_defconfig | 8 +
.../target/device/armadeus/opos6ul/genimage.cfg | 2 +-
.../opos6ul-linux-4.1.legacy.config.fragment | 1 +
...pos6ul-and-opos6uldev-add-initial-support.patch | 685 +++++++++++++++++++++
...s-dts-fixes-imx6ul-pwm-clocks-declaration.patch | 26 +
8 files changed, 766 insertions(+), 2 deletions(-)
create mode 100644 buildroot/target/device/armadeus/opos6ul/opos6ul-linux-4.1.legacy.config.fragment
diff --git a/buildroot/configs/opos6ul_defconfig b/buildroot/configs/opos6ul_defconfig
index 7aa956a..7a3537f 100644
--- a/buildroot/configs/opos6ul_defconfig
+++ b/buildroot/configs/opos6ul_defconfig
@@ -78,6 +78,7 @@ BR2_PACKAGE_PYTHON_DATEUTIL=y
BR2_PACKAGE_PYTHON_NUMPY=y
BR2_PACKAGE_PYTHON_PAHO_MQTT=y
BR2_PACKAGE_PYTHON_PYCLI=y
+BR2_PACKAGE_PYTHON_REQUESTS_TOOLBELT=y
BR2_PACKAGE_PYTHON_SERIAL=y
BR2_PACKAGE_PYTHON_SMBUS_CFFI=y
BR2_PACKAGE_PYTHON_SPIDEV=y
@@ -102,6 +103,7 @@ BR2_PACKAGE_HOSTAPD=y
BR2_PACKAGE_IPERF=y
BR2_PACKAGE_IPROUTE2=y
BR2_PACKAGE_IW=y
+BR2_PACKAGE_LINKS=y
BR2_PACKAGE_LRZSZ=y
BR2_PACKAGE_PPPD=y
BR2_PACKAGE_RPCBIND=y
diff --git a/buildroot/configs/opos6ullegacy-4.1_defconfig b/buildroot/configs/opos6ullegacy-4.1_defconfig
index 414a766..810255b 100644
--- a/buildroot/configs/opos6ullegacy-4.1_defconfig
+++ b/buildroot/configs/opos6ullegacy-4.1_defconfig
@@ -31,17 +31,56 @@ BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git://git.freescale.com/imx/linux-imx.git"
BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="imx_4.1.15_2.0.0_ga"
BR2_LINUX_KERNEL_PATCH="../patches/linux/4.1.mx6_legacy"
BR2_LINUX_KERNEL_DEFCONFIG="imx_v7"
+BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="target/device/armadeus/opos6ul/opos6ul-linux-4.1.legacy.config.fragment"
BR2_LINUX_KERNEL_DTS_SUPPORT=y
-BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx6ul-opos6uldev"
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx6ul-opos6uldev imx6ull-opos6ulldev"
BR2_LINUX_KERNEL_INSTALL_TARGET=y
BR2_PACKAGE_BUSYBOX_CONFIG="$(ARMADEUS_PATH)/busybox.config"
BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y
+BR2_PACKAGE_DEMOS=y
+BR2_PACKAGE_ARMADEUS_DEMOS_CAPTURE=y
BR2_PACKAGE_IMXREGS=y
BR2_PACKAGE_ALSA_UTILS=y
BR2_PACKAGE_ALSA_UTILS_AMIXER=y
BR2_PACKAGE_ALSA_UTILS_APLAY=y
BR2_PACKAGE_ALSA_UTILS_SPEAKER_TEST=y
BR2_PACKAGE_FAAD2=y
+BR2_PACKAGE_GSTREAMER1=y
+BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_AUDIOTESTSRC=y
+BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOCONVERT=y
+BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_TCP=y
+BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEOTESTSRC=y
+BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_VIDEORATE=y
+BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_ALSA=y
+BR2_PACKAGE_GST1_PLUGINS_BASE_PLUGIN_PANGO=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_JPEG=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PNG=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_ALPHA=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_DEINTERLACE=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MULTIFILE=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_MULTIPART=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_RTP=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_RTPMANAGER=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_RTSP=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_UDP=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_VIDEOBOX=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_VIDEOCROP=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_VIDEOFILTER=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_VIDEOMIXER=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_V4L2=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_V4L2_PROBE=y
+BR2_PACKAGE_GST1_PLUGINS_GOOD_PLUGIN_GDKPIXBUF=y
+BR2_PACKAGE_GST1_PLUGINS_BAD=y
+BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_COMPOSITOR=y
+BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_CAMERABIN2=y
+BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_FBDEV=y
+BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_OPENH264=y
+BR2_PACKAGE_GST1_PLUGINS_BAD_PLUGIN_X265=y
+BR2_PACKAGE_GST1_PLUGINS_UGLY=y
+BR2_PACKAGE_GST1_PLUGINS_UGLY_PLUGIN_X264=y
+BR2_PACKAGE_GST1_LIBAV=y
+BR2_PACKAGE_V4L2LOOPBACK=y
BR2_PACKAGE_GDB=y
BR2_PACKAGE_LTRACE=y
BR2_PACKAGE_PV=y
@@ -70,6 +109,7 @@ BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX6UL=y
BR2_PACKAGE_I2C_TOOLS=y
BR2_PACKAGE_IMX_TEST=y
BR2_PACKAGE_KBD=y
+BR2_PACKAGE_LEPTONMODULE=y
BR2_PACKAGE_SPI_TOOLS=y
BR2_PACKAGE_UBOOT_TOOLS=y
BR2_PACKAGE_LIBVORBIS=y
diff --git a/buildroot/configs/opos6ulnano_defconfig b/buildroot/configs/opos6ulnano_defconfig
index 7aaf8a4..eb691bf 100644
--- a/buildroot/configs/opos6ulnano_defconfig
+++ b/buildroot/configs/opos6ulnano_defconfig
@@ -76,6 +76,7 @@ BR2_PACKAGE_PYTHON_DATEUTIL=y
BR2_PACKAGE_PYTHON_NUMPY=y
BR2_PACKAGE_PYTHON_PAHO_MQTT=y
BR2_PACKAGE_PYTHON_PYCLI=y
+BR2_PACKAGE_PYTHON_REQUESTS_TOOLBELT=y
BR2_PACKAGE_PYTHON_SERIAL=y
BR2_PACKAGE_PYTHON_SMBUS_CFFI=y
BR2_PACKAGE_PYTHON_SPIDEV=y
@@ -100,6 +101,7 @@ BR2_PACKAGE_HOSTAPD=y
BR2_PACKAGE_IPERF=y
BR2_PACKAGE_IPROUTE2=y
BR2_PACKAGE_IW=y
+BR2_PACKAGE_LINKS=y
BR2_PACKAGE_LRZSZ=y
BR2_PACKAGE_PPPD=y
BR2_PACKAGE_RPCBIND=y
diff --git a/buildroot/configs/opos6ultest_defconfig b/buildroot/configs/opos6ultest_defconfig
index 6583d2a..fee33a7 100644
--- a/buildroot/configs/opos6ultest_defconfig
+++ b/buildroot/configs/opos6ultest_defconfig
@@ -42,8 +42,10 @@ BR2_PACKAGE_GDB=y
BR2_PACKAGE_LTRACE=y
BR2_PACKAGE_PV=y
BR2_PACKAGE_RAMSMP=y
+BR2_PACKAGE_RT_TESTS=y
BR2_PACKAGE_SPIDEV_TEST=y
BR2_PACKAGE_STRACE=y
+BR2_PACKAGE_STRESS_NG=y
BR2_PACKAGE_DOSFSTOOLS=y
BR2_PACKAGE_DOSFSTOOLS_FATLABEL=y
BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y
@@ -86,6 +88,11 @@ BR2_PACKAGE_PYTHON_DATEUTIL=y
BR2_PACKAGE_PYTHON_NUMPY=y
BR2_PACKAGE_PYTHON_PAHO_MQTT=y
BR2_PACKAGE_PYTHON_PYCLI=y
+BR2_PACKAGE_PYTHON_PYGAME=y
+BR2_PACKAGE_PYTHON_PYGAME_IMAGE=y
+BR2_PACKAGE_PYTHON_PYGAME_EXAMPLES=y
+BR2_PACKAGE_PYTHON_PYGAME_FONT=y
+BR2_PACKAGE_PYTHON_REQUESTS_TOOLBELT=y
BR2_PACKAGE_PYTHON_SERIAL=y
BR2_PACKAGE_PYTHON_SMBUS_CFFI=y
BR2_PACKAGE_PYTHON_SPIDEV=y
@@ -122,6 +129,7 @@ BR2_PACKAGE_WIRELESS_TOOLS=y
BR2_PACKAGE_WPA_SUPPLICANT=y
BR2_PACKAGE_WPA_SUPPLICANT_CLI=y
BR2_PACKAGE_WPA_SUPPLICANT_PASSPHRASE=y
+BR2_PACKAGE_CPULOAD=y
BR2_PACKAGE_UTIL_LINUX_BINARIES=y
BR2_PACKAGE_UTIL_LINUX_FSCK=y
BR2_PACKAGE_NANO=y
diff --git a/buildroot/target/device/armadeus/opos6ul/genimage.cfg b/buildroot/target/device/armadeus/opos6ul/genimage.cfg
index 41d8f3a..ec509ed 100644
--- a/buildroot/target/device/armadeus/opos6ul/genimage.cfg
+++ b/buildroot/target/device/armadeus/opos6ul/genimage.cfg
@@ -10,7 +10,7 @@ image opos6ul-user_data.ext4 {
partition failsafe {
partition-type = 0x83
offset = 1M
- image = "rootfs.ext4"
+# image = "rootfs.ext4"
size = 128M
}
diff --git a/buildroot/target/device/armadeus/opos6ul/opos6ul-linux-4.1.legacy.config.fragment b/buildroot/target/device/armadeus/opos6ul/opos6ul-linux-4.1.legacy.config.fragment
new file mode 100644
index 0000000..a7c3a23
--- /dev/null
+++ b/buildroot/target/device/armadeus/opos6ul/opos6ul-linux-4.1.legacy.config.fragment
@@ -0,0 +1 @@
+CONFIG_SPI_SPIDEV=m
diff --git a/patches/linux/4.1.mx6_legacy/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch b/patches/linux/4.1.mx6_legacy/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch
index 71b640c..9acff9c 100644
--- a/patches/linux/4.1.mx6_legacy/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch
+++ b/patches/linux/4.1.mx6_legacy/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch
@@ -28,6 +28,14 @@ Index: linux-imx_4.1.15_2.0.0_ga/arch/arm/boot/dts/Makefile
imx6ul-14x14-evk-btwifi.dtb \
imx6ul-14x14-evk-csi.dtb \
imx6ul-14x14-evk-emmc.dtb \
+@@ -415,6 +416,7 @@ dtb-$(CONFIG_SOC_IMX6ULL) += \
+ imx6ull-14x14-ddr3-arm2-usb.dtb \
+ imx6ull-14x14-ddr3-arm2-wm8958.dtb \
+ imx6ull-14x14-evk.dtb \
++ imx6ull-opos6ulldev.dtb \
+ imx6ull-14x14-evk-btwifi.dtb \
+ imx6ull-14x14-evk-emmc.dtb \
+ imx6ull-14x14-evk-gpmi-weim.dtb \
Index: linux-imx_4.1.15_2.0.0_ga/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
===================================================================
--- /dev/null
@@ -705,3 +713,680 @@ Index: linux-imx_4.1.15_2.0.0_ga/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ };
+ };
+};
+Index: linux-imx_4.1.15_2.0.0_ga/arch/arm/boot/dts/imx6ull-opos6ull.dtsi
+===================================================================
+--- /dev/null
++++ linux-imx_4.1.15_2.0.0_ga/arch/arm/boot/dts/imx6ull-opos6ull.dtsi
+@@ -0,0 +1,212 @@
++/*
++ * Copyright 2016 Armadeus Systems <su...@ar...>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ * a) This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public
++ * License along with this file; if not, write to the Free
++ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
++ * MA 02110-1301 USA
++ *
++ * Or, alternatively,
++ *
++ * b) Permission is hereby granted, free of charge, to any person
++ * obtaining a copy of this software and associated documentation
++ * files (the "Software"), to deal in the Software without
++ * restriction, including without limitation the rights to use,
++ * copy, modify, merge, publish, distribute, sublicense, and/or
++ * sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following
++ * conditions:
++ *
++ * The above copyright notice and this permission notice shall be
++ * included in all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++#include <dt-bindings/input/input.h>
++#include "imx6ull.dtsi"
++
++/ {
++ memory {
++ reg = <0x80000000 0>; /* will be filled by U-Boot */
++ };
++
++ pxp_v4l2 {
++ compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
++ status = "okay";
++ };
++
++ reg_3v3: regulator-3v3 {
++ compatible = "regulator-fixed";
++ regulator-name = "3V3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++
++ usdhc3_pwrseq: usdhc3_pwrseq {
++ compatible = "mmc-pwrseq-simple";
++ reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
++ };
++};
++
++&cpu0 {
++ arm-supply = <®_arm>;
++ soc-supply = <®_soc>;
++ dc-supply = <®_3v3>;
++};
++
++&fec1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_enet1>;
++ phy-mode = "rmii";
++ phy-reset-duration = <1>;
++ phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
++ phy-handle = <ðphy1>;
++ phy-supply = <®_3v3>;
++ status = "okay";
++
++ mdio: mdio {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ethphy1: ethernet-phy@1 {
++ compatible = "ethernet-phy-ieee802.3-c22";
++ reg = <1>;
++ interrupt-parent = <&gpio4>;
++ interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
++ status = "okay";
++ };
++ };
++};
++
++&pxp {
++ status = "okay";
++};
++
++/* Bluetooth */
++&uart8 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart8>;
++ fsl,uart-has-rtscts;
++ status = "okay";
++};
++
++/* eMMC */
++&usdhc1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc1>;
++ bus-width = <8>;
++ no-1-8-v;
++ non-removable;
++ status = "okay";
++};
++
++/* WiFi */
++&usdhc2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc2>;
++ bus-width = <4>;
++ no-1-8-v;
++ non-removable;
++ mmc-pwrseq = <&usdhc3_pwrseq>;
++ status = "okay";
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ brcmf: bcrmf@1 {
++ compatible = "brcm,bcm4329-fmac";
++ reg = <1>;
++ interrupt-parent = <&gpio2>;
++ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
++ interrupt-names = "host-wake";
++ };
++};
++
++&iomuxc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hog_1>;
++ imx6ul-opos6ul {
++ pinctrl_enet1: enet1grp {
++ fsl,pins = <
++ MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
++ MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
++ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x130b0
++ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x130b0
++ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x130b0
++ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x130b0
++ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
++ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
++ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
++ /* INT# */
++ MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x1b0b0
++ /* RST# */
++ MX6UL_PAD_NAND_DATA00__GPIO4_IO02 0x130b0
++ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
++ >;
++ };
++
++ pinctrl_uart8: uart8grp {
++ fsl,pins = <
++ MX6UL_PAD_ENET2_TX_EN__UART8_DCE_RX 0x1b0b0
++ MX6UL_PAD_ENET2_TX_DATA1__UART8_DCE_TX 0x1b0b0
++ MX6UL_PAD_ENET2_RX_ER__UART8_DCE_RTS 0x1b0b0
++ MX6UL_PAD_ENET2_TX_CLK__UART8_DCE_CTS 0x1b0b0
++ /* BT_REG_ON */
++ MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x130b0
++ >;
++ };
++
++ pinctrl_usdhc1: usdhc1grp {
++ fsl,pins = <
++ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
++ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
++ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
++ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
++ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
++ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
++ MX6UL_PAD_NAND_READY_B__USDHC1_DATA4 0x17059
++ MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5 0x17059
++ MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6 0x17059
++ MX6UL_PAD_NAND_CLE__USDHC1_DATA7 0x17059
++ >;
++ };
++
++ pinctrl_usdhc2: usdhc2grp {
++ fsl,pins = <
++ MX6UL_PAD_LCD_DATA18__USDHC2_CMD 0x1b0b0
++ MX6UL_PAD_LCD_DATA19__USDHC2_CLK 0x100b0
++ MX6UL_PAD_LCD_DATA20__USDHC2_DATA0 0x1b0b0
++ MX6UL_PAD_LCD_DATA21__USDHC2_DATA1 0x1b0b0
++ MX6UL_PAD_LCD_DATA22__USDHC2_DATA2 0x1b0b0
++ MX6UL_PAD_LCD_DATA23__USDHC2_DATA3 0x1b0b0
++ /* WL_REG_ON */
++ MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x130b0
++ /* WL_IRQ */
++ MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x1b0b0
++ >;
++ };
++ };
++};
+Index: linux-imx_4.1.15_2.0.0_ga/arch/arm/boot/dts/imx6ull-opos6ulldev.dts
+===================================================================
+--- /dev/null
++++ linux-imx_4.1.15_2.0.0_ga/arch/arm/boot/dts/imx6ull-opos6ulldev.dts
+@@ -0,0 +1,455 @@
++/*
++ * Copyright 2016 Armadeus Systems <su...@ar...>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ * a) This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public
++ * License along with this file; if not, write to the Free
++ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
++ * MA 02110-1301 USA
++ *
++ * Or, alternatively,
++ *
++ * b) Permission is hereby granted, free of charge, to any person
++ * obtaining a copy of this software and associated documentation
++ * files (the "Software"), to deal in the Software without
++ * restriction, including without limitation the rights to use,
++ * copy, modify, merge, publish, distribute, sublicense, and/or
++ * sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following
++ * conditions:
++ *
++ * The above copyright notice and this permission notice shall be
++ * included in all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++
++#include <dt-bindings/input/input.h>
++#include "imx6ull-opos6ull.dtsi"
++
++/ {
++ model = "Armadeus Systems OPOS6ULL SoM on OPOS6ULDev board";
++ compatible = "armadeus,opos6uldev", "armadeus,opos6ull", "fsl,imx6ull";
++
++ chosen {
++ stdout-path = &uart1;
++ };
++
++ lcd_backlight {
++ compatible = "pwm-backlight";
++ pwms = <&pwm3 0 191000>;
++ brightness-levels = <0 4 8 16 32 64 128 255>;
++ default-brightness-level = <7>;
++ status = "okay";
++ };
++
++ gpio-keys {
++ compatible = "gpio-keys";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_gpio_keys>;
++
++ user-button {
++ label = "User button";
++ gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
++ linux,code = <BTN_MISC>;
++ wakeup-source;
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ user_led {
++ label = "User";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_led>;
++ gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
++ onewire {
++ compatible = "w1-gpio";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_w1>;
++ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
++ status = "okay";
++ };
++
++ reg_5v: regulator-5v {
++ compatible = "regulator-fixed";
++ regulator-name = "5V";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ };
++
++ reg_usbotg1_vbus: regulator-usbotg1vbus {
++ compatible = "regulator-fixed";
++ regulator-name = "usbotg1vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usbotg1_vbus>;
++ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ reg_usbotg2_vbus: regulator-usbotg2vbus {
++ compatible = "regulator-fixed";
++ regulator-name = "usbotg2vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usbotg2_vbus>;
++ gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>;
++ status = "okay";
++};
++
++&adc1 {
++ vref-supply = <®_3v3>;
++ status = "okay";
++};
++
++&flexcan1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_flexcan1>;
++ xceiver-supply = <®_5v>;
++ status = "okay";
++};
++
++&flexcan2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_flexcan2>;
++ xceiver-supply = <®_5v>;
++ status = "okay";
++};
++
++&ecspi4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ecspi4>;
++ fsl,spi-num-chipselects = <2>;
++ cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>;
++ status = "okay";
++
++ spidev0: spi@0 {
++ compatible = "spidev";
++ reg = <0>;
++ spi-max-frequency = <5000000>;
++ };
++
++ spidev1: spi@1 {
++ compatible = "spidev";
++ reg = <1>;
++ spi-max-frequency = <5000000>;
++ };
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c1>;
++ clock_frequency = <400000>;
++ status = "okay";
++};
++
++&i2c2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c2>;
++ clock_frequency = <400000>;
++ status = "okay";
++};
++
++&lcdif {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_lcdif>;
++ display = <&display0>;
++ disp-dev = "lcd"; /* not handled by mxsfb yet */
++ lcd-supply = <®_3v3>;
++ status = "okay";
++
++ display0: display0 {
++ bits-per-pixel = <32>;
++ bus-width = <18>;
++
++ display-timings {
++ native-mode = <&timing0>;
++
++ timing0: ST0700 {
++ clock-frequency = <33000033>;
++ hactive = <800>;
++ vactive = <480>;
++ hback-porch = <96>;
++ hfront-porch = <96>;
++ vback-porch = <20>;
++ vfront-porch = <21>;
++ hsync-len = <64>;
++ vsync-len = <4>;
++ hsync-active = <0>;
++ vsync-active = <0>;
++ de-active = <1>;
++ pixelclk-active = <0>;
++ };
++
++ timing1: LQ043 {
++ clock-frequency = <8690000>;
++ hactive = <480>;
++ vactive = <272>;
++ hback-porch = <16>;
++ hfront-porch = <16>;
++ vback-porch = <4>;
++ vfront-porch = <2>;
++ hsync-len = <4>;
++ vsync-len = <4>;
++ hsync-active = <0>;
++ vsync-active = <0>;
++ de-active = <0>;
++ pixelclk-active = <1>;
++ };
++ };
++ };
++};
++
++&snvs_pwrkey {
++ status = "disabled";
++};
++
++&tsc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_tsc>;
++ xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
++ measure-delay-time = <0xffff>;
++ pre-charge-time = <0xffff>;
++ status = "okay";
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart1>;
++ status = "okay";
++};
++
++&uart2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart2>;
++ status = "okay";
++};
++
++&usbotg1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usbotg1_id>;
++ vbus-supply = <®_usbotg1_vbus>;
++ dr_mode = "otg";
++ disable-over-current;
++ status = "okay";
++};
++
++&usbotg2 {
++ vbus-supply = <®_usbotg2_vbus>;
++ dr_mode = "host";
++ disable-over-current;
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_gpios>;
++ imx6ul-opos6uldev {
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6UL_PAD_NAND_ALE__PWM3_OUT 0x1b0b0
++ >;
++ };
++
++ pinctrl_ecspi4: ecspi4grp {
++ fsl,pins = <
++ MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK 0x1b0b0
++ MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI 0x1b0b0
++ MX6UL_PAD_NAND_DATA06__ECSPI4_MISO 0x1b0b0
++ MX6UL_PAD_NAND_DATA01__GPIO4_IO03 0x1b0b0
++ MX6UL_PAD_NAND_DATA07__GPIO4_IO09 0x1b0b0
++ >;
++ };
++
++ pinctrl_flexcan1: flexcan1grp {
++ fsl,pins = <
++ MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x0b0b0
++ MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x0b0b0
++ >;
++ };
++
++ pinctrl_flexcan2: flexcan2grp {
++ fsl,pins = <
++ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x0b0b0
++ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x0b0b0
++ >;
++ };
++
++ pinctrl_gpios: gpiosgrp {
++ fsl,pins = <
++ MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x0b0b0
++ MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x0b0b0
++ MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x0b0b0
++ MX6UL_PAD_NAND_RE_B__GPIO4_IO00 0x0b0b0
++ MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x0b0b0
++ MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x0b0b0
++ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0b0b0
++ MX6UL_PAD_NAND_WE_B__GPIO4_IO01 0x0b0b0
++ MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0
++ MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
++ MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
++ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
++ MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
++ MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0
++ MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
++ MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0
++ >;
++ };
++
++ pinctrl_w1: w1grp {
++ fsl,pins = <
++ MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
++ >;
++ };
++
++ pinctrl_gpio_keys: gpio_keysgrp {
++ fsl,pins = <
++ MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x0b0b0
++ >;
++ };
++
++ pinctrl_i2c1: i2c1grp {
++ fsl,pins = <
++ MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
++ MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
++ >;
++ };
++
++ pinctrl_i2c2: i2c2grp {
++ fsl,pins = <
++ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
++ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
++ >;
++ };
++
++ pinctrl_lcdif: lcdifgrp {
++ fsl,pins = <
++ MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x100b1
++ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x100b1
++ MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x100b1
++ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x100b1
++ MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x100b1
++ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x100b1
++ MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x100b1
++ MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x100b1
++ MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x100b1
++ MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x100b1
++ MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x100b1
++ MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x100b1
++ MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x100b1
++ MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x100b1
++ MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x100b1
++ MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x100b1
++ MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x100b1
++ MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x100b1
++ MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x100b1
++ MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x100b1
++ MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x100b1
++ MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x100b1
++ >;
++ };
++
++ pinctrl_led: ledgrp {
++ fsl,pins = <
++ MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x0b0b0
++ >;
++ };
++
++ pinctrl_tsc: tscgrp {
++ fsl,pins = <
++ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
++ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
++ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
++ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
++ >;
++ };
++
++ pinctrl_uart1: uart1grp {
++ fsl,pins = <
++ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
++ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
++ >;
++ };
++
++ pinctrl_uart2: uart2grp {
++ fsl,pins = <
++ MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
++ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
++ >;
++ };
++
++ pinctrl_usbotg1_id: usbotg1_idgrp {
++ fsl,pins = <
++ MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x1b0b0
++ >;
++ };
++
++ pinctrl_usbotg1_vbus: usbotg1_vbusgrp {
++ fsl,pins = <
++ MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b0b0
++ >;
++ };
++
++ pinctrl_usbotg2_vbus: usbotg2_vbusgrp {
++ fsl,pins = <
++ MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
++ >;
++ };
++
++ pinctrl_csi1: csi1grp {
++ fsl,pins = <
++ MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
++ MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
++ MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
++ MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
++ MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
++ MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
++ MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
++ MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
++ MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
++ MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
++ MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
++ MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
++ >;
++ };
++ };
++};
diff --git a/patches/linux/4.1.mx6_legacy/0805-armadeus-dts-fixes-imx6ul-pwm-clocks-declaration.patch b/patches/linux/4.1.mx6_legacy/0805-armadeus-dts-fixes-imx6ul-pwm-clocks-declaration.patch
index 3326173..2ad7bef 100644
--- a/patches/linux/4.1.mx6_legacy/0805-armadeus-dts-fixes-imx6ul-pwm-clocks-declaration.patch
+++ b/patches/linux/4.1.mx6_legacy/0805-armadeus-dts-fixes-imx6ul-pwm-clocks-declaration.patch
@@ -39,3 +39,29 @@ Index: linux-imx_4.1.15_2.0.0_ga/arch/arm/boot/dts/imx6ul.dtsi
clock-names = "ipg", "per";
#pwm-cells = <2>;
};
+Index: linux-imx_4.1.15_2.0.0_ga/arch/arm/boot/dts/imx6ull.dtsi
+===================================================================
+--- linux-imx_4.1.15_2.0.0_ga.orig/arch/arm/boot/dts/imx6ull.dtsi
++++ linux-imx_4.1.15_2.0.0_ga/arch/arm/boot/dts/imx6ull.dtsi
+@@ -444,8 +444,8 @@
+ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
+ reg = <0x02084000 0x4000>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clks IMX6UL_CLK_DUMMY>,
+- <&clks IMX6UL_CLK_DUMMY>;
++ clocks = <&clks IMX6UL_CLK_PWM2>,
++ <&clks IMX6UL_CLK_PWM2>;
+ clock-names = "ipg", "per";
+ #pwm-cells = <2>;
+ };
+@@ -464,8 +464,8 @@
+ compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
+ reg = <0x0208c000 0x4000>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+- clocks = <&clks IMX6UL_CLK_DUMMY>,
+- <&clks IMX6UL_CLK_DUMMY>;
++ clocks = <&clks IMX6UL_CLK_PWM4>,
++ <&clks IMX6UL_CLK_PWM4>;
+ clock-names = "ipg", "per";
+ #pwm-cells = <2>;
+ };
hooks/post-receive
--
armadeus
|