[Armadeus-commitlog] armadeus branch, master, updated. armadeus-6.0-294-gf4d84e8
Brought to you by:
sszy
|
From: Sébastien S. <ss...@us...> - 2017-07-04 15:25:53
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via f4d84e840d6e308ec127261137e0a985e87c638d (commit)
from 17129a70e089702b065de6da2db3e190af3d46f5 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f4d84e840d6e308ec127261137e0a985e87c638d
Author: Sébastien Szymanski <seb...@ar...>
Date: Tue Jul 4 17:31:51 2017 +0200
[BSP] Add OPOS6ULNANO support
-----------------------------------------------------------------------
Summary of changes:
Makefile | 1 +
.../{opos6ul_defconfig => opos6ulnano_defconfig} | 21 +-
.../armadeus/{opos6ul => opos6ulnano}/genimage.cfg | 4 +-
.../opos6ulnano/opos6ulnano-linux-4.9.35.config | 1 +
.../opos6ulnano-linux-4.9.config} | 0
.../device/armadeus/rootfs/post_image_creation.sh | 3 +
patches/linux/4.9.35 | 1 +
...Armadeus-Systems-OPOS6UL-and-OPOS6ULDEV-.patch} | 365 +++++++--------------
8 files changed, 136 insertions(+), 260 deletions(-)
copy buildroot/configs/{opos6ul_defconfig => opos6ulnano_defconfig} (88%)
copy buildroot/target/device/armadeus/{opos6ul => opos6ulnano}/genimage.cfg (79%)
create mode 120000 buildroot/target/device/armadeus/opos6ulnano/opos6ulnano-linux-4.9.35.config
copy buildroot/target/device/armadeus/{opos6ul/opos6ul-linux-4.9.config => opos6ulnano/opos6ulnano-linux-4.9.config} (100%)
create mode 120000 patches/linux/4.9.35
copy patches/linux/{4.7/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch => 4.9/0801-ARM-dts-add-Armadeus-Systems-OPOS6UL-and-OPOS6ULDEV-.patch} (57%)
diff --git a/Makefile b/Makefile
index d584c49..c16e666 100644
--- a/Makefile
+++ b/Makefile
@@ -74,6 +74,7 @@ help:
@echo ' apf6legacy-4.1_defconfig - get default config for an APF6+Dev kit (4.1 Freescale kernel)'
@echo ' opos6ul_defconfig - get default config for an OPOS6UL+Dev kit (4.8+ mainline/vanilla kernel)'
@echo ' opos6ul_legacy_defconfig - get default config for an OPOS6UL+Dev kit (3.14 Freescale kernel)'
+ @echo ' opos6ulnano_defconfig - get default config for an OPOS6ULNANO+Dev kit (4.9+ mainline/vanilla kernel)'
@echo ''
@echo 'Build:'
@echo ' all - make world '
diff --git a/buildroot/configs/opos6ul_defconfig b/buildroot/configs/opos6ulnano_defconfig
similarity index 88%
copy from buildroot/configs/opos6ul_defconfig
copy to buildroot/configs/opos6ulnano_defconfig
index 07548ad..b2b00ec 100644
--- a/buildroot/configs/opos6ul_defconfig
+++ b/buildroot/configs/opos6ulnano_defconfig
@@ -5,30 +5,28 @@ BR2_BACKUP_SITE="ftp://ftp2.armadeus.com/armadeusw/download"
BR2_CCACHE=y
BR2_CCACHE_DIR="$(TOPDIR)/.$(BR2_BOARD_NAME)-buildroot-ccache"
BR2_TOOLCHAIN_EXTERNAL=y
-BR2_ENABLE_LOCALE_PURGE=y
-BR2_TARGET_GENERIC_HOSTNAME="opos6ul"
+BR2_TARGET_GENERIC_HOSTNAME="opos6ulnano"
BR2_TARGET_GENERIC_ISSUE="Welcome to Armadeus development platform !"
BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_MDEV=y
BR2_TARGET_GENERIC_GETTY_PORT="ttymxc0"
-BR2_TARGET_TZ_INFO=y
BR2_TARGET_TZ_ZONELIST="europe"
BR2_TARGET_LOCALTIME="Europe/Paris"
BR2_ROOTFS_OVERLAY="$(ARMADEUS_PATH)/rootfs/target_overlay"
BR2_ROOTFS_POST_BUILD_SCRIPT="$(ARMADEUS_PATH)/rootfs/post_build.sh"
BR2_ROOTFS_POST_IMAGE_SCRIPT="$(ARMADEUS_PATH)/rootfs/post_image_creation.sh"
-BR2_ROOTFS_POST_SCRIPT_ARGS="opos6ul imx6ul"
+BR2_ROOTFS_POST_SCRIPT_ARGS="opos6ulnano imx6ul"
BR2_TARGET_ARMADEUS=y
-BR2_BOARD_NAME="opos6ul"
+BR2_BOARD_NAME="opos6ulnano"
BR2_CPU_NAME="imx6ul"
BR2_TARGET_ARMADEUS_SDRAM_SIZE="256"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.8.10"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.9.35"
BR2_LINUX_KERNEL_PATCH="../patches/linux/$(BR2_LINUX_KERNEL_VERSION)"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-$(BR2_LINUX_KERNEL_VERSION).config"
BR2_LINUX_KERNEL_DTS_SUPPORT=y
-BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx6ul-opos6uldev"
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx6ul-opos6ulnanodev"
BR2_LINUX_KERNEL_INSTALL_TARGET=y
BR2_PACKAGE_BUSYBOX_CONFIG="$(ARMADEUS_PATH)/busybox.config"
BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y
@@ -113,12 +111,13 @@ BR2_TARGET_ROOTFS_EXT2_4=y
BR2_TARGET_ROOTFS_EXT2_LABEL="ROOTFS"
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
-BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
+BR2_TARGET_UBOOT_BOARDNAME="opos6ulnanodev"
BR2_TARGET_UBOOT_CUSTOM_GIT=y
BR2_TARGET_UBOOT_CUSTOM_REPO_URL="git://git.code.sf.net/p/armadeus/u-boot"
-BR2_TARGET_UBOOT_CUSTOM_REPO_VERSION="opos6ul"
-BR2_TARGET_UBOOT_BOARD_DEFCONFIG="opos6ul"
-BR2_TARGET_UBOOT_FORMAT_IMG=y
+BR2_TARGET_UBOOT_CUSTOM_REPO_VERSION="2235ebc2870f1bd38b7167640dd7f00c5278d1bc"
+BR2_TARGET_UBOOT_BOARD_DEFCONFIG="opos6ulnanodev"
+# BR2_TARGET_UBOOT_FORMAT_BIN is not set
+BR2_TARGET_UBOOT_FORMAT_DTB_IMG=y
BR2_TARGET_UBOOT_SPL=y
BR2_TARGET_UBOOT_SPL_NAME="SPL"
BR2_PACKAGE_HOST_E2TOOLS=y
diff --git a/buildroot/target/device/armadeus/opos6ul/genimage.cfg b/buildroot/target/device/armadeus/opos6ulnano/genimage.cfg
similarity index 79%
copy from buildroot/target/device/armadeus/opos6ul/genimage.cfg
copy to buildroot/target/device/armadeus/opos6ulnano/genimage.cfg
index 41d8f3a..62e250a 100644
--- a/buildroot/target/device/armadeus/opos6ul/genimage.cfg
+++ b/buildroot/target/device/armadeus/opos6ulnano/genimage.cfg
@@ -1,9 +1,9 @@
-# Image for the OPOS6UL eMMC "User Data" partition
+# Image for the OPOS6UL NANO eMMC "User Data" partition
#
# For details about the layout, see:
# http://www.armadeus.org/wiki/index.php?title=EMMC_OPOS6UL
-image opos6ul-user_data.ext4 {
+image opos6ulnano-user_data.ext4 {
hdimage {
}
diff --git a/buildroot/target/device/armadeus/opos6ulnano/opos6ulnano-linux-4.9.35.config b/buildroot/target/device/armadeus/opos6ulnano/opos6ulnano-linux-4.9.35.config
new file mode 120000
index 0000000..d982689
--- /dev/null
+++ b/buildroot/target/device/armadeus/opos6ulnano/opos6ulnano-linux-4.9.35.config
@@ -0,0 +1 @@
+opos6ulnano-linux-4.9.config
\ No newline at end of file
diff --git a/buildroot/target/device/armadeus/opos6ul/opos6ul-linux-4.9.config b/buildroot/target/device/armadeus/opos6ulnano/opos6ulnano-linux-4.9.config
similarity index 100%
copy from buildroot/target/device/armadeus/opos6ul/opos6ul-linux-4.9.config
copy to buildroot/target/device/armadeus/opos6ulnano/opos6ulnano-linux-4.9.config
diff --git a/buildroot/target/device/armadeus/rootfs/post_image_creation.sh b/buildroot/target/device/armadeus/rootfs/post_image_creation.sh
index f89a763..8d18a1a 100755
--- a/buildroot/target/device/armadeus/rootfs/post_image_creation.sh
+++ b/buildroot/target/device/armadeus/rootfs/post_image_creation.sh
@@ -40,6 +40,9 @@ if [ "$2" != "" ]; then
# APF6
symlink_image $1 SPL $2-u-boot.spl
symlink_image $1 u-boot.img $2-u-boot.img
+
+ # OPOS6ULNANO
+ symlink_image $1 u-boot-dtb.img $2-u-boot.img
else
# Old BR compat
BOARD_NAME=`grep 'BR2_BOARD_NAME=' $BUILDROOT_CONFIG | cut -d = -f 2 | sed s/\"//g`
diff --git a/patches/linux/4.9.35 b/patches/linux/4.9.35
new file mode 120000
index 0000000..899dd4f
--- /dev/null
+++ b/patches/linux/4.9.35
@@ -0,0 +1 @@
+4.9
\ No newline at end of file
diff --git a/patches/linux/4.7/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch b/patches/linux/4.9/0801-ARM-dts-add-Armadeus-Systems-OPOS6UL-and-OPOS6ULDEV-.patch
similarity index 57%
copy from patches/linux/4.7/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch
copy to patches/linux/4.9/0801-ARM-dts-add-Armadeus-Systems-OPOS6UL-and-OPOS6ULDEV-.patch
index 28d1943..bba6cd5 100644
--- a/patches/linux/4.7/0800-ARM-dts-opos6ul-and-opos6uldev-add-initial-support.patch
+++ b/patches/linux/4.9/0801-ARM-dts-add-Armadeus-Systems-OPOS6UL-and-OPOS6ULDEV-.patch
@@ -1,40 +1,45 @@
-From c753be8ed1438150ad427c5d8c84e86f9c70109f Mon Sep 17 00:00:00 2001
+From fedc05ba2fc3e6060a6003c1b37d31773c8ccb3a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?=
<seb...@ar...>
-Date: Thu, 2 Jun 2016 18:53:59 +0200
-Subject: [PATCH 1/1] ARM: dts: opos6ul and opos6uldev add initial support
+Date: Thu, 22 Jun 2017 10:28:57 +0200
+Subject: [PATCH 1/1] ARM: dts: add Armadeus Systems OPOS6UL and OPOS6ULDEV
+ support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
+OPOS6ULNano is an i.MX6UL based SoM.
+OPOS6ULNanoDev is a carrier board for the OPOS6ULNano SoM.
+
Signed-off-by: Sébastien Szymanski <seb...@ar...>
---
- arch/arm/boot/dts/Makefile | 1 +
- arch/arm/boot/dts/imx6ul-opos6ul.dtsi | 181 ++++++++++++++
- arch/arm/boot/dts/imx6ul-opos6uldev.dts | 407 ++++++++++++++++++++++++++++++++
- 3 files changed, 589 insertions(+)
- create mode 100644 arch/arm/boot/dts/imx6ul-opos6ul.dtsi
- create mode 100644 arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi | 194 +++++++++++++++++++++
+ arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts | 251 ++++++++++++++++++++++++++++
+ 3 files changed, 446 insertions(+)
+ create mode 100644 arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi
+ create mode 100644 arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts
-Index: linux-4.7.10/arch/arm/boot/dts/Makefile
-===================================================================
---- linux-4.7.10.orig/arch/arm/boot/dts/Makefile
-+++ linux-4.7.10/arch/arm/boot/dts/Makefile
-@@ -393,6 +393,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
- imx6sx-sdb.dtb
- dtb-$(CONFIG_SOC_IMX6UL) += \
- imx6ul-14x14-evk.dtb \
-+ imx6ul-opos6uldev.dtb \
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 9c5e1d9..dcbb2b0 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -467,6 +467,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
+ imx6ul-isiot-nand.dtb \
+ imx6ul-liteboard.dtb \
+ imx6ul-opos6uldev.dtb \
++ imx6ul-opos6ulnanodev.dtb \
imx6ul-pico-hobbit.dtb \
imx6ul-tx6ul-0010.dtb \
imx6ul-tx6ul-0011.dtb \
-Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
-===================================================================
+diff --git a/arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi b/arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi
+new file mode 100644
+index 0000000..cb89eba
--- /dev/null
-+++ linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
-@@ -0,0 +1,181 @@
++++ b/arch/arm/boot/dts/imx6ul-opos6ulnano.dtsi
+@@ -0,0 +1,194 @@
+/*
-+ * Copyright 2016 Armadeus Systems
++ * Copyright 2017 Armadeus Systems <su...@ar...>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
@@ -83,18 +88,29 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
+#include "imx6ul.dtsi"
+
+/ {
-+ usdhc3_pwrseq: usdhc3_pwrseq {
++ memory {
++ reg = <0x80000000 0>; /* will be filled by U-Boot */
++ };
++
++ reg_3v3: regulator-3v3 {
++ compatible = "regulator-fixed";
++ regulator-name = "3V3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++
++ usdhc2_pwrseq: usdhc2-pwrseq {
+ compatible = "mmc-pwrseq-simple";
-+ reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
++ reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
+ };
+};
+
-+&fec1 {
++&fec2 {
+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_enet1>;
++ pinctrl-0 = <&pinctrl_enet2>;
+ phy-mode = "rmii";
+ phy-reset-duration = <1>;
-+ phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
++ phy-reset-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
+ phy-handle = <ðphy1>;
+ phy-supply = <®_3v3>;
+ status = "okay";
@@ -106,18 +122,18 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
+ ethphy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
-+ interrupt-parent = <&gpio4>;
-+ interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
++ interrupt-parent = <&gpio2>;
++ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+ status = "okay";
+ };
+ };
+};
+
+/* Bluetooth */
-+&uart8 {
++&uart3 {
+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart8>;
-+ fsl,uart-has-rtscts;
++ pinctrl-0 = <&pinctrl_uart3>;
++ uart-has-rtscts;
+ status = "okay";
+};
+
@@ -138,61 +154,63 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
+ bus-width = <4>;
+ no-1-8-v;
+ non-removable;
-+ mmc-pwrseq = <&usdhc3_pwrseq>;
++ mmc-pwrseq = <&usdhc2_pwrseq>;
+ status = "okay";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
-+ brcmf: bcrmf@1 {
++ brcmf: brcmf@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
-+ interrupt-parent = <&gpio2>;
-+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
++ /*
++ interrupt-parent = <&gpio4>;
++ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "host-wake";
++ */
+ };
+};
+
+&iomuxc {
-+ pinctrl_enet1: enet1grp {
++ pinctrl_enet2: enet2grp {
+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
-+ MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
-+ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x130b0
-+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x130b0
++ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
++ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
++ MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x130b0
++ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x130b0
+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x130b0
-+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x130b0
-+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
-+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
-+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
++ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x130b0
++ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
++ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
++ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
+ /* INT# */
-+ MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x1b0b0
++ MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x1b0b0
+ /* RST# */
-+ MX6UL_PAD_NAND_DATA00__GPIO4_IO02 0x130b0
-+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
++ MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x130b0
++ MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
+ >;
+ };
+
-+ pinctrl_uart8: uart8grp {
++ pinctrl_uart3: uart3grp {
+ fsl,pins = <
-+ MX6UL_PAD_ENET2_TX_EN__UART8_DCE_RX 0x1b0b0
-+ MX6UL_PAD_ENET2_TX_DATA1__UART8_DCE_TX 0x1b0b0
-+ MX6UL_PAD_ENET2_RX_ER__UART8_DCE_RTS 0x1b0b0
-+ MX6UL_PAD_ENET2_TX_CLK__UART8_DCE_CTS 0x1b0b0
++ MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b0
++ MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b0
++ MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b0
++ MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b0
+ /* BT_REG_ON */
-+ MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x130b0
++ MX6UL_PAD_NAND_DATA01__GPIO4_IO03 0x130b0
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
-+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
-+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
-+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
-+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
-+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
-+ MX6UL_PAD_NAND_READY_B__USDHC1_DATA4 0x17059
++ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
++ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
++ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
++ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
++ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
++ MX6UL_PAD_NAND_READY_B__USDHC1_DATA4 0x17059
+ MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5 0x17059
+ MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6 0x17059
+ MX6UL_PAD_NAND_CLE__USDHC1_DATA7 0x17059
@@ -201,26 +219,27 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
-+ MX6UL_PAD_LCD_DATA18__USDHC2_CMD 0x1b0b0
-+ MX6UL_PAD_LCD_DATA19__USDHC2_CLK 0x100b0
-+ MX6UL_PAD_LCD_DATA20__USDHC2_DATA0 0x1b0b0
++ MX6UL_PAD_LCD_DATA18__USDHC2_CMD 0x1b0b0
++ MX6UL_PAD_LCD_DATA19__USDHC2_CLK 0x100b0
++ MX6UL_PAD_LCD_DATA20__USDHC2_DATA0 0x1b0b0
+ MX6UL_PAD_LCD_DATA21__USDHC2_DATA1 0x1b0b0
+ MX6UL_PAD_LCD_DATA22__USDHC2_DATA2 0x1b0b0
+ MX6UL_PAD_LCD_DATA23__USDHC2_DATA3 0x1b0b0
+ /* WL_REG_ON */
-+ MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x130b0
++ MX6UL_PAD_NAND_DATA06__GPIO4_IO08 0x130b0
+ /* WL_IRQ */
-+ MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x1b0b0
++ MX6UL_PAD_NAND_DATA02__GPIO4_IO04 0x130b0
+ >;
+ };
+};
-Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6uldev.dts
-===================================================================
+diff --git a/arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts b/arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts
+new file mode 100644
+index 0000000..1a542d1
--- /dev/null
-+++ linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6uldev.dts
-@@ -0,0 +1,402 @@
++++ b/arch/arm/boot/dts/imx6ul-opos6ulnanodev.dts
+@@ -0,0 +1,251 @@
+/*
-+ * Copyright 2016 Armadeus Systems
++ * Copyright 2017 Armadeus Systems <su...@ar...>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
@@ -267,109 +286,40 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ */
+
+/dts-v1/;
-+#include "imx6ul-opos6ul.dtsi"
++#include "imx6ul-opos6ulnano.dtsi"
+
+/ {
-+ model = "Armadeus Systems OPOS6UL SoM on OPOS6ULDev board";
-+ compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ul";
++ model = "Armadeus Systems OPOS6UL Nano SoM on OPOS6ULDev board (customized for OPOS6UL Nano)";
++ compatible = "armadeus,opos6ulnanodev", "armadeus,opos6ulnano", "fsl,imx6ul";
+
+ chosen {
+ stdout-path = &uart1;
+ };
+
-+ memory {
-+ reg = <0x80000000 0>; /* will be filled by U-Boot */
-+ };
-+
-+ backlight {
-+ compatible = "gpio-backlight";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_backlight>;
-+ gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
-+ default-on;
-+ };
-+
-+ gpio-keys {
-+ compatible = "gpio-keys";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_gpio_keys>;
-+
-+ user-button {
-+ label = "User button";
-+ gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
-+ linux,code = <BTN_MISC>;
-+ wakeup-source;
-+ };
-+ };
-+
+ leds {
+ compatible = "gpio-leds";
+
-+ user_led {
++ user-led {
+ label = "User";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_led>;
-+ gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
++ gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
-+ reg_3v3: regulator-3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "3V3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
-+
-+ reg_usbotg1_vbus: regulator-usbotg1vbus {
-+ compatible = "regulator-fixed";
-+ regulator-name = "usbotg1vbus";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usbotg1_vbus>;
-+ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
-+ enable-active-high;
-+ };
-+
-+ reg_usbotg2_vbus: regulator-usbotg2vbus {
-+ compatible = "regulator-fixed";
-+ regulator-name = "usbotg2vbus";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usbotg2_vbus>;
-+ gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
-+ enable-active-high;
-+ };
-+};
-+
-+&can1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_flexcan1>;
-+ xceiver-supply = <®_5v>;
-+ status = "okay";
-+};
-+
-+&can2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_flexcan2>;
-+ xceiver-supply = <®_5v>;
-+ status = "okay";
+};
+
-+&ecspi4 {
++&ecspi2 {
+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ecspi4>;
-+ fsl,spi-num-chipselects = <2>;
-+ cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>;
++ pinctrl-0 = <&pinctrl_ecspi2>;
++ cs-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ spidev0: spi@0 {
@@ -377,12 +327,6 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ };
-+
-+ spidev1: spi@1 {
-+ compatible = "spidev";
-+ reg = <1>;
-+ spi-max-frequency = <5000000>;
-+ };
+};
+
+&i2c1 {
@@ -421,8 +365,6 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ vfront-porch = <21>;
+ hsync-len = <64>;
+ vsync-len = <4>;
-+ hsync-active = <0>;
-+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
@@ -434,15 +376,6 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ status = "disabled";
+};
+
-+&tsc {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_tsc>;
-+ xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
-+ measure-delay-time = <0xffff>;
-+ pre-charge-time = <0xfff>;
-+ status = "okay";
-+};
-+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
@@ -456,16 +389,14 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+};
+
+&usbotg1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usbotg1_id>;
-+ vbus-supply = <®_usbotg1_vbus>;
-+ dr_mode = "otg";
++ vbus-supply = <®_5v>;
++ dr_mode = "peripheral";
+ disable-over-current;
+ status = "okay";
+};
+
+&usbotg2 {
-+ vbus-supply = <®_usbotg2_vbus>;
++ vbus-supply = <®_5v>;
+ dr_mode = "host";
+ disable-over-current;
+ status = "okay";
@@ -475,61 +406,25 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpios>;
+
-+ pinctrl_backlight: backlightgrp {
++ pinctrl_ecspi2: ecspi2grp {
+ fsl,pins = <
-+ MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x1b0b0
-+ >;
-+ };
-+
-+ pinctrl_ecspi4: ecspi4grp {
-+ fsl,pins = <
-+ MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK 0x1b0b0
-+ MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI 0x1b0b0
-+ MX6UL_PAD_NAND_DATA06__ECSPI4_MISO 0x1b0b0
-+ MX6UL_PAD_NAND_DATA01__GPIO4_IO03 0x1b0b0
-+ MX6UL_PAD_NAND_DATA07__GPIO4_IO09 0x1b0b0
-+ >;
-+ };
-+
-+ pinctrl_flexcan1: flexcan1grp {
-+ fsl,pins = <
-+ MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x0b0b0
-+ MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x0b0b0
-+ >;
-+ };
-+
-+ pinctrl_flexcan2: flexcan2grp {
-+ fsl,pins = <
-+ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x0b0b0
-+ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x0b0b0
++ MX6UL_PAD_CSI_DATA00__ECSPI2_SCLK 0x1b0b0
++ MX6UL_PAD_CSI_DATA02__ECSPI2_MOSI 0x1b0b0
++ MX6UL_PAD_CSI_DATA03__ECSPI2_MISO 0x1b0b0
++ MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x1b0b0
+ >;
+ };
+
+ pinctrl_gpios: gpiosgrp {
+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x0b0b0
-+ MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x0b0b0
-+ MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x0b0b0
-+ MX6UL_PAD_NAND_RE_B__GPIO4_IO00 0x0b0b0
-+ MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x0b0b0
-+ MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x0b0b0
-+ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0b0b0
-+ MX6UL_PAD_NAND_WE_B__GPIO4_IO01 0x0b0b0
-+ MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0
-+ MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
-+ MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
-+ MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
-+ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
-+ MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
-+ MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0
-+ MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
-+ MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0
-+ >;
-+ };
-+
-+ pinctrl_gpio_keys: gpio_keysgrp {
-+ fsl,pins = <
-+ MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x0b0b0
++ MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x1b0b0
++ MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x1b0b0
++ MX6UL_PAD_CSI_MCLK__GPIO4_IO17 0x1b0b0
++ MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18 0x1b0b0
++ MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b0b0
++ MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b0b0
++ MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x1b0b0
++ MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x1b0b0
+ >;
+ };
+
@@ -576,16 +471,7 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+
+ pinctrl_led: ledgrp {
+ fsl,pins = <
-+ MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x0b0b0
-+ >;
-+ };
-+
-+ pinctrl_tsc: tscgrp {
-+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
-+ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
-+ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
-+ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
++ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x0b0b0
+ >;
+ };
+
@@ -602,22 +488,7 @@ Index: linux-4.7.10/arch/arm/boot/dts/imx6ul-opos6uldev.dts
+ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
+ >;
+ };
-+
-+ pinctrl_usbotg1_id: usbotg1_idgrp {
-+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x1b0b0
-+ >;
-+ };
-+
-+ pinctrl_usbotg1_vbus: usbotg1_vbusgrp {
-+ fsl,pins = <
-+ MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b0b0
-+ >;
-+ };
-+
-+ pinctrl_usbotg2_vbus: usbotg2_vbusgrp {
-+ fsl,pins = <
-+ MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
-+ >;
-+ };
+};
+--
+2.7.3
+
hooks/post-receive
--
armadeus
|