[Armadeus-commitlog] armadeus branch, master, updated. armadeus-5.3-591-g420fea6
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-5.3-591-g420fea6
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From: jorasse <jo...@us...> - 2015-02-14 16:28:43
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the project "armadeus".
The branch, master has been updated
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via 6bea31cb6280b41bcd9050dd1e4d14353383e7fb (commit)
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- Log -----------------------------------------------------------------
commit 420fea6d72ba9af7e1ffdc5848a04956a8d1d44c
Merge: 6bea31c 0311ec9
Author: Eric Jarrige <eri...@ar...>
Date: Sat Feb 14 17:27:55 2015 +0100
Merge branch 'master' of ssh://git.code.sf.net/p/armadeus/code
commit 6bea31cb6280b41bcd9050dd1e4d14353383e7fb
Author: Eric Jarrige <eri...@ar...>
Date: Sat Feb 14 17:27:37 2015 +0100
[UBOOT] 2015.01: update apf6 U-Boot config and fix compilation
-----------------------------------------------------------------------
Summary of changes:
...apf6-u-boot-2014.07.h => apf6-u-boot-2015.01.h} | 0
patches/u-boot/2015.01/600-add-apf6.patch | 90 ++++++++++----------
2 files changed, 45 insertions(+), 45 deletions(-)
copy buildroot/target/device/armadeus/apf6/{apf6-u-boot-2014.07.h => apf6-u-boot-2015.01.h} (100%)
diff --git a/buildroot/target/device/armadeus/apf6/apf6-u-boot-2014.07.h b/buildroot/target/device/armadeus/apf6/apf6-u-boot-2015.01.h
similarity index 100%
copy from buildroot/target/device/armadeus/apf6/apf6-u-boot-2014.07.h
copy to buildroot/target/device/armadeus/apf6/apf6-u-boot-2015.01.h
diff --git a/patches/u-boot/2015.01/600-add-apf6.patch b/patches/u-boot/2015.01/600-add-apf6.patch
index 569a1ba..a153901 100644
--- a/patches/u-boot/2015.01/600-add-apf6.patch
+++ b/patches/u-boot/2015.01/600-add-apf6.patch
@@ -28,7 +28,7 @@ Index: uboot-2015.01/configs/apf6_defconfig
+++ uboot-2015.01/configs/apf6_defconfig
@@ -0,0 +1,4 @@
+CONFIG_SPL=y
-+CONFIG_SYS_EXTRA_OPTIONS="SPL,MX6DL"
++CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL,SPL"
++S:CONFIG_ARM=y
++S:CONFIG_TARGET_APF6=y
Index: uboot-2015.01/board/armadeus/apf6/Kconfig
@@ -122,74 +122,74 @@ Index: uboot-2015.01/board/armadeus/apf6/apf6.c
+#define ETH_PHY_RESET IMX_GPIO_NR(1, 24)
+
+static iomux_v3_cfg_t const uart4_pads[] = {
-+ MX6_PAD_CSI0_DAT12__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-+ MX6_PAD_CSI0_DAT13__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
++ IOMUX_PADS(PAD_CSI0_DAT12__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
++ IOMUX_PADS(PAD_CSI0_DAT13__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+
+static iomux_v3_cfg_t const usdhc2_pads[] = {
-+ MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL),
++ IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
+static iomux_v3_cfg_t const usdhc3_pads[] = {
-+ MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-+ MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
++ IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
++ IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
+
+static iomux_v3_cfg_t const enet_pads[] = {
-+ MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-+ MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL2),
-+ MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL2),
-+ MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
++ IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
++ IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL2)),
++ IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL2)),
++ IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ /* AR8035 PHY Reset */
-+ MX6_PAD_ENET_RX_ER__GPIO1_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL),
++ IOMUX_PADS(PAD_ENET_RX_ER__GPIO1_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ /* AR8035 INT */
-+ MX6_PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL),
++ IOMUX_PADS(PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
+static iomux_v3_cfg_t const fpga_pads[] = {
+ /* FPGA AS_DATA enet_txd1*/
-+ MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(FPGA_PAD_CTRL),
++ IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(FPGA_PAD_CTRL)),
+ /* FPGA DCLK enet_rxd0*/
-+ MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(FPGA_PAD_CTRL),
++ IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(FPGA_PAD_CTRL)),
+ /* FPGA CONF_DONE enet_rxd1*/
-+ MX6_PAD_ENET_RXD1__GPIO1_IO26 | MUX_PAD_CTRL(FPGA_PAD_CTRL),
++ IOMUX_PADS(PAD_ENET_RXD1__GPIO1_IO26 | MUX_PAD_CTRL(FPGA_PAD_CTRL)),
+ /* FPGA NCONFIG EIM_D26*/
-+ MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(FPGA_PAD_CTRL),
++ IOMUX_PADS(PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(FPGA_PAD_CTRL)),
+ /* FPGA NSTATUS EIM_D27*/
-+ MX6_PAD_EIM_D27__GPIO3_IO27 | MUX_PAD_CTRL(FPGA_PAD_CTRL),
++ IOMUX_PADS(PAD_EIM_D27__GPIO3_IO27 | MUX_PAD_CTRL(FPGA_PAD_CTRL)),
+ /* FPGA CVP_CONFDONE EIM_D22*/
-+ MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(FPGA_PAD_CTRL),
++ IOMUX_PADS(PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(FPGA_PAD_CTRL)),
+ /* FPGA PERSTL0# EIM_D18*/
-+ MX6_PAD_EIM_D18__GPIO3_IO18 | MUX_PAD_CTRL(FPGA_PAD_CTRL),
++ IOMUX_PADS(PAD_EIM_D18__GPIO3_IO18 | MUX_PAD_CTRL(FPGA_PAD_CTRL)),
+};
+
+static iomux_v3_cfg_t const usb_pads[] = {
-+ MX6_PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(USB_PAD_CTRL),
++ IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(USB_PAD_CTRL)),
+};
+
+static void setup_iomux_uart(void)
hooks/post-receive
--
armadeus
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