[Armadeus-commitlog] armadeus branch, master, updated. armadeus-5.3-482-gfc1d5bc
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-5.3-482-gfc1d5bc
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From: Nicolas <th...@us...> - 2014-11-18 12:55:54
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the project "armadeus".
The branch, master has been updated
via fc1d5bcdc7eecd6e6f6ba4d96c7626ebd6fdc783 (commit)
from ad95ac1866cc55a170e834bde1f86901dc3f4fc8 (commit)
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- Log -----------------------------------------------------------------
commit fc1d5bcdc7eecd6e6f6ba4d96c7626ebd6fdc783
Author: Nicolas Colombain <nic...@ar...>
Date: Tue Nov 18 13:55:08 2014 +0100
[UBOOT] fix error in 128MB DDR parameters
-----------------------------------------------------------------------
Summary of changes:
.../device/armadeus/apf27/apf27-u-boot-1.3.4.h | 4 ++--
.../device/armadeus/apf27/apf27-u-boot-2010.03.h | 4 ++--
.../device/armadeus/apf27/apf27-u-boot-2012.04.h | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/buildroot/target/device/armadeus/apf27/apf27-u-boot-1.3.4.h b/buildroot/target/device/armadeus/apf27/apf27-u-boot-1.3.4.h
index 8b5caa1..f822e15 100644
--- a/buildroot/target/device/armadeus/apf27/apf27-u-boot-1.3.4.h
+++ b/buildroot/target/device/armadeus/apf27/apf27-u-boot-1.3.4.h
@@ -471,8 +471,8 @@
#define CFG_SDRAM_1_SIZE 0x08000000 /* 128 MB */
#define CFG_SDRAM_2_BASE 0xB0000000 /* SDRAM bank #1 32bits */
#define CFG_SDRAM_2_SIZE 0x08000000 /* 128 MB */
-#define CFG_SDRAM_NUM_COL 9 /* 8, 9, 10 or 11 column address bits */
-#define CFG_SDRAM_NUM_ROW 14 /* 11, 12 or 13 row address bits */
+#define CFG_SDRAM_NUM_COL 10 /* 8, 9, 10 or 11 column address bits */
+#define CFG_SDRAM_NUM_ROW 13 /* 11, 12 or 13 row address bits */
#define CFG_SDRAM_REFRESH 3 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
#define CFG_SDRAM_EXIT_PWD 25 /* ns exit power down delay */
#define CFG_SDRAM_W2R_DELAY 1 /* write to read cycle delay > 0 */
diff --git a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2010.03.h b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2010.03.h
index c5a9e1d..ce71264 100644
--- a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2010.03.h
+++ b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2010.03.h
@@ -467,8 +467,8 @@
#define CONFIG_SYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
#define CONFIG_SYS_SDRAM_2_BASE 0xB0000000 /* SDRAM bank #1 32bits */
#define CONFIG_SYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
-#define CONFIG_SYS_SDRAM_NUM_COL 9 /* 8, 9, 10 or 11 column address bits */
-#define CONFIG_SYS_SDRAM_NUM_ROW 14 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_NUM_COL 10 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 13 /* 11, 12 or 13 row address bits */
#define CONFIG_SYS_SDRAM_REFRESH 3 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
#define CONFIG_SYS_SDRAM_EXIT_PWD 25 /* ns exit power down delay */
#define CONFIG_SYS_SDRAM_W2R_DELAY 1 /* write to read cycle delay > 0 */
diff --git a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2012.04.h b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2012.04.h
index 224e332..8769db0 100644
--- a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2012.04.h
+++ b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2012.04.h
@@ -538,8 +538,8 @@
/* micron 128MB */
#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
-#define CONFIG_SYS_SDRAM_NUM_COL 9 /* 8, 9, 10 or 11 column address bits */
-#define CONFIG_SYS_SDRAM_NUM_ROW 14 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_NUM_COL 10 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 13 /* 11, 12 or 13 row address bits */
#define CONFIG_SYS_SDRAM_REFRESH 3 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
#define CONFIG_SYS_SDRAM_EXIT_PWD 25 /* ns exit power down delay */
#define CONFIG_SYS_SDRAM_W2R_DELAY 1 /* write to read cycle delay > 0 */
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