[Armadeus-commitlog] armadeus branch, master, updated. armadeus-5.3-201-gaca1c00

SourceForge Headquarters 1320 Columbia Street Suite 310 San Diego, CA 92101 +1 (858) 422-6466

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  aca1c003dc9ac9fe68c9bf9517b2d0407f0da6d0 (commit)
      from  ec293273e1f3be6a16c1111b119a748340346cf8 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit aca1c003dc9ac9fe68c9bf9517b2d0407f0da6d0
Author: Eric Jarrige <eri...@ar...>
Date:   Fri Mar 28 00:54:41 2014 +0100

     [UBOOT] 2014.04: apf27: add default configuration

-----------------------------------------------------------------------

Summary of changes:
 ...f27-u-boot-2013.04.h => apf27-u-boot-2014.04.h} |   84 +++++++++----------
 1 files changed, 40 insertions(+), 44 deletions(-)
 copy buildroot/target/device/armadeus/apf27/{apf27-u-boot-2013.04.h => apf27-u-boot-2014.04.h} (89%)

diff --git a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2013.04.h b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2014.04.h
similarity index 89%
copy from buildroot/target/device/armadeus/apf27/apf27-u-boot-2013.04.h
copy to buildroot/target/device/armadeus/apf27/apf27-u-boot-2014.04.h
index ad7006c..f395b8d 100644
--- a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2013.04.h
+++ b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2014.04.h
@@ -1,7 +1,10 @@
 /*
+ *
+ * Configuration settings for the Armadeus Project motherboard APF27
+ *
  * Copyright (C) 2008-2014 Eric Jarrige <eri...@ar...>
  *
- * SPDX-License-Identifier:Â Â Â Â Â GPL-2.0+
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -18,15 +21,12 @@
 #define CONFIG_ARM926EJS		/* this is an ARM926EJS CPU */
 #define CONFIG_MX27			/* in a Freescale i.MX27 Chip */
 #define CONFIG_MACH_TYPE	1698	/* APF27 */
+#define CONFIG_SYS_GENERIC_BOARD
 
 /*
  * Enable the call to miscellaneous platform dependent initialization.
  */
 #define CONFIG_SYS_NO_FLASH	/* to be define before <config_cmd_default.h> */
-#define CONFIG_BOARD_EARLY_INIT_F
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
 
 /*
  * Board display option
@@ -37,22 +37,18 @@
 /*
  * SPL
  */
-/* Copy SPL+U-Boot here	     */
-#define CONFIG_SYS_NAND_U_BOOT_DST	(CONFIG_SYS_TEXT_BASE - 0x800)
-/* Size is the partion size  */
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	CONFIG_SYS_MONITOR_LEN
-/* Build image with spl and u-boot */
-#define CONFIG_SPL_PAD_TO		0x00000800
-
-/*
- * SPL
- */
-#define	CONFIG_SPL
-#define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
-#define CONFIG_SPL_TEXT_BASE            0xa0000000
-#define CONFIG_SPL_STACK                0xffffff00
-#define CONFIG_SYS_NAND_U_BOOT_START    0xa0000800
+#define CONFIG_SPL
+#define CONFIG_SPL_TARGET	"u-boot-with-spl.bin"
+#define CONFIG_SPL_LDSCRIPT	"arch/$(ARCH)/cpu/u-boot-spl.lds"
+#define CONFIG_SPL_MAX_SIZE	2048
+#define CONFIG_SPL_TEXT_BASE    0xA0000000
+
+/* NAND boot config */
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x800
+#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	CONFIG_SYS_MONITOR_LEN - 0x800
 
 /*
  * BOOTP options
@@ -114,7 +110,7 @@
 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_SDRAM_BASE	\
 		+ PHYS_SDRAM_1_SIZE - 0x0100000)
 
-#define CONFIG_SYS_TEXT_BASE	0xA0000800
+#define CONFIG_SYS_TEXT_BASE		0xA0000800
 
 /*
  * FLASH organization
@@ -206,12 +202,12 @@
 	"kernel_addr="		__stringify(CONFIG_KERNEL_OFFSET)	"\0" \
 	"rootfs_addr="		__stringify(CONFIG_ROOTFS_OFFSET)	"\0" \
 	"board_name="		__stringify(CONFIG_BOARD_NAME)		"\0" \
-	"kernel_addr_r=A0000000\0"					\
+	"kernel_addr_r=A0000000\0" \
 	"check_env=if test -n ${flash_env_version}; "			\
 		"then env default env_version; "			\
 		"else env set flash_env_version ${env_version}; env save; "\
 		"fi; "							\
-		"if itest ${flash_env_version} != ${env_version}; then " \
+		"if itest ${flash_env_version} < ${env_version}; then " \
 			"echo \"*** Warning - Environment version"	\
 			" change suggests: run flash_reset_env; reset\"; "\
 			"env default flash_reset_env; "			\
@@ -220,14 +216,13 @@
 	"flash_reset_env=env default -f -a && saveenv &&"		\
 		"echo Flash environment variables erased!\0"		\
 	"download_uboot=tftpboot ${loadaddr} ${board_name}"		\
-		"-u-boot-with-spl.bin\0"					\
+		"-u-boot-with-spl.bin\0"				\
 	"flash_uboot=nand unlock ${u-boot_addr} ;"			\
-		"nand erase.part u-boot;"				\
-		"if nand write.trimffs ${fileaddr} ${u-boot_addr} "	\
-			"${filesize};"					\
-		"then nand lock; nand unlock ${env_addr};"		\
-			"echo Flashing of uboot succeed;"		\
-		"else echo Flashing of uboot failed;"			\
+		"nand erase.part u-boot;"		\
+		"if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
+			"then nand lock; nand unlock ${env_addr};"	\
+				"echo Flashing of uboot succeed;"	\
+			"else echo Flashing of uboot failed;"		\
 		"fi; \0"						\
 	"update_uboot=run download_uboot flash_uboot\0"			\
 	"download_env=tftpboot ${loadaddr} ${board_name}"		\
@@ -348,6 +343,12 @@
 #define CONFIG_SYS_NAND_LARGEPAGE
 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
+#define CONFIG_SYS_NAND_PAGE_COUNT	CONFIG_SYS_NAND_BLOCK_SIZE / \
+						CONFIG_SYS_NAND_PAGE_SIZE
+#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	11
 #define NAND_MAX_CHIPS			1
 
 
@@ -355,8 +356,6 @@
 #define CONFIG_FLASH_SHOW_PROGRESS	45
 #define CONFIG_SYS_NAND_QUIET		1
 
-#define CONFIG_BOOT_TRACE_REG	0xAFFFFFF8 /* Addr to store traces of SPL boot*/
-
 /*
  * Partitions & Filsystems
  */
@@ -383,11 +382,13 @@
 /*
  * FPGA
  */
+#ifndef CONFIG_SPL_BUILD
 #define CONFIG_FPGA
+#endif
 #define CONFIG_FPGA_COUNT		1
 #define CONFIG_FPGA_XILINX
 #define CONFIG_FPGA_SPARTAN3
-#define CONFIG_SYS_FPGA_WAIT		250 /* 250ms */
+#define CONFIG_SYS_FPGA_WAIT		250 /* 250 ms */
 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 #define CONFIG_SYS_FPGA_CHECK_CTRLC
 #define CONFIG_SYS_FPGA_CHECK_ERROR
@@ -407,12 +408,12 @@
  */
 
 #ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_I2C_BASE		IMX_I2C1_BASE
-#define CONFIG_SYS_I2C_SPEED		100000	/* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE		0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_MXC_I2C1_SPEED	100000	/* 100 kHz */
+#define CONFIG_SYS_MXC_I2C1_SLAVE	0x7F
+#define CONFIG_SYS_MXC_I2C2_SPEED	100000	/* 100 kHz */
+#define CONFIG_SYS_MXC_I2C2_SLAVE	0x7F
 #define CONFIG_SYS_I2C_NOPROBES		{ }
 
 #ifdef CONFIG_CMD_EEPROM
@@ -442,11 +443,6 @@
 #endif /* CONFIG_CMD_DATE */
 
 /*
- * Clocks
- */
-#define	CONFIG_SYS_HZ			1000	/* Ticks per second */
-
-/*
  * PLL
  *
  *  31 | x  |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0


hooks/post-receive
-- 
armadeus


