[Armadeus-commitlog] armadeus branch, master, updated. armadeus-5.2-398-g3c760f6

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- Log -----------------------------------------------------------------
commit 3c760f67fc9ac13e6c17a633d212c7f84855b249
Author: Eric Jarrige <eri...@ar...>
Date:   Wed Aug 21 13:25:06 2013 +0200

    [UBOOT] apf27: fix init dcache boot issue

-----------------------------------------------------------------------

Summary of changes:
 .../2013.04/300-imx27-fix_dcache_boot_issue.patch  |   22 ++++++++++++++++++++
 1 files changed, 22 insertions(+), 0 deletions(-)
 create mode 100644 patches/u-boot/2013.04/300-imx27-fix_dcache_boot_issue.patch

diff --git a/patches/u-boot/2013.04/300-imx27-fix_dcache_boot_issue.patch b/patches/u-boot/2013.04/300-imx27-fix_dcache_boot_issue.patch
new file mode 100644
index 0000000..32f2db4
--- /dev/null
+++ b/patches/u-boot/2013.04/300-imx27-fix_dcache_boot_issue.patch
@@ -0,0 +1,22 @@
+imx27: Dcache is not correctly flushed during the boot process
+This patch fix it and make it possible to run U-Boot from RAM.
+tested method: start U-Boot from RAM with a go a0000800
+
+Signed-off-by: Eric Jarrige <eri...@ar...>
+---
+--- uboot-custom/arch/arm/cpu/arm926ejs/start.S
++++ uboot-custom/arch/arm/cpu/arm926ejs/start.S
+@@ -289,11 +289,12 @@ cpu_init_crit:
+ 	 */
+ 	mov	r0, #0
+ flush_dcache:
+-	mrc	p15, 0, r15, c7, c10, 3
++	mrc	p15, 0, r15, c7, c14, 3
+ 	bne	flush_dcache
+ 
+ 	mcr	p15, 0, r0, c8, c7, 0	/* invalidate TLB */
+ 	mcr	p15, 0, r0, c7, c5, 0	/* invalidate I Cache */
++	mcr	p15, 0, r0, c7, c10, 4	/* drain write buffer */
+ 
+ 	/*
+ 	 * disable MMU and D cache


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