[Armadeus-commitlog] armadeus branch, master, updated. armadeus-5.2-73-gde158ce
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-5.2-73-gde158ce
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From: Gwenhael Goavec-M. <gwe...@us...> - 2012-12-15 10:52:17
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the project "armadeus".
The branch, master has been updated
via de158ce1bc561688ca3f33d726a0076c4b2ad6c8 (commit)
via 3132844ef9cb234aad662528f629b822fdadc4b5 (commit)
from 74c2856539e3a7f3fa6c798fb099a293aaef6d9d (commit)
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- Log -----------------------------------------------------------------
commit de158ce1bc561688ca3f33d726a0076c4b2ad6c8
Author: Gwenhael Goavec-Merou <gw...@tr...>
Date: Sat Dec 15 11:50:54 2012 +0100
[LINUX][3.7] mx27: enable EHCI PER clock
commit 3132844ef9cb234aad662528f629b822fdadc4b5
Author: Gwenhael Goavec-Merou <gw...@tr...>
Date: Sat Dec 15 11:50:24 2012 +0100
[LINUX][3.7] mx27: add an clock gate to activate SPLL clock
-----------------------------------------------------------------------
Summary of changes:
...armadeus-mx27_add_clk_gate_to_enable_sspl.patch | 44 ++++++++++++++++++
...armadeus-mx27-ehci-mxc-add_per_clk_enable.patch | 49 ++++++++++++++++++++
2 files changed, 93 insertions(+), 0 deletions(-)
create mode 100644 patches/linux/3.7/0202-armadeus-mx27_add_clk_gate_to_enable_sspl.patch
create mode 100644 patches/linux/3.7/0203-armadeus-mx27-ehci-mxc-add_per_clk_enable.patch
diff --git a/patches/linux/3.7/0202-armadeus-mx27_add_clk_gate_to_enable_sspl.patch b/patches/linux/3.7/0202-armadeus-mx27_add_clk_gate_to_enable_sspl.patch
new file mode 100644
index 0000000..987f036
--- /dev/null
+++ b/patches/linux/3.7/0202-armadeus-mx27_add_clk_gate_to_enable_sspl.patch
@@ -0,0 +1,44 @@
+A clock gate is mandatory to activate SPLL clock needed, at least, for usb.
+
+Signed-off-by: Gwenhael Goavec-Merou <gwe...@ar...>
+---
+
+Index: linux-3.7-rc6/arch/arm/mach-imx/clk-imx27.c
+===================================================================
+--- linux-3.7-rc6.orig/arch/arm/mach-imx/clk-imx27.c
++++ linux-3.7-rc6/arch/arm/mach-imx/clk-imx27.c
+@@ -62,7 +62,7 @@ static const char *clko_sel_clks[] = {
+ "32k", "usb_div", "dptc",
+ };
+
+-static const char *ssi_sel_clks[] = { "spll", "mpll", };
++static const char *ssi_sel_clks[] = { "spll_gate", "mpll", };
+
+ enum mx27_clks {
+ dummy, ckih, ckil, mpll, spll, mpll_main2, ahb, ipg, nfc_div, per1_div,
+@@ -82,7 +82,7 @@ enum mx27_clks {
+ csi_ahb_gate, brom_ahb_gate, ata_ahb_gate, wdog_ipg_gate, usb_ipg_gate,
+ uart6_ipg_gate, uart5_ipg_gate, uart4_ipg_gate, uart3_ipg_gate,
+ uart2_ipg_gate, uart1_ipg_gate, ckih_div1p5, fpm, mpll_osc_sel,
+- mpll_sel, clk_max
++ mpll_sel, spll_gate, clk_max
+ };
+
+ static struct clk *clk[clk_max];
+@@ -104,6 +104,7 @@ int __init mx27_clocks_init(unsigned lon
+ ARRAY_SIZE(mpll_sel_clks));
+ clk[mpll] = imx_clk_pllv1("mpll", "mpll_sel", CCM_MPCTL0);
+ clk[spll] = imx_clk_pllv1("spll", "ckih", CCM_SPCTL0);
++ clk[spll_gate] = imx_clk_gate("spll_gate", "spll", CCM_CSCR, 1);
+ clk[mpll_main2] = imx_clk_fixed_factor("mpll_main2", "mpll", 2, 3);
+
+ if (mx27_revision() >= IMX_CHIP_REVISION_2_0) {
+@@ -121,7 +122,7 @@ int __init mx27_clocks_init(unsigned lon
+ clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6);
+ clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks));
+ clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6);
+- clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3);
++ clk[usb_div] = imx_clk_divider("usb_div", "spll_gate", CCM_CSCR, 28, 3);
+ clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));
+ clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks));
+ if (mx27_revision() >= IMX_CHIP_REVISION_2_0)
diff --git a/patches/linux/3.7/0203-armadeus-mx27-ehci-mxc-add_per_clk_enable.patch b/patches/linux/3.7/0203-armadeus-mx27-ehci-mxc-add_per_clk_enable.patch
new file mode 100644
index 0000000..4ebf63a
--- /dev/null
+++ b/patches/linux/3.7/0203-armadeus-mx27-ehci-mxc-add_per_clk_enable.patch
@@ -0,0 +1,49 @@
+EHCI PER clock (aka usb_div) must be enabled to have EHCI driver working.
+
+Signed-off-by: Gwenhael Goavec-Merou <gwe...@ar...>
+---
+
+Index: linux-3.7/drivers/usb/host/ehci-mxc.c
+===================================================================
+--- linux-3.7.orig/drivers/usb/host/ehci-mxc.c
++++ linux-3.7/drivers/usb/host/ehci-mxc.c
+@@ -32,7 +32,7 @@
+ #define ULPI_VIEWPORT_OFFSET 0x170
+
+ struct ehci_mxc_priv {
+- struct clk *usbclk, *ahbclk, *phyclk;
++ struct clk *usbclk, *ahbclk, *perclk, *phyclk;
+ struct usb_hcd *hcd;
+ };
+
+@@ -159,6 +159,13 @@ static int ehci_mxc_drv_probe(struct pla
+ }
+ clk_prepare_enable(priv->ahbclk);
+
++ priv->perclk = devm_clk_get(&pdev->dev, "per");
++ if (IS_ERR(priv->perclk)) {
++ ret = PTR_ERR(priv->perclk);
++ goto err_clk_per;
++ }
++ clk_prepare_enable(priv->perclk);
++
+ /* "dr" device has its own clock on i.MX51 */
+ priv->phyclk = devm_clk_get(&pdev->dev, "phy");
+ if (IS_ERR(priv->phyclk))
+@@ -242,6 +249,8 @@ err_init:
+ if (priv->phyclk)
+ clk_disable_unprepare(priv->phyclk);
+
++ clk_disable_unprepare(priv->perclk);
++err_clk_per:
+ clk_disable_unprepare(priv->ahbclk);
+ err_clk_ahb:
+ clk_disable_unprepare(priv->usbclk);
+@@ -268,6 +277,7 @@ static int __exit ehci_mxc_drv_remove(st
+
+ clk_disable_unprepare(priv->usbclk);
+ clk_disable_unprepare(priv->ahbclk);
++ clk_disable_unprepare(priv->perclk);
+
+ if (priv->phyclk)
+ clk_disable_unprepare(priv->phyclk);
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