[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-38-g8e0bbee
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-38-g8e0bbee
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From: jorasse <jo...@us...> - 2012-02-08 22:27:54
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This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 8e0bbeea13fa595eca3d86806d11881b3a77f083 (commit)
via e8fdcbfd5435e1c271b2c4e7f099b7c0e5b7f0c9 (commit)
via ce6d681667d61c2ccb1eb47fdb5504bdea1cc1ad (commit)
via eb1d323741fae74206b17491fd5d93bb4e7a7026 (commit)
via 2a9d216134dc678b6e250ae4f83f12fc4765dfa2 (commit)
from ead0eaa2661d3bf8292da9c9f786ffaeb622aad3 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 8e0bbeea13fa595eca3d86806d11881b3a77f083
Merge: e8fdcbf ead0eaa
Author: Eric Jarrige <eri...@ar...>
Date: Wed Feb 8 23:27:28 2012 +0100
Merge branch 'master' of ssh://armadeus.git.sourceforge.net/gitroot/armadeus/armadeus
commit e8fdcbfd5435e1c271b2c4e7f099b7c0e5b7f0c9
Author: Eric Jarrige <eri...@ar...>
Date: Wed Feb 8 23:24:52 2012 +0100
[BUILDROOT] apf28: Use safe boot image u-boot.sb
commit ce6d681667d61c2ccb1eb47fdb5504bdea1cc1ad
Author: Eric Jarrige <eri...@ar...>
Date: Wed Feb 8 23:22:18 2012 +0100
[UBOOT] apf28:Â Fix Fuse reg base address
commit eb1d323741fae74206b17491fd5d93bb4e7a7026
Author: Eric Jarrige <eri...@ar...>
Date: Wed Feb 8 23:03:53 2012 +0100
[UBOOT] apf28:Â Add command to build BCB tables
commit 2a9d216134dc678b6e250ae4f83f12fc4765dfa2
Author: Eric Jarrige <eri...@ar...>
Date: Tue Feb 7 23:15:28 2012 +0100
[UBOOT] apf28: makefile clean up
-----------------------------------------------------------------------
Summary of changes:
buildroot/target/device/armadeus/Makefile.in | 3 +-
.../device/armadeus/apf28/apf28-u-boot-2011.12.h | 26 +-
patches/u-boot/2011.12/502-add-apf28.patch | 559 +++++++++++++++++++-
3 files changed, 576 insertions(+), 12 deletions(-)
diff --git a/buildroot/target/device/armadeus/Makefile.in b/buildroot/target/device/armadeus/Makefile.in
index e3e9091..318ab86 100644
--- a/buildroot/target/device/armadeus/Makefile.in
+++ b/buildroot/target/device/armadeus/Makefile.in
@@ -11,7 +11,8 @@ U_BOOT_TARGET_BIN:=$(BOARD_NAME)-u-boot.bin
ifeq ($(BOARD_NAME),apf9328)
U_BOOT_BIN=u-boot.bin
else ifeq ($(BOARD_NAME),apf28)
-U_BOOT_BIN=u-boot.nand
+U_BOOT_BIN=u-boot.sb
+U_BOOT_TARGET_BIN:=$(BOARD_NAME)-u-boot.sb
TARGETS+=host-elftosb host-imx28-usb-downloader
else
U_BOOT_BIN=u-boot-nand.bin
diff --git a/buildroot/target/device/armadeus/apf28/apf28-u-boot-2011.12.h b/buildroot/target/device/armadeus/apf28/apf28-u-boot-2011.12.h
index 469111e..997f950 100644
--- a/buildroot/target/device/armadeus/apf28/apf28-u-boot-2011.12.h
+++ b/buildroot/target/device/armadeus/apf28/apf28-u-boot-2011.12.h
@@ -26,8 +26,8 @@
#include <asm/arch/regs-base.h>
#define CONFIG_VERSION_VARIABLE
-#define CONFIG_ENV_VERSION "0.2"
-#define CONFIG_IDENT_STRING " apf28 patch 0.3"
+#define CONFIG_ENV_VERSION "0.3"
+#define CONFIG_IDENT_STRING " apf28 patch 0.4"
/*
* SoC configurations
@@ -280,9 +280,10 @@
/*
* OCOTP
*/
+/*
#define CONFIG_IMX_OCOTP
#define IMX_OCOTP_BASE MXS_OCOTP_BASE
-
+*/
/*
* Boot Linux
*/
@@ -370,11 +371,18 @@
"nand write ${loadaddr} ${fw_off} ${filesize} ; " \
"fi\0" \
"flash_uboot=nand unlock ${uboot_offset} ${uboot_len};" \
- "nand erase ${uboot_offset} ${uboot_len};" \
- "if nand write.jffs2 ${fileaddr} ${uboot_offset} ${filesize};" \
+ "run update_nand_get_fcb_size ; " \
+ "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
+ "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
+ "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
+ "if bcb write.nand ; then " \
+ "nand erase ${fcb_sz} ${fw_sz} ; " \
+ "nand write ${fileaddr} ${fw_off} ${filesize};" \
+ "if nand write ${fileaddr} ${fcb_sz} ${filesize};" \
"then nand lock; nand unlock ${env_offset};" \
"echo Flashing of uboot succeed;" \
"else echo Flashing of uboot failed;" \
+ "fi; " \
"fi; \0" \
"flash_kernel=nand erase ${kernel_offset} ${kernel_len};" \
"if nand write.jffs2 ${fileaddr} ${kernel_offset} ${filesize};"\
@@ -389,12 +397,12 @@
"flash_reset_env=env default -f; saveenv;" \
"echo Flash environment variables erased!\0" \
"download_uboot=tftpboot ${loadaddr} " \
- " ${serverpath}${board_name}-u-boot.bin\0" \
+ " ${serverpath}${board_name}-u-boot.sb\0" \
"download_kernel=tftpboot ${loadaddr} " \
" ${serverpath}${board_name}-linux.bin\0" \
"download_rootfs=tftpboot ${loadaddr} " \
" ${serverpath}${board_name}-rootfs.ubi\0" \
- "update_uboot=run update_nand_full\0" \
+ "update_uboot=run download_uboot flash_uboot\0" \
"update_kernel=run download_kernel flash_kernel\0" \
"update_rootfs=run download_rootfs flash_rootfs\0" \
"update_all=run download_kernel flash_kernel download_rootfs " \
@@ -402,3 +410,7 @@
#endif /* __APF28_H__ */
+#ifdef CONFIG_BOARD_NAME
+#undef CONFIG_BOARD_NAME
+#endif
+#define CONFIG_BOARD_NAME apf28
diff --git a/patches/u-boot/2011.12/502-add-apf28.patch b/patches/u-boot/2011.12/502-add-apf28.patch
index 7d679f5..7627f31 100644
--- a/patches/u-boot/2011.12/502-add-apf28.patch
+++ b/patches/u-boot/2011.12/502-add-apf28.patch
@@ -500,8 +500,8 @@
+ "- Blow fecmac<n> MAC address");
+
--- u-boot-2011.12/board/armadeus/apf28/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2011.12/board/armadeus/apf28/Makefile 2012-02-07 01:39:18.114788951 +0100
-@@ -0,0 +1,51 @@
++++ u-boot-2011.12/board/armadeus/apf28/Makefile 2012-02-07 23:17:03.256451604 +0100
+@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd...@de....
@@ -530,13 +530,12 @@
+LIB = $(obj)lib$(BOARD).o
+
+ifndef CONFIG_SPL_BUILD
-+COBJS := apf28.o
+COBJS-$(CONFIG_IMX_OCOTP) += cmd_ocotp.o
++COBJS := $(COBJS-y) mx28_bcb.o apf28.o
+else
+COBJS := spl_boot.o
+endif
+
-+COBJS += $(COBJS-y)
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
@@ -553,6 +552,558 @@
+sinclude $(obj).depend
+
+#########################################################################
+--- u-boot-2011.12/board/armadeus/apf28/mx28_bcb.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2011.12/board/armadeus/apf28/mx28_bcb.c 2012-02-08 23:00:37.501763289 +0100
+@@ -0,0 +1,549 @@
++/*
++ * i.MX28 NANDÂ Boot Control Blocks generator
++ *
++ * Copyright (C) 2012 Eric Jarrige <eri...@ar...>
++ *
++ * Based on code from mxsboot:
++ * Freescale i.MX28 image generator
++ *
++ * Copyright (C) 2011 Marek Vasut <mar...@gm...>
++ * on behalf of DENX Software Engineering GmbH
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <asm/io.h>
++#include <common.h>
++#include <malloc.h>
++#include <nand.h>
++#include <asm/arch/imx-regs.h>
++
++/*
++ * BCB layout Read from OCOTPÂ fuses.
++ */
++static uint32_t stride_pages;
++static uint32_t stride_count;
++
++/*
++ * Sector on which the SigmaTel boot partition (0x53) starts.
++ */
++uint32_t sd_sector = 2048;
++
++/* i.MX28 NAND controller-specific constants. DO NOT TWEAK! */
++#define MXS_NAND_DMA_DESCRIPTOR_COUNT 4
++#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE 512
++#define MXS_NAND_METADATA_SIZE 10
++#define MXS_NAND_COMMAND_BUFFER_SIZE 32
++
++struct mx28_nand_fcb {
++ uint32_t checksum;
++ uint32_t fingerprint;
++ uint32_t version;
++ struct {
++ uint8_t data_setup;
++ uint8_t data_hold;
++ uint8_t address_setup;
++ uint8_t dsample_time;
++ uint8_t nand_timing_state;
++ uint8_t rea;
++ uint8_t rloh;
++ uint8_t rhoh;
++ } timing;
++ uint32_t page_data_size;
++ uint32_t total_page_size;
++ uint32_t sectors_per_block;
++ uint32_t number_of_nands; /* Ignored */
++ uint32_t total_internal_die; /* Ignored */
++ uint32_t cell_type; /* Ignored */
++ uint32_t ecc_block_n_ecc_type;
++ uint32_t ecc_block_0_size;
++ uint32_t ecc_block_n_size;
++ uint32_t ecc_block_0_ecc_type;
++ uint32_t metadata_bytes;
++ uint32_t num_ecc_blocks_per_page;
++ uint32_t ecc_block_n_ecc_level_sdk; /* Ignored */
++ uint32_t ecc_block_0_size_sdk; /* Ignored */
++ uint32_t ecc_block_n_size_sdk; /* Ignored */
++ uint32_t ecc_block_0_ecc_level_sdk; /* Ignored */
++ uint32_t num_ecc_blocks_per_page_sdk; /* Ignored */
++ uint32_t metadata_bytes_sdk; /* Ignored */
++ uint32_t erase_threshold;
++ uint32_t boot_patch;
++ uint32_t patch_sectors;
++ uint32_t firmware1_starting_sector;
++ uint32_t firmware2_starting_sector;
++ uint32_t sectors_in_firmware1;
++ uint32_t sectors_in_firmware2;
++ uint32_t dbbt_search_area_start_address;
++ uint32_t badblock_marker_byte;
++ uint32_t badblock_marker_start_bit;
++ uint32_t bb_marker_physical_offset;
++};
++
++struct mx28_nand_dbbt {
++ uint32_t checksum;
++ uint32_t fingerprint;
++ uint32_t version;
++ uint32_t number_bb;
++ uint32_t number_2k_pages_bb;
++};
++
++struct mx28_nand_bbt {
++ uint32_t nand;
++ uint32_t number_bb;
++ uint32_t badblock[510];
++};
++
++struct mx28_sd_drive_info {
++ uint32_t chip_num;
++ uint32_t drive_type;
++ uint32_t tag;
++ uint32_t first_sector_number;
++ uint32_t sector_count;
++};
++
++struct mx28_sd_config_block {
++ uint32_t signature;
++ uint32_t primary_boot_tag;
++ uint32_t secondary_boot_tag;
++ uint32_t num_copies;
++ struct mx28_sd_drive_info drv_info[1];
++};
++
++static inline uint32_t mx28_nand_ecc_size_in_bits(uint32_t ecc_strength)
++{
++ return ecc_strength * 13;
++}
++
++static inline uint32_t mx28_nand_get_ecc_strength(uint32_t page_data_size,
++ uint32_t page_oob_size)
++{
++ if (page_data_size == 2048)
++ return 8;
++
++ if (page_data_size == 4096) {
++ if (page_oob_size == 128)
++ return 8;
++
++ if (page_oob_size == 218)
++ return 16;
++ }
++
++ return 0;
++}
++
++static inline uint32_t mx28_nand_get_mark_offset(uint32_t page_data_size,
++ uint32_t ecc_strength)
++{
++ uint32_t chunk_data_size_in_bits;
++ uint32_t chunk_ecc_size_in_bits;
++ uint32_t chunk_total_size_in_bits;
++ uint32_t block_mark_chunk_number;
++ uint32_t block_mark_chunk_bit_offset;
++ uint32_t block_mark_bit_offset;
++
++ chunk_data_size_in_bits = MXS_NAND_CHUNK_DATA_CHUNK_SIZE * 8;
++ chunk_ecc_size_in_bits = mx28_nand_ecc_size_in_bits(ecc_strength);
++
++ chunk_total_size_in_bits =
++ chunk_data_size_in_bits + chunk_ecc_size_in_bits;
++
++ /* Compute the bit offset of the block mark within the physical page. */
++ block_mark_bit_offset = page_data_size * 8;
++
++ /* Subtract the metadata bits. */
++ block_mark_bit_offset -= MXS_NAND_METADATA_SIZE * 8;
++
++ /*
++ * Compute the chunk number (starting at zero) in which the block mark
++ * appears.
++ */
++ block_mark_chunk_number =
++ block_mark_bit_offset / chunk_total_size_in_bits;
++
++ /*
++ * Compute the bit offset of the block mark within its chunk, and
++ * validate it.
++ */
++ block_mark_chunk_bit_offset = block_mark_bit_offset -
++ (block_mark_chunk_number * chunk_total_size_in_bits);
++
++ if (block_mark_chunk_bit_offset > chunk_data_size_in_bits)
++ return 1;
++
++ /*
++ * Now that we know the chunk number in which the block mark appears,
++ * we can subtract all the ECC bits that appear before it.
++ */
++ block_mark_bit_offset -=
++ block_mark_chunk_number * chunk_ecc_size_in_bits;
++
++ return block_mark_bit_offset;
++}
++
++static inline uint32_t mx28_nand_mark_byte_offset(nand_info_t *nand)
++{
++ uint32_t ecc_strength;
++ ecc_strength = mx28_nand_get_ecc_strength(nand->writesize, nand->oobsize);
++ return mx28_nand_get_mark_offset(nand->writesize, ecc_strength) >> 3;
++}
++
++static inline uint32_t mx28_nand_mark_bit_offset(nand_info_t *nand)
++{
++ uint32_t ecc_strength;
++ ecc_strength = mx28_nand_get_ecc_strength(nand->writesize, nand->oobsize);
++ return mx28_nand_get_mark_offset(nand->writesize, ecc_strength) & 0x7;
++}
++
++static uint32_t mx28_nand_block_csum(uint8_t *block, uint32_t size)
++{
++ uint32_t csum = 0;
++ int i;
++
++ for (i = 0; i < size; i++)
++ csum += block[i];
++
++ return csum ^ 0xffffffff;
++}
++
++static struct mx28_nand_fcb *mx28_nand_get_fcb(nand_info_t *nand, uint32_t size)
++{
++ struct mx28_nand_fcb *fcb;
++ uint32_t bcb_size_bytes;
++ uint32_t stride_size_bytes;
++ uint32_t bootstream_size_pages;
++ uint32_t fw1_start_page;
++ uint32_t fw2_start_page;
++
++ fcb = malloc(nand->writesize);
++ if (!fcb) {
++ printf("MX28 NAND: Unable to allocate FCB\n");
++ return NULL;
++ }
++
++ memset(fcb, 0, nand->writesize);
++
++ fcb->fingerprint = 0x20424346;
++ fcb->version = 0x01000000;
++
++ /*
++ * FIXME: These here are default values as found in kobs-ng. We should
++ * probably retrieve the data from NAND or something.
++ */
++ fcb->timing.data_setup = 80;
++ fcb->timing.data_hold = 60;
++ fcb->timing.address_setup = 25;
++ fcb->timing.dsample_time = 6;
++
++ fcb->page_data_size = nand->writesize;
++ fcb->total_page_size = nand->writesize + nand->oobsize;
++ fcb->sectors_per_block = nand->erasesize / nand->writesize;
++
++ fcb->num_ecc_blocks_per_page = (nand->writesize / 512) - 1;
++ fcb->ecc_block_0_size = 512;
++ fcb->ecc_block_n_size = 512;
++ fcb->metadata_bytes = 10;
++
++ if (nand->writesize == 2048) {
++ fcb->ecc_block_n_ecc_type = 4;
++ fcb->ecc_block_0_ecc_type = 4;
++ } else if (nand->writesize == 4096) {
++ if (nand->oobsize == 128) {
++ fcb->ecc_block_n_ecc_type = 4;
++ fcb->ecc_block_0_ecc_type = 4;
++ } else if (nand->oobsize == 218) {
++ fcb->ecc_block_n_ecc_type = 8;
++ fcb->ecc_block_0_ecc_type = 8;
++ }
++ }
++
++ if (fcb->ecc_block_n_ecc_type == 0) {
++ printf("MX28 NAND: Unsupported NAND geometry\n");
++ goto err;
++ }
++
++ fcb->boot_patch = 0;
++ fcb->patch_sectors = 0;
++
++ fcb->badblock_marker_byte = mx28_nand_mark_byte_offset(nand);
++ fcb->badblock_marker_start_bit = mx28_nand_mark_bit_offset(nand);
++ fcb->bb_marker_physical_offset = nand->writesize;
++
++ stride_size_bytes = stride_pages * nand->writesize;
++ bcb_size_bytes = stride_size_bytes * stride_count;
++
++ bootstream_size_pages = (size + (nand->writesize - 1)) /
++ nand->writesize;
++
++ fw1_start_page = 2 * bcb_size_bytes / nand->writesize;
++ fw2_start_page = (2 * bcb_size_bytes + size) /
++ nand->writesize;
++
++ fcb->firmware1_starting_sector = fw1_start_page;
++ fcb->firmware2_starting_sector = fw2_start_page;
++ fcb->sectors_in_firmware1 = bootstream_size_pages;
++ fcb->sectors_in_firmware2 = bootstream_size_pages;
++
++ fcb->dbbt_search_area_start_address = stride_pages * stride_count;
++
++ return fcb;
++
++err:
++ free(fcb);
++ return NULL;
++}
++
++static struct mx28_nand_dbbt *mx28_nand_get_dbbt(nand_info_t *nand)
++{
++ struct mx28_nand_dbbt *dbbt;
++
++ dbbt = malloc(nand->writesize);
++ if (!dbbt) {
++ printf("MX28 NAND: Unable to allocate DBBT\n");
++ return NULL;
++ }
++
++ memset(dbbt, 0, nand->writesize);
++
++ dbbt->fingerprint = 0x54424244;
++ dbbt->version = 0x1;
++
++ return dbbt;
++}
++
++static inline uint8_t mx28_nand_parity_13_8(const uint8_t b)
++{
++ uint32_t parity = 0, tmp;
++
++ tmp = ((b >> 6) ^ (b >> 5) ^ (b >> 3) ^ (b >> 2)) & 1;
++ parity |= tmp << 0;
++
++ tmp = ((b >> 7) ^ (b >> 5) ^ (b >> 4) ^ (b >> 2) ^ (b >> 1)) & 1;
++ parity |= tmp << 1;
++
++ tmp = ((b >> 7) ^ (b >> 6) ^ (b >> 5) ^ (b >> 1) ^ (b >> 0)) & 1;
++ parity |= tmp << 2;
++
++ tmp = ((b >> 7) ^ (b >> 4) ^ (b >> 3) ^ (b >> 0)) & 1;
++ parity |= tmp << 3;
++
++ tmp = ((b >> 6) ^ (b >> 4) ^ (b >> 3) ^
++ (b >> 2) ^ (b >> 1) ^ (b >> 0)) & 1;
++ parity |= tmp << 4;
++
++ return parity;
++}
++
++static uint8_t *mx28_nand_fcb_block(nand_info_t *nand, struct mx28_nand_fcb *fcb)
++{
++ uint8_t *block;
++ uint8_t *ecc;
++ int i;
++
++ block = malloc(nand->writesize + nand->oobsize);
++ if (!block) {
++ printf("MX28 NAND: Unable to allocate FCB block\n");
++ return NULL;
++ }
++
++ memset(block, 0, nand->writesize + nand->oobsize);
++
++ /* Update the FCB checksum */
++ fcb->checksum = mx28_nand_block_csum(((uint8_t *)fcb) + 4, 508);
++
++ /* Figure 12-11. in iMX28RM, rev. 1, says FCB is at offset 12 */
++ memcpy(block + 12, fcb, sizeof(struct mx28_nand_fcb));
++
++ /* ECC is at offset 12 + 512 */
++ ecc = block + 12 + 512;
++
++ /* Compute the ECC parity */
++ for (i = 0; i < sizeof(struct mx28_nand_fcb); i++)
++ ecc[i] = mx28_nand_parity_13_8(block[i + 12]);
++
++ return block;
++}
++
++
++static int mx28_nand_write_fcb(nand_info_t *nand, struct mx28_nand_fcb *fcb)
++{
++ uint32_t offset;
++ uint8_t *fcbblock;
++ int ret = 0;
++ int i;
++ nand_erase_options_t opts;
++
++ fcbblock = mx28_nand_fcb_block(nand, fcb);
++ if (!fcbblock)
++ return -1;
++
++ memset(&opts, 0, sizeof(opts));
++ opts.offset = 0;
++ opts.length = stride_pages * stride_count * nand->writesize;
++ opts.jffs2 = 0;
++ opts.quiet = 1;
++ opts.spread = 0;
++ opts.scrub = 1;
++
++ printf("Erasing FCB...\n");
++ if (!nand_erase_opts(nand, &opts)) {
++ mtd_oob_ops_t ops = {
++ .datbuf = (u8 *)fcbblock,
++ .oobbuf = (u8 *)fcbblock + nand->writesize,
++ .len = nand->writesize,
++ .ooblen = nand->oobsize,
++ .mode = MTD_OOB_RAW
++ };
++
++ printf("Writing FCB...\n");
++
++ for (i = 0; i < stride_pages * stride_count; i += stride_pages) {
++ offset = i * nand->writesize;
++ ret = nand->write_oob(nand, offset, &ops);
++ }
++ }
++ free(fcbblock);
++ return ret;
++}
++
++static int mx28_nand_write_dbbt(nand_info_t *nand, struct mx28_nand_dbbt *dbbt)
++{
++ uint32_t offset;
++ int i = stride_pages * stride_count, ret = 0;
++
++ nand_erase_options_t opts;
++
++ memset(&opts, 0, sizeof(opts));
++ opts.offset = stride_pages * stride_count * nand->writesize;
++ opts.length = stride_pages * stride_count * nand->writesize;
++ opts.jffs2 = 0;
++ opts.quiet = 1;
++ opts.spread = 0;
++ opts.scrub = 1;
++
++ printf("Erasing DBBT...\n");
++ if (!nand_erase_opts(nand, &opts)) {
++ mtd_oob_ops_t ops = {
++ .datbuf = (u8 *)dbbt,
++ .oobbuf = (u8 *)dbbt + nand->writesize,
++ .len = nand->writesize,
++ .ooblen = nand->oobsize,
++ .mode = MTD_OOB_RAW
++ };
++
++ printf("Writing DBBT...\n");
++
++ for (; i < 2 * stride_pages * stride_count; i += stride_pages) {
++ offset = i * nand->writesize;
++ ret = nand->write_oob(nand, offset, &ops);
++ }
++
++ }
++
++ return ret;
++}
++
++
++static int mx28_update_nand_bcb(int firmware_max_size)
++{
++ struct mx28_nand_fcb *fcb;
++ struct mx28_nand_dbbt *dbbt;
++ int ret = -1;
++ nand_info_t *nand = &nand_info[0];
++ struct mx28_ocotp_regs *ocotp_regs =
++ (struct mx28_ocotp_regs *)MXS_OCOTP_BASE;
++
++ stride_pages = ((readl(&ocotp_regs->hw_ocotp_rom1) >> 4) & 0x0f) * 64;
++ if (stride_pages < 64) stride_pages = 64;
++
++ stride_count = ((readl(&ocotp_regs->hw_ocotp_rom1) >> 8) & 0x0f);
++ if (stride_count < 1) stride_count = 2;
++ stride_count = 2 << (stride_count-1); /* stride_count = 2^stride_count */
++
++ if (firmware_max_size <= nand->erasesize)
++ firmware_max_size = 1 * 1024 * 1024;
++
++ debug("stride_pages= %d\n", stride_pages);
++ debug("stride_count= %d\n", stride_count);
++ debug("firmware_max_size= %x\n", firmware_max_size);
++
++ fcb = mx28_nand_get_fcb(nand, firmware_max_size);
++ if (!fcb) {
++ printf("Unable to build FCB\n");
++ goto err0;
++ }
++
++ dbbt = mx28_nand_get_dbbt(nand);
++ if (!dbbt) {
++ printf("Unable to build DBBT\n");
++ goto err1;
++ }
++
++ ret = mx28_nand_write_fcb(nand, fcb);
++ if (ret) {
++ printf("Unable to write FCB to NAND\n");
++ goto err2;
++ }
++
++
++ ret = mx28_nand_write_dbbt(nand, dbbt);
++ if (ret) {
++ printf("Unable to write DBBT to NAND\n");
++ goto err2;
++ }
++
++ printf("NANDÂ BCBÂ tables updated\n");
++ ret = 0;
++
++err2:
++ free(dbbt);
++err1:
++ free(fcb);
++err0:
++ return ret;
++}
++
++int do_bcb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
++{
++ int err = 0;
++ int arg = (1 * 1024 * 1024);
++
++ if (argc < 2 || argc > 3)
++ goto usage;
++
++ if (strcmp(argv[1], "write.nand") == 0) {
++ if (argc == 3) {
++ arg = simple_strtoul(argv[2], NULL, 16);
++ }
++ err = mx28_update_nand_bcb(arg);
++ } else {
++ goto usage;
++ }
++
++ return err;
++usage:
++ return cmd_usage(cmdtp);
++}
++
++U_BOOT_CMD(
++ bcb, 2, 1, do_bcb,
++ "mx28 Boot Control Block sub system",
++ "write.nand [Firmware max size] - Update NAND BCB tables\n"
++ " default firmware max size is 1MiB");
++
--- u-boot-2011.12/board/armadeus/apf28/spl_boot.c 1970-01-01 01:00:00.000000000 +0100
+++ u-boot-2011.12/board/armadeus/apf28/spl_boot.c 2012-01-29 10:12:49.295977402 +0100
@@ -0,0 +1,203 @@
hooks/post-receive
--
armadeus
|
