[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-30-gf0ec980
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-30-gf0ec980
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From: jorasse <jo...@us...> - 2012-02-07 14:55:51
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This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via f0ec980317703907d1695d8e440e25ed7a2dd514 (commit)
from 8e9c7abcdcce343f9fa47e39ecf1d26edce6b2c2 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit f0ec980317703907d1695d8e440e25ed7a2dd514
Author: Eric Jarrige <eri...@ar...>
Date: Tue Feb 7 15:55:32 2012 +0100
[UBOOT] apf28: support read/blow MAC from otp fuses
-----------------------------------------------------------------------
Summary of changes:
.../device/armadeus/apf28/apf28-u-boot-2011.12.h | 9 +-
patches/u-boot/2011.12/502-add-apf28.patch | 292 +++++++++++++++++++-
2 files changed, 295 insertions(+), 6 deletions(-)
diff --git a/buildroot/target/device/armadeus/apf28/apf28-u-boot-2011.12.h b/buildroot/target/device/armadeus/apf28/apf28-u-boot-2011.12.h
index cbd0f07..469111e 100644
--- a/buildroot/target/device/armadeus/apf28/apf28-u-boot-2011.12.h
+++ b/buildroot/target/device/armadeus/apf28/apf28-u-boot-2011.12.h
@@ -27,7 +27,7 @@
#define CONFIG_VERSION_VARIABLE
#define CONFIG_ENV_VERSION "0.2"
-#define CONFIG_IDENT_STRING " apf28 patch 0.2"
+#define CONFIG_IDENT_STRING " apf28 patch 0.3"
/*
* SoC configurations
@@ -235,6 +235,7 @@
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_M28_FEC_MAC_IN_OCOTP
#endif
+#define ACFG_OUI 0x001EAC
/*
* I2C
@@ -277,6 +278,12 @@
#endif
/*
+ * OCOTP
+ */
+#define CONFIG_IMX_OCOTP
+#define IMX_OCOTP_BASE MXS_OCOTP_BASE
+
+/*
* Boot Linux
*/
#define CONFIG_CMDLINE_TAG
diff --git a/patches/u-boot/2011.12/502-add-apf28.patch b/patches/u-boot/2011.12/502-add-apf28.patch
index 77846ce..7d679f5 100644
--- a/patches/u-boot/2011.12/502-add-apf28.patch
+++ b/patches/u-boot/2011.12/502-add-apf28.patch
@@ -1,6 +1,6 @@
--- u-boot-2011.12/board/armadeus/apf28/apf28.c 1970-01-01 01:00:00.000000000 +0100
+++ u-boot-2011.12/board/armadeus/apf28/apf28.c 2012-01-29 09:57:15.183543034 +0100
-@@ -0,0 +1,218 @@
+@@ -0,0 +1,220 @@
+/*
+ * APF28 motherboard based on DENX M28 module
+ *
@@ -197,8 +197,10 @@
+
+ data = readl(&ocotp_regs->hw_ocotp_cust0);
+
-+ mac[0] = 0x00;
-+ mac[1] = 0x1E;
++ writel(OCOTP_CTRL_RD_BANK_OPEN, &ocotp_regs->hw_ocotp_ctrl_clr);
++
++ mac[0] = (ACFG_OUI>> 16) & 0xff;
++ mac[1] = (ACFG_OUI>> 8) & 0xff;
+ mac[2] = (data >> 24) & 0xff;
+ mac[3] = (data >> 16) & 0xff;
+ mac[4] = (data >> 8) & 0xff;
@@ -219,9 +221,287 @@
+ /* dcache_enable(); */
+}
+#endif
+--- u-boot-2011.12/board/armadeus/apf28/cmd_ocotp.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-custom/board/armadeus/apf28/cmd_ocotp.c 2012-02-07 15:06:34.016328417 +0100
+@@ -0,0 +1,275 @@
++/*
++ * Copyright (C) 2012 Eric Jarrige <eri...@ar...>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <linux/types.h>
++#include <asm/io.h>
++#include <command.h>
++#include <common.h>
++#include <asm/arch/imx-regs.h>
++#include <asm/arch/sys_proto.h>
++
++#define MXS_OCOTP_MAX_TIMEOUT 1000000
++
++static struct mx28_ocotp_regs *ocotp_regs =
++ (struct mx28_ocotp_regs *)IMX_OCOTP_BASE;
++
++int otp_error(void)
++{
++ u32 otpctrl;
++
++ if (mx28_wait_mask_clr(&ocotp_regs->hw_ocotp_ctrl_reg, OCOTP_CTRL_BUSY,
++ MXS_OCOTP_MAX_TIMEOUT))
++ {
++ printf("OCOTP still busy after timeout \n");
++ return -1;
++ }
++
++ otpctrl = readl(&ocotp_regs->hw_ocotp_ctrl_reg);
++
++ if (otpctrl & OCOTP_CTRL_ERROR)
++ {
++ printf("OCOTP error: CTRLÂ register value: 0x%x\n", otpctrl);
++ return -1;
++ }
++
++ return 0;
++}
++
++int otp_read(int addr)
++{
++ u32 val = 0, otpctrl;
++
++ if ((addr < 0) || (addr > 0x27))
++ {
++ printf("Invalid address! (should be between 0 and 0x27)\n");
++ return val;
++ }
++
++ if (otp_error())
++ {
++ return val;
++ }
++ otpctrl = readl(&ocotp_regs->hw_ocotp_ctrl_reg);
++
++ if (otpctrl & OCOTP_CTRL_ERROR)
++ {
++ printf("OCOTP in error: CTRLÂ register value: 0x%x\n", otpctrl);
++ return val;
++ }
++
++ writel(OCOTP_CTRL_RD_BANK_OPEN, &ocotp_regs->hw_ocotp_ctrl_set);
++
++ if (mx28_wait_mask_clr(&ocotp_regs->hw_ocotp_ctrl_reg, OCOTP_CTRL_BUSY,
++ MXS_OCOTP_MAX_TIMEOUT)) {
++ printf("OCOTP Busy: Can't open OCOTP bank\n");
++ return val;
++ }
++
++ val = readl(&ocotp_regs->hw_ocotp_cust0 + (addr << 4));
++
++ writel(OCOTP_CTRL_RD_BANK_OPEN, &ocotp_regs->hw_ocotp_ctrl_clr);
++
++ return val;
++}
++
++int otp_blow(unsigned int addr, unsigned int data)
++{
++ u32 hbus, clkseq, vddio;
++ int err = 0;
++ struct mx28_clkctrl_regs *clkctrl_regs =
++ (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
++ struct mx28_power_regs *power_regs =
++ (struct mx28_power_regs *)MXS_POWER_BASE;
++
++ if ((addr < 0) || (addr > 0x27))
++ {
++ printf("Invalid address! (should be between 0 and 0x27)\n");
++ return -1;
++ }
++
++ /* Save HBUS, CLKSEQ and VDDIO */
++ hbus = readl(&clkctrl_regs->hw_clkctrl_hbus_reg);
++ clkseq = readl(&clkctrl_regs->hw_clkctrl_clkseq_reg);
++ vddio = readl(&power_regs->hw_power_vddioctrl);
++
++ /* Force HBUS and CPU down to 24 MHz */
++ writel(CLKCTRL_CLKSEQ_BYPASS_CPU, &clkctrl_regs->hw_clkctrl_clkseq_set);
++ writel(1 << CLKCTRL_HBUS_DIV_OFFSET, &clkctrl_regs->hw_clkctrl_hbus_set);
++ writel(CLKCTRL_HBUS_DIV_MASK - 1, &clkctrl_regs->hw_clkctrl_hbus_clr);
++
++ /* Change VDDIO to 2.8V while burning the fuses */
++ writel(POWER_VDDIOCTRL_TRG_MASK, &clkctrl_regs->hw_clkctrl_hbus_clr);
++
++ /* Disable read bank */
++ writel(OCOTP_CTRL_RD_BANK_OPEN, &ocotp_regs->hw_ocotp_ctrl_clr);
++
++ /* Check ocotp status busy and error */
++ if (!otp_error())
++ {
++ /* initiate fuse blow at addr.. */
++ writel(OCOTP_CTRL_WR_UNLOCK_KEY | (addr & OCOTP_CTRL_ADDR_MASK),
++ &ocotp_regs->hw_ocotp_ctrl);
++
++ /* Start writing data */
++ writel(data, &ocotp_regs->hw_ocotp_data);
++
++ /* wait end of blowing process + 2us wrtie postamble*/
++ if (otp_error())
++ {
++ printf("OCOTP blow failed!\n");
++ err = -1;
++ }
++ udelay(2);
++
++ } else err = -1;
++
++
++ /*Â restore HBUS, CLKSEQ and VDDIO */
++ writel(vddio, &power_regs->hw_power_vddioctrl);
++ writel(hbus, &clkctrl_regs->hw_clkctrl_hbus);
++ writel(clkseq, &clkctrl_regs->hw_clkctrl_clkseq);
++
++ return err;
++}
++
++int otp_read_func(char *func_name)
++{
++ s32 err = 0;
++
++ if (0 == strncmp(func_name, "fecmac", 6)) {
++ s32 addr = func_name[6] -'0';
++
++ if ((addr >= 0) && (addr < 2)) {
++ /* Read the Mac address and print it */
++ u32 val = otp_read(addr);
++
++ printf("%s address: ", func_name);
++ printf("0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n\n",
++ (ACFG_OUI>> 16) & 0xff, (ACFG_OUI>> 8) & 0xff,
++ (val >> 24) & 0xff, (val >> 16) & 0xff,
++ (val >> 8) & 0xff, val & 0xff);
++ } else {
++ printf("%s is not supported\n", func_name);
++ err = -1;
++ }
++ } else {
++ printf("%s is not supported\n", func_name);
++ err = -1;
++ }
++
++ return err;
++}
++
++int otp_blow_func(char *func_name, char *func_val)
++{
++ s32 err = 0;
++
++ if (0 == strncmp(func_name, "fecmac", 6)) {
++ s32 addr = func_name[6] -'0';
++
++ if ((addr >= 0) && (addr < 2)) {
++ u8 ea[6] = { 0 };
++ u32 macaddr;
++
++ eth_parse_enetaddr(func_val, ea);
++ if (!is_valid_ether_addr(ea)) {
++ printf("Error: invalid mac address!\n");
++ return -1;
++ }
++
++ macaddr = (ea[2] << 24) | (ea[3] << 16) |
++ (ea[4] << 8) | ea[5];
++
++ err = otp_blow(addr, macaddr);
++
++ } else {
++ printf("%s is not supported\n", func_name);
++ err = -1;
++ }
++ } else {
++ printf("%s is not supported\n", func_name);
++ err = -1;
++ }
++
++ return err;
++}
++
++
++int do_otpops(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
++{
++ int addr = 0, val = 0;
++
++ if (argc < 2 || argc > 4)
++ goto err_rtn;
++
++ if (strcmp(argv[1], "read") == 0) {
++ if (strncmp(argv[2], "fecmac", 6) == 0) {
++ if (3 == argc)
++ otp_read_func(argv[2]);
++ else
++ goto err_rtn;
++ } else {
++ if (3 == argc) {
++ addr = simple_strtoul(argv[2], NULL, 16);
++
++ printf("Read fuse at add: 0x%02x\n", addr);
++ val = otp_read(addr);
++ printf("fuses at (addr:0x%02x) = 0x%08x\n",
++ addr, val);
++ } else
++ goto err_rtn;
++ }
++ } else if (strcmp(argv[1], "blow") == 0) {
++ if (strncmp(argv[2], "fecmac", 6) == 0) {
++ if (4 == argc)
++ otp_blow_func(argv[2], argv[3]);
++ else
++ goto err_rtn;
++ } else {
++ if (4 == argc) {
++ addr = simple_strtoul(argv[2], NULL, 16);
++ val = simple_strtoul(argv[3], NULL, 16);
++
++ otp_blow(addr, val);
++ } else
++ goto err_rtn;
++ }
++ } else
++ goto err_rtn;
++
++ return 0;
++err_rtn:
++ printf("Invalid parameters!\n");
++ printf("It is too dangeous for you to use ocotp command.\n");
++ return 1;
++}
++
++U_BOOT_CMD(
++ ocotp, 4, 1, do_otpops,
++ "OCOTP sub system",
++ "Warning: all numbers in parameter are in hex format!\n"
++ "ocotp read <addr> - Read some fuses\n"
++ "ocotp read fecmac<n> - Read fecmac<n> MAC address\n"
++ "ocotp blow <addr> <value> - Blow some fuses\n"
++ "ocotp blow fecmac<n> <0x##:0x##:0x##:0x##:0x##:0x##> "
++ "- Blow fecmac<n> MAC address");
++
--- u-boot-2011.12/board/armadeus/apf28/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-2011.12/board/armadeus/apf28/Makefile 2011-11-27 11:31:22.299138403 +0100
-@@ -0,0 +1,49 @@
++++ u-boot-2011.12/board/armadeus/apf28/Makefile 2012-02-07 01:39:18.114788951 +0100
+@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd...@de....
@@ -251,10 +531,12 @@
+
+ifndef CONFIG_SPL_BUILD
+COBJS := apf28.o
++COBJS-$(CONFIG_IMX_OCOTP) += cmd_ocotp.o
+else
+COBJS := spl_boot.o
+endif
+
++COBJS += $(COBJS-y)
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
hooks/post-receive
--
armadeus
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