[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-22-gfd45f84

[Nicolas <th...@us...>]

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- Log -----------------------------------------------------------------
commit fd45f8402fc607f20d1d600b7c925e6a69f25f2f
Author: Nicolas Colombain <nic...@ar...>
Date:   Fri Feb 3 10:38:41 2012 +0100

    [U-BOOT] fix mx28 spl_power_init_irq

-----------------------------------------------------------------------

Summary of changes:
 .../503-imx28-fix_spl_power_init_IRQ_bit.patch     |   44 ++++++++++++++++++++
 1 files changed, 44 insertions(+), 0 deletions(-)
 create mode 100644 patches/u-boot/2011.12/503-imx28-fix_spl_power_init_IRQ_bit.patch

diff --git a/patches/u-boot/2011.12/503-imx28-fix_spl_power_init_IRQ_bit.patch b/patches/u-boot/2011.12/503-imx28-fix_spl_power_init_IRQ_bit.patch
new file mode 100644
index 0000000..9d5b255
--- /dev/null
+++ b/patches/u-boot/2011.12/503-imx28-fix_spl_power_init_IRQ_bit.patch
@@ -0,0 +1,44 @@
+--- u-boot-2011.12/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c	1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2011.12/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c	2012-02-03 10:25:07.000000000 +0100
+@@ -187,7 +187,7 @@ void mx28_enable_4p2_dcdc_input(int xfer
+ 	writel(POWER_RESET_UNLOCK_KEY | POWER_RESET_PWD_OFF,
+ 		&power_regs->hw_power_reset);
+ 
+-	clrbits_le32(&power_regs->hw_power_ctrl, POWER_CTRL_ENIRQ_VDD5V_DROOP);
++	writel(POWER_CTRL_ENIRQ_VDD5V_DROOP, &power_regs->hw_power_ctrl_clr);
+ 
+ 	if (xfer && (readl(&power_regs->hw_power_5vctrl) &
+ 			POWER_5VCTRL_ENABLE_DCDC)) {
+@@ -240,8 +240,8 @@ void mx28_enable_4p2_dcdc_input(int xfer
+ 		clrbits_le32(&power_regs->hw_power_minpwr, POWER_MINPWR_PWD_BO);
+ 
+ 	while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ)
+-		clrbits_le32(&power_regs->hw_power_ctrl,
+-				POWER_CTRL_VBUS_VALID_IRQ);
++		writel(POWER_CTRL_VBUS_VALID_IRQ, 
++				&power_regs->hw_power_ctrl_clr);
+ 
+ 	if (prev_5v_brnout) {
+ 		writel(POWER_5VCTRL_PWDN_5VBRNOUT,
+@@ -256,15 +256,15 @@ void mx28_enable_4p2_dcdc_input(int xfer
+ 	}
+ 
+ 	while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VDD5V_DROOP_IRQ)
+-		clrbits_le32(&power_regs->hw_power_ctrl,
+-				POWER_CTRL_VDD5V_DROOP_IRQ);
++		writel(POWER_CTRL_VDD5V_DROOP_IRQ, 
++				&power_regs->hw_power_ctrl_clr);
+ 
+ 	if (prev_5v_droop)
+-		clrbits_le32(&power_regs->hw_power_ctrl,
+-				POWER_CTRL_ENIRQ_VDD5V_DROOP);
++		writel(POWER_CTRL_ENIRQ_VDD5V_DROOP, 
++				&power_regs->hw_power_ctrl_clr);
+ 	else
+-		setbits_le32(&power_regs->hw_power_ctrl,
+-				POWER_CTRL_ENIRQ_VDD5V_DROOP);
++		writel(POWER_CTRL_ENIRQ_VDD5V_DROOP, 
++				&power_regs->hw_power_ctrl_clr);
+ }
+ 
+ void mx28_power_init_4p2_regulator(void)


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