[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.0-2638-g8fa619e
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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.0-2638-g8fa619e
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From: jorasse <jo...@us...> - 2011-12-12 22:36:14
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This is an automated email from the git hooks/post-receive script. It was
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the project "armadeus".
The branch, master has been updated
via 8fa619e4fc8623a86d0c4b283c292da5732a7d1d (commit)
via ced26c4d2110c09939184296b303c8b597f0c950 (commit)
from 198d23a6cd25420f5fbf0a61a50afa56369a47d9 (commit)
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- Log -----------------------------------------------------------------
commit 8fa619e4fc8623a86d0c4b283c292da5732a7d1d
Merge: ced26c4 198d23a
Author: Eric Jarrige <eri...@ar...>
Date: Mon Dec 12 22:34:13 2011 +0100
Merge branch 'master' of ssh://armadeus.git.sourceforge.net/gitroot/armadeus/armadeus
commit ced26c4d2110c09939184296b303c8b597f0c950
Author: Eric Jarrige <eri...@ar...>
Date: Mon Dec 12 22:33:30 2011 +0100
[UBOOT][APF28] Update iomux minimal config and FEC0 reset
-----------------------------------------------------------------------
Summary of changes:
.../target/device/armadeus/apf28/apf28-u-boot-.h | 5 +-
patches/u-boot/2011.11/01-uboot-apf28.patch | 72 +++++++++++---------
2 files changed, 42 insertions(+), 35 deletions(-)
diff --git a/buildroot/target/device/armadeus/apf28/apf28-u-boot-.h b/buildroot/target/device/armadeus/apf28/apf28-u-boot-.h
index 3482f05..c7084fc 100644
--- a/buildroot/target/device/armadeus/apf28/apf28-u-boot-.h
+++ b/buildroot/target/device/armadeus/apf28/apf28-u-boot-.h
@@ -70,7 +70,7 @@
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_GPIO
-#define CONFIG_CMD_I2C
+/*#define CONFIG_CMD_I2C*/
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NAND
@@ -78,7 +78,7 @@
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_SETEXPR
-#define CONFIG_CMD_SPI
+/*#define CONFIG_CMD_SPI*/
#define CONFIG_CMD_USB
/*
@@ -188,6 +188,7 @@
#define CONFIG_MII
#define CONFIG_DISCOVER_PHY
#define CONFIG_FEC_XCV_TYPE RMII
+#define CONFIG_M28_FEC_MAC_IN_OCOTP
#endif
/*
diff --git a/patches/u-boot/2011.11/01-uboot-apf28.patch b/patches/u-boot/2011.11/01-uboot-apf28.patch
index 6118f1a..5675014 100644
--- a/patches/u-boot/2011.11/01-uboot-apf28.patch
+++ b/patches/u-boot/2011.11/01-uboot-apf28.patch
@@ -1,6 +1,6 @@
--- u-boot-orig/board/armadeus/apf28/apf28.c 1970-01-01 01:00:00.000000000 +0100
+++ u-boot-custom/board/armadeus/apf28/apf28.c 2011-12-01 19:05:09.737024396 +0100
-@@ -0,0 +1,212 @@
+@@ -0,0 +1,216 @@
+/*
+ * APF28 motherboard based on DENX M28 module
+ *
@@ -57,7 +57,7 @@
+
+#ifdef CONFIG_CMD_USB
+ mxs_iomux_setup_pad(MX28_PAD_LCD_D23__GPIO_1_23 |
-+ MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP);
++ MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL);
+ gpio_direction_output(MX28_PAD_LCD_D23__GPIO_1_23, 0);
+#endif
+
@@ -118,10 +118,10 @@
+
+int fecmxc_mii_postcall(int phy)
+{
-+ miiphy_write("FEC1", phy, MII_BMCR, 0x9000);
-+ miiphy_write("FEC1", phy, MII_OPMODE_STRAP_OVERRIDE, 0x0202);
++ miiphy_write("FEC", phy, MII_BMCR, 0x9000);
++ miiphy_write("FEC", phy, MII_OPMODE_STRAP_OVERRIDE, 0x0202);
+ if (phy == 3)
-+ miiphy_write("FEC1", 3, MII_PHY_CTRL2, 0x8180);
++ miiphy_write("FEC", 3, MII_PHY_CTRL2, 0x8180);
+ return 0;
+}
+
@@ -138,18 +138,22 @@
+ CLKCTRL_ENET_TIME_SEL_MASK | CLKCTRL_ENET_CLK_OUT_EN,
+ CLKCTRL_ENET_TIME_SEL_RMII_CLK);
+
++ gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
++ udelay(100);
++ gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
++
+ ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
+ if (ret) {
+ printf("FEC MXS: Unable to init FEC0\n");
+ return ret;
+ }
+
-+ ret = fecmxc_initialize_multi(bis, 1, 3, MXS_ENET1_BASE);
++/* ret = fecmxc_initialize_multi(bis, 1, 3, MXS_ENET1_BASE);
+ if (ret) {
+ printf("FEC MXS: Unable to init FEC1\n");
+ return ret;
+ }
-+
++*/
+ dev = eth_get_dev_by_name("FEC0");
+ if (!dev) {
+ printf("FEC MXS: Unable to get FEC0 device entry\n");
@@ -162,7 +166,7 @@
+ return ret;
+ }
+
-+ dev = eth_get_dev_by_name("FEC1");
++/* dev = eth_get_dev_by_name("FEC1");
+ if (!dev) {
+ printf("FEC MXS: Unable to get FEC1 device entry\n");
+ return -EINVAL;
@@ -173,7 +177,7 @@
+ printf("FEC MXS: Unable to register FEC1 mii postcall\n");
+ return ret;
+ }
-+
++*/
+ return ret;
+}
+
@@ -561,7 +565,7 @@
+}
--- u-boot-orig/board/armadeus/apf28/mmc_boot.c 1970-01-01 01:00:00.000000000 +0100
+++ u-boot-custom/board/armadeus/apf28/mmc_boot.c 2011-12-01 19:32:00.022103665 +0100
-@@ -0,0 +1,273 @@
+@@ -0,0 +1,275 @@
+/*
+ * Freescale i.MX28 Boot setup
+ *
@@ -615,15 +619,15 @@
+#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
+#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
+#define MUX_CONFIG_GPMI (MXS_PAD_1V8 | MXS_PAD_4MA | MXS_PAD_NOPULL)
-+#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
++#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
+#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+
+const iomux_cfg_t iomux_setup[] = {
+ /* LED */
-+ /*MX28_PAD_ENET0_RXD3__GPIO_4_10 | MUX_CONFIG_LED,*/
++ MX28_PAD_GPMI_RDY1__GPIO_0_21 | MUX_CONFIG_LED,
+
+ /* framebuffer */
-+ MX28_PAD_LCD_D00__LCD_D0 | MUX_CONFIG_LCD,
++/* MX28_PAD_LCD_D00__LCD_D0 | MUX_CONFIG_LCD,
+ MX28_PAD_LCD_D01__LCD_D1 | MUX_CONFIG_LCD,
+ MX28_PAD_LCD_D02__LCD_D2 | MUX_CONFIG_LCD,
+ MX28_PAD_LCD_D03__LCD_D3 | MUX_CONFIG_LCD,
@@ -645,9 +649,9 @@
+ MX28_PAD_LCD_D19__LCD_D19 | MUX_CONFIG_LCD,
+ MX28_PAD_LCD_D20__LCD_D20 | MUX_CONFIG_LCD,
+ MX28_PAD_LCD_D21__LCD_D21 | MUX_CONFIG_LCD,
-+ MX28_PAD_LCD_D22__LCD_D22 | MUX_CONFIG_LCD,
++ MX28_PAD_LCD_D22__LCD_D22 | MUX_CONFIG_LCD,*/
+/* MX28_PAD_LCD_D23__LCD_D23 | MUX_CONFIG_LCD,*/
-+ MX28_PAD_LCD_RD_E__LCD_VSYNC | MUX_CONFIG_LCD,
++/* MX28_PAD_LCD_RD_E__LCD_VSYNC | MUX_CONFIG_LCD,
+ MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MUX_CONFIG_LCD,
+ MX28_PAD_LCD_RS__LCD_DOTCLK | MUX_CONFIG_LCD,
+ MX28_PAD_LCD_CS__LCD_CS | MUX_CONFIG_LCD,
@@ -655,27 +659,27 @@
+ MX28_PAD_LCD_HSYNC__LCD_HSYNC | MUX_CONFIG_LCD,
+ MX28_PAD_LCD_DOTCLK__LCD_DOTCLK | MUX_CONFIG_LCD,
+ MX28_PAD_LCD_ENABLE__GPIO_1_31 | MUX_CONFIG_LCD,
-+ MX28_PAD_LCD_RESET__GPIO_3_30 | MUX_CONFIG_LCD,
++ MX28_PAD_LCD_RESET__GPIO_3_30 | MUX_CONFIG_LCD,*/
+
+ /* UART1 */
+ MX28_PAD_PWM0__DUART_RX,
+ MX28_PAD_PWM1__DUART_TX,
-+ MX28_PAD_AUART0_TX__DUART_RTS,
-+ MX28_PAD_AUART0_RX__DUART_CTS,
++/* MX28_PAD_AUART0_TX__DUART_RTS,
++ MX28_PAD_AUART0_RX__DUART_CTS,*/
+
+ /* UART2 */
-+ MX28_PAD_AUART1_RX__AUART1_RX,
++/* MX28_PAD_AUART1_RX__AUART1_RX,
+ MX28_PAD_AUART1_TX__AUART1_TX,
+ MX28_PAD_AUART1_RTS__AUART1_RTS,
-+ MX28_PAD_AUART1_CTS__AUART1_CTS,
++ MX28_PAD_AUART1_CTS__AUART1_CTS,*/
+
+ /* CAN */
-+ MX28_PAD_GPMI_RDY2__CAN0_TX,
-+ MX28_PAD_GPMI_RDY3__CAN0_RX,
++/* MX28_PAD_GPMI_RDY2__CAN0_TX,
++ MX28_PAD_GPMI_RDY3__CAN0_RX,*/
+
+ /* I2C */
-+ MX28_PAD_I2C0_SCL__I2C0_SCL,
-+ MX28_PAD_I2C0_SDA__I2C0_SDA,
++/* MX28_PAD_I2C0_SCL__I2C0_SCL,
++ MX28_PAD_I2C0_SDA__I2C0_SDA,*/
+
+ /* TSC2007 */
+ /*MX28_PAD_SAIF0_MCLK__GPIO_3_20 | MUX_CONFIG_TSC,*/
@@ -725,17 +729,19 @@
+ MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
+ MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
++ MX28_PAD_ENET0_TX_CLK__GPIO_4_5 | MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL,
++ MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL,
+
-+ MX28_PAD_ENET0_COL__ENET1_TX_EN | MUX_CONFIG_ENET,
++/* MX28_PAD_ENET0_COL__ENET1_TX_EN | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_CRS__ENET1_RX_EN | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET,
-+ MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET,
++ MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET,*/
+
+ /* I2C */
-+ MX28_PAD_I2C0_SCL__I2C0_SCL,
-+ MX28_PAD_I2C0_SDA__I2C0_SDA,
++/* MX28_PAD_I2C0_SCL__I2C0_SCL,
++ MX28_PAD_I2C0_SDA__I2C0_SDA,*/
+
+ /* EMI */
+ MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
@@ -756,8 +762,8 @@
+ MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
-+ MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
-+ MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
++/* MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
++ MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,*/
+ MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
@@ -786,15 +792,15 @@
+ MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
-+ MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
++/* MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,*/
+ MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
+
+ /* SPI2 (for flash) */
-+ MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
++/* MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
+ MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
+ MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
+ MX28_PAD_SSP2_SS0__SSP2_D3 |
-+ (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
++ (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),*/
+};
+
+void board_init_ll(void)
hooks/post-receive
--
armadeus
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