[Armadeus-commitlog] armadeus branch, master, updated. release-3.4-151-gd10a70d
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[Armadeus-commitlog] armadeus branch, master, updated. release-3.4-151-gd10a70d
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From: Julien B a. A. <ar...@us...> - 2011-05-27 13:29:29
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via d10a70d0fa5f8ffb5092d8e518c7afca571e5536 (commit)
from 231931d9f012ed086fc20df212e995c1993809c1 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d10a70d0fa5f8ffb5092d8e518c7afca571e5536
Author: Julien Boibessot <jul...@ar...>
Date: Fri May 27 15:16:10 2011 +0200
[U-BOOT] Add I2C support to the APF51
-----------------------------------------------------------------------
Summary of changes:
.../device/armadeus/apf51/apf51-u-boot-2010.03.h | 9 +-
.../target/u-boot/u-boot-2010.03-401-apf51.patch | 54 +++---
...le-mxc_i2c-add_support_for_MX53_processor.patch | 73 +++++++
...c_i2c-add_support_for_the_iMX35_processor.patch | 41 ++++
...3-422-denx-mxc_i2c-get_rid_of__REG_access.patch | 203 ++++++++++++++++++++
...c_i2c-address_failure_with_mx35_processor.patch | 191 ++++++++++++++++++
...c_i2c-add_support_for_the_iMX51_processor.patch | 18 ++
7 files changed, 561 insertions(+), 28 deletions(-)
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-420-freescale-mxc_i2c-add_support_for_MX53_processor.patch
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-421-denx-mxc_i2c-add_support_for_the_iMX35_processor.patch
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-422-denx-mxc_i2c-get_rid_of__REG_access.patch
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-423-denx-mxc_i2c-address_failure_with_mx35_processor.patch
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-424-armadeus-mxc_i2c-add_support_for_the_iMX51_processor.patch
diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h
index 3a4694c..5ff0ecb 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h
@@ -92,7 +92,7 @@
#define CONFIG_CMD_FAT /* FAT support */
#define CONFIG_CMD_EXT2 /* EXT2 Support */
#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
-//#define CONFIG_CMD_I2C /* I2C serial bus support */
+#define CONFIG_CMD_I2C /* I2C serial bus support */
#define CONFIG_CMD_IIM /* imx iim fuse */
#undef CONFIG_CMD_IMLS /* List all found images */
#define CONFIG_CMD_IMMAP /* IMMR dump support */
@@ -711,11 +711,12 @@
/**
- * I2C Configs TODO TODO TODO TODO
+ * I2C Configs
*/
-//#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-//#define CONFIG_I2C_MXC 1
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#define CONFIG_I2C_MXC 1
#define CONFIG_SYS_I2C_PORT I2C2_BASE_ADDR
+#define CONFIG_SYS_I2C_MX51_PORT2
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0xfe
diff --git a/buildroot/target/u-boot/u-boot-2010.03-401-apf51.patch b/buildroot/target/u-boot/u-boot-2010.03-401-apf51.patch
index 14172fe..1f31e65 100644
--- a/buildroot/target/u-boot/u-boot-2010.03-401-apf51.patch
+++ b/buildroot/target/u-boot/u-boot-2010.03-401-apf51.patch
@@ -1,8 +1,8 @@
Index: u-boot-2010.03/board/armadeus/apf51/apf51.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ u-boot-2010.03/board/armadeus/apf51/apf51.c 2011-01-05 18:11:15.000000000 +0100
-@@ -0,0 +1,1151 @@
++++ u-boot-2010.03/board/armadeus/apf51/apf51.c 2011-05-27 11:22:10.000000000 +0200
+@@ -0,0 +1,1157 @@
+/*
+ * (C) Copyright 2010 Eric Jarrige, Armadeus Project
+ *
@@ -198,7 +198,7 @@ Index: u-boot-2010.03/board/armadeus/apf51/apf51.c
+ /*
+ * uart3
+ */
-+#ifdef APF51_RECOVER // temporary
++#ifdef APF51_RECOVER /* temporary */
+ mxc_request_iomux(MX51_PIN_AUD3_BB_RXD, IOMUX_CONFIG_ALT1);
+ mxc_request_iomux(MX51_PIN_AUD3_BB_FS, IOMUX_CONFIG_ALT1);
+ mxc_iomux_set_pad(MX51_PIN_AUD3_BB_RXD, UART_PAD_CFG);
@@ -545,7 +545,7 @@ Index: u-boot-2010.03/board/armadeus/apf51/apf51.c
+ mxc_iomux_set_pad(MX51_PIN_NANDF_WP_B, NAND_PAD100K_CFG);
+
+ mxc_request_iomux(MX51_PIN_NANDF_RB0 , IOMUX_CONFIG_ALT0);
-+ mxc_iomux_set_pad(MX51_PIN_NANDF_RB0 , PAD_CTL_DRV_VOT_HIGH |
++ mxc_iomux_set_pad(MX51_PIN_NANDF_RB0 , PAD_CTL_DRV_VOT_HIGH |
+ PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE |
+ PAD_CTL_PUE_PULL | PAD_CTL_100K_PU);
+
@@ -594,9 +594,9 @@ Index: u-boot-2010.03/board/armadeus/apf51/apf51.c
+ */
+ mxc_request_iomux(MX51_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX51_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT0);
-+ mxc_request_iomux(MX51_PIN_CSPI1_SS0 , IOMUX_CONFIG_ALT0);
-+ mxc_request_iomux(MX51_PIN_CSPI1_SS1 , IOMUX_CONFIG_ALT0);
-+ mxc_request_iomux(MX51_PIN_CSPI1_RDY , IOMUX_CONFIG_ALT0);
++ mxc_request_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT0);
++ mxc_request_iomux(MX51_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT0);
++ mxc_request_iomux(MX51_PIN_CSPI1_RDY, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX51_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT0);
+
+ /*
@@ -618,7 +618,8 @@ Index: u-boot-2010.03/board/armadeus/apf51/apf51.c
+ mxc_iomux_set_pad(MX51_PIN_NANDF_D14, CSPI_PAD_CFG);
+ mxc_iomux_set_pad(MX51_PIN_NANDF_D15, CSPI_PAD_CFG);
+
-+ mxc_iomux_set_input(MUX_IN_CSPI_IPP_IND_SS_B_1_SELECT_INPUT,INPUT_CTL_PATH1);
++ mxc_iomux_set_input(MUX_IN_CSPI_IPP_IND_SS_B_1_SELECT_INPUT,
++ INPUT_CTL_PATH1);
+}
+
+#define GPIO_DR 0x00 /* Data Register */
@@ -677,19 +678,24 @@ Index: u-boot-2010.03/board/armadeus/apf51/apf51.c
+ switch (module_base) {
+ case I2C1_BASE_ADDR:
+ /* SCL */
-+ mxc_request_iomux(MX51_PIN_I2C1_CLK, IOMUX_CONFIG_ALT0);
++ mxc_request_iomux(MX51_PIN_I2C1_CLK,
++ IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
+
+ /* SDA */
-+ mxc_request_iomux(MX51_PIN_I2C1_DAT, IOMUX_CONFIG_ALT0);
++ mxc_request_iomux(MX51_PIN_I2C1_DAT,
++ IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
+ break;
+
+ case I2C2_BASE_ADDR: /* do not use without disabling UART3 first */
+ /* SCL */
-+ mxc_request_iomux(MX51_PIN_I2C2_CLK, IOMUX_CONFIG_ALT4);
++ mxc_request_iomux(MX51_PIN_EIM_D24,
++ IOMUX_CONFIG_ALT4 | IOMUX_CONFIG_SION);
+
+ /* SDA */
-+ mxc_request_iomux(MX51_PIN_I2C2_DAT, IOMUX_CONFIG_ALT4);
-+ mxc_iomux_set_input(MUX_IN_I2C2_IPP_SDA_IN_SELECT_INPUT,INPUT_CTL_PATH0);
++ mxc_request_iomux(MX51_PIN_EIM_D27,
++ IOMUX_CONFIG_ALT4 | IOMUX_CONFIG_SION);
++ mxc_iomux_set_input(MUX_IN_I2C2_IPP_SDA_IN_SELECT_INPUT,
++ INPUT_CTL_PATH0);
+ break;
+
+ default:
@@ -1157,14 +1163,14 @@ Index: u-boot-2010.03/board/armadeus/apf51/apf51.c
Index: u-boot-2010.03/board/armadeus/apf51/config.mk
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ u-boot-2010.03/board/armadeus/apf51/config.mk 2011-01-05 18:11:15.000000000 +0100
++++ u-boot-2010.03/board/armadeus/apf51/config.mk 2011-05-26 17:46:17.000000000 +0200
@@ -0,0 +1,2 @@
+LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds
+TEXT_BASE = 0x9FF00000
Index: u-boot-2010.03/board/armadeus/apf51/Makefile
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ u-boot-2010.03/board/armadeus/apf51/Makefile 2011-01-05 18:11:15.000000000 +0100
++++ u-boot-2010.03/board/armadeus/apf51/Makefile 2011-05-26 17:46:17.000000000 +0200
@@ -0,0 +1,50 @@
+#
+# Copyright (C) 2007, Guennadi Liakhovetski <lg...@de...>
@@ -1219,7 +1225,7 @@ Index: u-boot-2010.03/board/armadeus/apf51/Makefile
Index: u-boot-2010.03/board/armadeus/apf51/u-boot.lds
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ u-boot-2010.03/board/armadeus/apf51/u-boot.lds 2011-01-05 18:11:15.000000000 +0100
++++ u-boot-2010.03/board/armadeus/apf51/u-boot.lds 2011-05-26 17:46:17.000000000 +0200
@@ -0,0 +1,64 @@
+/*
+ * January 2004 - Changed to support H4 device
@@ -1287,8 +1293,8 @@ Index: u-boot-2010.03/board/armadeus/apf51/u-boot.lds
+}
Index: u-boot-2010.03/include/asm-arm/mach-types.h
===================================================================
---- u-boot-2010.03.orig/include/asm-arm/mach-types.h 2011-01-05 18:05:11.000000000 +0100
-+++ u-boot-2010.03/include/asm-arm/mach-types.h 2011-01-05 18:11:15.000000000 +0100
+--- u-boot-2010.03.orig/include/asm-arm/mach-types.h 2010-03-31 23:54:39.000000000 +0200
++++ u-boot-2010.03/include/asm-arm/mach-types.h 2011-05-26 17:46:17.000000000 +0200
@@ -2699,6 +2699,7 @@
#define MACH_TYPE_MX53_EVK 2716
#define MACH_TYPE_IGEP0030 2717
@@ -1318,8 +1324,8 @@ Index: u-boot-2010.03/include/asm-arm/mach-types.h
*/
Index: u-boot-2010.03/MAKEALL
===================================================================
---- u-boot-2010.03.orig/MAKEALL 2011-01-05 18:09:44.000000000 +0100
-+++ u-boot-2010.03/MAKEALL 2011-01-05 18:11:15.000000000 +0100
+--- u-boot-2010.03.orig/MAKEALL 2011-05-26 17:46:17.000000000 +0200
++++ u-boot-2010.03/MAKEALL 2011-05-26 17:46:17.000000000 +0200
@@ -549,6 +549,7 @@
ap946es \
ap966 \
@@ -1330,8 +1336,8 @@ Index: u-boot-2010.03/MAKEALL
cp926ejs \
Index: u-boot-2010.03/Makefile
===================================================================
---- u-boot-2010.03.orig/Makefile 2011-01-05 18:09:44.000000000 +0100
-+++ u-boot-2010.03/Makefile 2011-01-05 18:11:15.000000000 +0100
+--- u-boot-2010.03.orig/Makefile 2011-05-26 17:46:17.000000000 +0200
++++ u-boot-2010.03/Makefile 2011-05-26 17:46:17.000000000 +0200
@@ -2735,6 +2735,9 @@
apf27_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs apf27 armadeus mx27
@@ -1345,7 +1351,7 @@ Index: u-boot-2010.03/Makefile
Index: u-boot-2010.03/board/armadeus/apf51/fpga.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ u-boot-2010.03/board/armadeus/apf51/fpga.h 2011-01-05 18:11:15.000000000 +0100
++++ u-boot-2010.03/board/armadeus/apf51/fpga.h 2011-05-26 17:46:17.000000000 +0200
@@ -0,0 +1,39 @@
+/*
+ * (C) Copyright 2002-2010
@@ -1389,7 +1395,7 @@ Index: u-boot-2010.03/board/armadeus/apf51/fpga.h
Index: u-boot-2010.03/board/armadeus/apf51/fpga.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ u-boot-2010.03/board/armadeus/apf51/fpga.c 2011-01-05 18:11:15.000000000 +0100
++++ u-boot-2010.03/board/armadeus/apf51/fpga.c 2011-05-26 17:46:17.000000000 +0200
@@ -0,0 +1,271 @@
+/*
+ * (C) Copyright 2002-2010
diff --git a/buildroot/target/u-boot/u-boot-2010.03-420-freescale-mxc_i2c-add_support_for_MX53_processor.patch b/buildroot/target/u-boot/u-boot-2010.03-420-freescale-mxc_i2c-add_support_for_MX53_processor.patch
new file mode 100644
index 0000000..58a8331
--- /dev/null
+++ b/buildroot/target/u-boot/u-boot-2010.03-420-freescale-mxc_i2c-add_support_for_MX53_processor.patch
@@ -0,0 +1,73 @@
+From: Liu Hui-R64343 <r6...@fr...>
+Date: Mon, 3 Jan 2011 22:27:39 +0000 (+0000)
+Subject: mxc_i2c: add support for MX53 processor
+X-Git-Tag: v2011.03-rc1~2^2~45
+X-Git-Url: http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commitdiff_plain;h=127cec1889c7a9bb3c3eab521779b08657043a9a
+
+mxc_i2c: add support for MX53 processor
+
+This patch add I2C support for Freescale MX53 processor
+
+Signed-off-by: Jason Liu <r6...@fr...>
+---
+
+diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
+index 8e10fbb..1ebec14 100644
+--- a/drivers/i2c/mxc_i2c.c
++++ b/drivers/i2c/mxc_i2c.c
+@@ -26,8 +26,14 @@
+
+ #if defined(CONFIG_HARD_I2C)
+
++#if defined(CONFIG_MX31)
+ #include <asm/arch/mx31.h>
+ #include <asm/arch/mx31-regs.h>
++#endif
++
++#if defined(CONFIG_MX53)
++#include <asm/arch/clock.h>
++#endif
+
+ #define IADR 0x00
+ #define IFDR 0x04
+@@ -47,7 +53,7 @@
+ #define I2SR_IIF (1 << 1)
+ #define I2SR_RX_NO_AK (1 << 0)
+
+-#ifdef CONFIG_SYS_I2C_MX31_PORT1
++#if defined(CONFIG_SYS_I2C_MX31_PORT1)
+ #define I2C_BASE 0x43f80000
+ #define I2C_CLK_OFFSET 26
+ #elif defined (CONFIG_SYS_I2C_MX31_PORT2)
+@@ -56,8 +62,12 @@
+ #elif defined (CONFIG_SYS_I2C_MX31_PORT3)
+ #define I2C_BASE 0x43f84000
+ #define I2C_CLK_OFFSET 30
++#elif defined(CONFIG_SYS_I2C_MX53_PORT1)
++#define I2C_BASE I2C1_BASE_ADDR
++#elif defined(CONFIG_SYS_I2C_MX53_PORT2)
++#define I2C_BASE I2C2_BASE_ADDR
+ #else
+-#error "define CONFIG_SYS_I2C_MX31_PORTx to use the mx31 I2C driver"
++#error "define CONFIG_SYS_I2C_MXxx_PORTx to use the I2C driver"
+ #endif
+
+ #ifdef DEBUG
+@@ -72,11 +82,16 @@ static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
+
+ void i2c_init(int speed, int unused)
+ {
+- int freq = mx31_get_ipg_clk();
++ int freq;
+ int i;
+
++#if defined(CONFIG_MX31)
++ freq = mx31_get_ipg_clk();
+ /* start the required I2C clock */
+ __REG(CCM_CGR0) = __REG(CCM_CGR0) | (3 << I2C_CLK_OFFSET);
++#else
++ freq = mxc_get_clock(MXC_IPG_PERCLK);
++#endif
+
+ for (i = 0; i < 0x1f; i++)
+ if (freq / div[i] <= speed)
diff --git a/buildroot/target/u-boot/u-boot-2010.03-421-denx-mxc_i2c-add_support_for_the_iMX35_processor.patch b/buildroot/target/u-boot/u-boot-2010.03-421-denx-mxc_i2c-add_support_for_the_iMX35_processor.patch
new file mode 100644
index 0000000..5c16cb5
--- /dev/null
+++ b/buildroot/target/u-boot/u-boot-2010.03-421-denx-mxc_i2c-add_support_for_the_iMX35_processor.patch
@@ -0,0 +1,41 @@
+From: Stefano Babic <sb...@de...>
+Date: Wed, 19 Jan 2011 22:46:26 +0000 (+0000)
+Subject: mxc_i2c: Add support for the i.MX35 processor
+X-Git-Tag: v2011.03-rc1~2^2~34
+X-Git-Url: http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commitdiff_plain;h=04220612f69a7148f7f6d045638c8046bd265b29
+
+mxc_i2c: Add support for the i.MX35 processor
+
+Signed-off-by: Stefano Babic <sb...@de...>
+CC: Heiko Schocher <hs...@de...>
+Acked-by: Heiko Schocher <hs...@de...>
+---
+
+diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
+index 1ebec14..7f669ff 100644
+--- a/drivers/i2c/mxc_i2c.c
++++ b/drivers/i2c/mxc_i2c.c
+@@ -29,9 +29,8 @@
+ #if defined(CONFIG_MX31)
+ #include <asm/arch/mx31.h>
+ #include <asm/arch/mx31-regs.h>
+-#endif
+-
+-#if defined(CONFIG_MX53)
++#else
++#include <asm/arch/imx-regs.h>
+ #include <asm/arch/clock.h>
+ #endif
+
+@@ -66,8 +65,10 @@
+ #define I2C_BASE I2C1_BASE_ADDR
+ #elif defined(CONFIG_SYS_I2C_MX53_PORT2)
+ #define I2C_BASE I2C2_BASE_ADDR
++#elif defined(CONFIG_SYS_I2C_MX35_PORT1)
++#define I2C_BASE I2C_BASE_ADDR
+ #else
+-#error "define CONFIG_SYS_I2C_MXxx_PORTx to use the I2C driver"
++#error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver"
+ #endif
+
+ #ifdef DEBUG
diff --git a/buildroot/target/u-boot/u-boot-2010.03-422-denx-mxc_i2c-get_rid_of__REG_access.patch b/buildroot/target/u-boot/u-boot-2010.03-422-denx-mxc_i2c-get_rid_of__REG_access.patch
new file mode 100644
index 0000000..f2968dc
--- /dev/null
+++ b/buildroot/target/u-boot/u-boot-2010.03-422-denx-mxc_i2c-get_rid_of__REG_access.patch
@@ -0,0 +1,203 @@
+From: Stefano Babic <sb...@de...>
+Date: Thu, 20 Jan 2011 07:50:44 +0000 (+0000)
+Subject: I2C: mxc_i2c: get rid of __REG access
+X-Git-Tag: v2011.03-rc1~2^2~33
+X-Git-Url: http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commitdiff_plain;h=1d549ade61078b50e68ff867fe59401bb5c2db9b
+
+I2C: mxc_i2c: get rid of __REG access
+
+This driver accesses to processor's register
+via __REG macros, that are removed (or are planned
+to be removed) and replaced by C structures.
+This patches replaces all occurrencies of __REG macros.
+
+Signed-off-by: Stefano Babic <sb...@de...>
+CC: Heiko Schocher <hs...@de...>
+Acked-by: Heiko Schocher <hs...@de...>
+---
+
+diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
+index 7f669ff..fd6db18 100644
+--- a/drivers/i2c/mxc_i2c.c
++++ b/drivers/i2c/mxc_i2c.c
+@@ -23,6 +23,7 @@
+ */
+
+ #include <common.h>
++#include <asm/io.h>
+
+ #if defined(CONFIG_HARD_I2C)
+
+@@ -81,15 +82,26 @@ static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
+ 160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
+ 1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840};
+
++static inline void i2c_reset(void)
++{
++ writew(0, I2C_BASE + I2CR); /* Reset module */
++ writew(0, I2C_BASE + I2SR);
++ writew(I2CR_IEN, I2C_BASE + I2CR);
++}
++
+ void i2c_init(int speed, int unused)
+ {
+ int freq;
+ int i;
+
+ #if defined(CONFIG_MX31)
++ struct clock_control_regs *sc_regs =
++ (struct clock_control_regs *)CCM_BASE;
++
+ freq = mx31_get_ipg_clk();
+ /* start the required I2C clock */
+- __REG(CCM_CGR0) = __REG(CCM_CGR0) | (3 << I2C_CLK_OFFSET);
++ writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET),
++ &sc_regs->cgr0);
+ #else
+ freq = mxc_get_clock(MXC_IPG_PERCLK);
+ #endif
+@@ -98,30 +110,28 @@ void i2c_init(int speed, int unused)
+ if (freq / div[i] <= speed)
+ break;
+
+- DPRINTF("%s: speed: %d\n",__FUNCTION__, speed);
++ debug("%s: speed: %d\n", __func__, speed);
+
+- __REG16(I2C_BASE + I2CR) = 0; /* Reset module */
+- __REG16(I2C_BASE + IFDR) = i;
+- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
+- __REG16(I2C_BASE + I2SR) = 0;
++ writew(i, I2C_BASE + IFDR);
++ i2c_reset();
+ }
+
+ static int wait_busy(void)
+ {
+ int timeout = 10000;
+
+- while (!(__REG16(I2C_BASE + I2SR) & I2SR_IIF) && --timeout)
++ while (!(readw(I2C_BASE + I2SR) & I2SR_IIF) && --timeout)
+ udelay(1);
+- __REG16(I2C_BASE + I2SR) = 0; /* clear interrupt */
++ writew(0, I2C_BASE + I2SR); /* clear interrupt */
+
+ return timeout;
+ }
+
+ static int tx_byte(u8 byte)
+ {
+- __REG16(I2C_BASE + I2DR) = byte;
++ writew(byte, I2C_BASE + I2DR);
+
+- if (!wait_busy() || __REG16(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
++ if (!wait_busy() || readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
+ return -1;
+ return 0;
+ }
+@@ -131,27 +141,27 @@ static int rx_byte(void)
+ if (!wait_busy())
+ return -1;
+
+- return __REG16(I2C_BASE + I2DR);
++ return readw(I2C_BASE + I2DR);
+ }
+
+ int i2c_probe(uchar chip)
+ {
+ int ret;
+
+- __REG16(I2C_BASE + I2CR) = 0; /* Reset module */
+- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
++ writew(0, I2C_BASE + I2CR); /* Reset module */
++ writew(I2CR_IEN, I2C_BASE + I2CR);
+
+- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
++ writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
+ ret = tx_byte(chip << 1);
+- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MTX;
++ writew(I2CR_IEN | I2CR_MTX, I2C_BASE + I2CR);
+
+ return ret;
+ }
+
+ static int i2c_addr(uchar chip, uint addr, int alen)
+ {
+- __REG16(I2C_BASE + I2SR) = 0; /* clear interrupt */
+- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
++ writew(0, I2C_BASE + I2SR);
++ writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
+
+ if (tx_byte(chip << 1))
+ return -1;
+@@ -167,35 +177,40 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+ int timeout = 10000;
+ int ret;
+
+- DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__, chip, addr, alen, len);
++ debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
++ __func__, chip, addr, alen, len);
+
+ if (i2c_addr(chip, addr, alen)) {
+ printf("i2c_addr failed\n");
+ return -1;
+ }
+
+- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA;
++ writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA, I2C_BASE + I2CR);
+
+ if (tx_byte(chip << 1 | 1))
+ return -1;
+
+- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | ((len == 1) ? I2CR_TX_NO_AK : 0);
++ writew(I2CR_IEN | I2CR_MSTA |
++ ((len == 1) ? I2CR_TX_NO_AK : 0),
++ I2C_BASE + I2CR);
+
+- ret = __REG16(I2C_BASE + I2DR);
++ ret = readw(I2C_BASE + I2DR);
+
+ while (len--) {
+ if ((ret = rx_byte()) < 0)
+ return -1;
+ *buf++ = ret;
+ if (len <= 1)
+- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_TX_NO_AK;
++ writew(I2CR_IEN | I2CR_MSTA |
++ I2CR_TX_NO_AK,
++ I2C_BASE + I2CR);
+ }
+
+ wait_busy();
+
+- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
++ writew(I2CR_IEN, I2C_BASE + I2CR);
+
+- while (__REG16(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
++ while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
+ udelay(1);
+
+ return 0;
+@@ -203,8 +218,9 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+
+ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+ {
+- int timeout = 10000;
+- DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__, chip, addr, alen, len);
++ int timeout = I2C_MAX_TIMEOUT;
++ debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
++ __func__, chip, addr, alen, len);
+
+ if (i2c_addr(chip, addr, alen))
+ return -1;
+@@ -213,9 +229,9 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+ if (tx_byte(*buf++))
+ return -1;
+
+- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
++ writew(I2CR_IEN, I2C_BASE + I2CR);
+
+- while (__REG16(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
++ while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
+ udelay(1);
+
+ return 0;
diff --git a/buildroot/target/u-boot/u-boot-2010.03-423-denx-mxc_i2c-address_failure_with_mx35_processor.patch b/buildroot/target/u-boot/u-boot-2010.03-423-denx-mxc_i2c-address_failure_with_mx35_processor.patch
new file mode 100644
index 0000000..4a98776
--- /dev/null
+++ b/buildroot/target/u-boot/u-boot-2010.03-423-denx-mxc_i2c-address_failure_with_mx35_processor.patch
@@ -0,0 +1,191 @@
+From: Stefano Babic <sb...@de...>
+Date: Thu, 20 Jan 2011 07:51:31 +0000 (+0000)
+Subject: I2C: mxc_i2c: address failure with mx35 processor
+X-Git-Tag: v2011.03-rc1~2^2~32
+X-Git-Url: http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commitdiff_plain;h=81687212ee0b4fcb11f7d6700275b062c8f8d2b4
+
+I2C: mxc_i2c: address failure with mx35 processor
+
+There is sporadic failures when more as one I2C slave
+is on the bus and the processor tries to communicate
+with more as one slave.
+The problem was seen on a mx35pdk (two I2C slaves,
+PMIC controller and CAN/RTC chip).
+
+The current driver uses the IIF bit in the status register
+to check if the bus is busy or not. According to the manual,
+this is not correct, because the IIB bit should be checked.
+Not only, to check if a transfer is finished must be checked
+the ICF bit, and this is not tested at all.
+
+This patch comes from analyse with a corresponding driver
+provided by Freescale as part of the LTIB tool. Comparing
+the two drivers, it appears that the current u-boot driver checks
+the wrong bits, and depending on race condition, the transfer
+can be successful or not.
+
+The patch gets rid also of own debug function (DPRINTF),
+replaced with the general debug().
+
+Tested on Freescale mx35pdk.
+
+Signed-off-by: Stefano Babic <sb...@de...>
+CC: Heiko Schocher <hs...@de...>
+Acked-by: Heiko Schocher <hs...@de...>
+---
+
+diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
+index fd6db18..c5ec486 100644
+--- a/drivers/i2c/mxc_i2c.c
++++ b/drivers/i2c/mxc_i2c.c
+@@ -72,11 +72,8 @@
+ #error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver"
+ #endif
+
+-#ifdef DEBUG
+-#define DPRINTF(args...) printf(args)
+-#else
+-#define DPRINTF(args...)
+-#endif
++#define I2C_MAX_TIMEOUT 10000
++#define I2C_MAX_RETRIES 3
+
+ static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
+ 160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
+@@ -116,31 +113,61 @@ void i2c_init(int speed, int unused)
+ i2c_reset();
+ }
+
++static int wait_idle(void)
++{
++ int timeout = I2C_MAX_TIMEOUT;
++
++ while ((readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout) {
++ writew(0, I2C_BASE + I2SR);
++ udelay(1);
++ }
++ return timeout ? timeout : (!(readw(I2C_BASE + I2SR) & I2SR_IBB));
++}
++
+ static int wait_busy(void)
+ {
+- int timeout = 10000;
++ int timeout = I2C_MAX_TIMEOUT;
+
+- while (!(readw(I2C_BASE + I2SR) & I2SR_IIF) && --timeout)
++ while (!(readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout)
+ udelay(1);
+ writew(0, I2C_BASE + I2SR); /* clear interrupt */
+
+ return timeout;
+ }
+
++static int wait_complete(void)
++{
++ int timeout = I2C_MAX_TIMEOUT;
++
++ while ((!(readw(I2C_BASE + I2SR) & I2SR_ICF)) && (--timeout)) {
++ writew(0, I2C_BASE + I2SR);
++ udelay(1);
++ }
++ udelay(200);
++
++ writew(0, I2C_BASE + I2SR); /* clear interrupt */
++
++ return timeout;
++}
++
++
+ static int tx_byte(u8 byte)
+ {
+ writew(byte, I2C_BASE + I2DR);
+
+- if (!wait_busy() || readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
++ if (!wait_complete() || readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
+ return -1;
+ return 0;
+ }
+
+-static int rx_byte(void)
++static int rx_byte(int last)
+ {
+- if (!wait_busy())
++ if (!wait_complete())
+ return -1;
+
++ if (last)
++ writew(I2CR_IEN, I2C_BASE + I2CR);
++
+ return readw(I2C_BASE + I2DR);
+ }
+
+@@ -160,21 +187,45 @@ int i2c_probe(uchar chip)
+
+ static int i2c_addr(uchar chip, uint addr, int alen)
+ {
+- writew(0, I2C_BASE + I2SR);
+- writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
++ int i, retry = 0;
++ for (retry = 0; retry < 3; retry++) {
++ if (wait_idle())
++ break;
++ i2c_reset();
++ for (i = 0; i < I2C_MAX_TIMEOUT; i++)
++ udelay(1);
++ }
++ if (retry >= I2C_MAX_RETRIES) {
++ debug("%s:bus is busy(%x)\n",
++ __func__, readw(I2C_BASE + I2SR));
++ return -1;
++ }
++ writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
+
+- if (tx_byte(chip << 1))
++ if (!wait_busy()) {
++ debug("%s:trigger start fail(%x)\n",
++ __func__, readw(I2C_BASE + I2SR));
+ return -1;
++ }
+
++ if (tx_byte(chip << 1) || (readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)) {
++ debug("%s:chip address cycle fail(%x)\n",
++ __func__, readw(I2C_BASE + I2SR));
++ return -1;
++ }
+ while (alen--)
+- if (tx_byte((addr >> (alen * 8)) & 0xff))
++ if (tx_byte((addr >> (alen * 8)) & 0xff) ||
++ (readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)) {
++ debug("%s:device address cycle fail(%x)\n",
++ __func__, readw(I2C_BASE + I2SR));
+ return -1;
++ }
+ return 0;
+ }
+
+ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+ {
+- int timeout = 10000;
++ int timeout = I2C_MAX_TIMEOUT;
+ int ret;
+
+ debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
+@@ -197,7 +248,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+ ret = readw(I2C_BASE + I2DR);
+
+ while (len--) {
+- if ((ret = rx_byte()) < 0)
++ ret = rx_byte(len == 0);
++ if (ret < 0)
+ return -1;
+ *buf++ = ret;
+ if (len <= 1)
+@@ -206,8 +258,6 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+ I2C_BASE + I2CR);
+ }
+
+- wait_busy();
+-
+ writew(I2CR_IEN, I2C_BASE + I2CR);
+
+ while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
diff --git a/buildroot/target/u-boot/u-boot-2010.03-424-armadeus-mxc_i2c-add_support_for_the_iMX51_processor.patch b/buildroot/target/u-boot/u-boot-2010.03-424-armadeus-mxc_i2c-add_support_for_the_iMX51_processor.patch
new file mode 100644
index 0000000..3ee8b84
--- /dev/null
+++ b/buildroot/target/u-boot/u-boot-2010.03-424-armadeus-mxc_i2c-add_support_for_the_iMX51_processor.patch
@@ -0,0 +1,18 @@
+Signed-off-by: Julien Boibessot <jul...@ar...>
+
+Index: u-boot-2010.03/drivers/i2c/mxc_i2c.c
+===================================================================
+--- u-boot-2010.03.orig/drivers/i2c/mxc_i2c.c 2011-05-26 21:57:56.000000000 +0200
++++ u-boot-2010.03/drivers/i2c/mxc_i2c.c 2011-05-27 10:51:46.000000000 +0200
+@@ -62,9 +62,9 @@
+ #elif defined (CONFIG_SYS_I2C_MX31_PORT3)
+ #define I2C_BASE 0x43f84000
+ #define I2C_CLK_OFFSET 30
+-#elif defined(CONFIG_SYS_I2C_MX53_PORT1)
++#elif defined(CONFIG_SYS_I2C_MX53_PORT1) || defined(CONFIG_SYS_I2C_MX51_PORT1)
+ #define I2C_BASE I2C1_BASE_ADDR
+-#elif defined(CONFIG_SYS_I2C_MX53_PORT2)
++#elif defined(CONFIG_SYS_I2C_MX53_PORT2) || defined(CONFIG_SYS_I2C_MX51_PORT2)
+ #define I2C_BASE I2C2_BASE_ADDR
+ #elif defined(CONFIG_SYS_I2C_MX35_PORT1)
+ #define I2C_BASE I2C_BASE_ADDR
hooks/post-receive
--
armadeus
|
