[Armadeus-commitlog] armadeus branch, master, updated. release-3.3-208-gfb2661a
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[Armadeus-commitlog] armadeus branch, master, updated. release-3.3-208-gfb2661a
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From: Fabien M <fa...@us...> - 2011-01-05 14:18:31
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via fb2661a8a1a98185fca36de444d0cf4b71eb2ec6 (commit)
from 44b7df9db377469f1e97d17225d82640532f943d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit fb2661a8a1a98185fca36de444d0cf4b71eb2ec6
Author: Fabien Marteau <fab...@ar...>
Date: Wed Jan 5 14:58:12 2011 +0100
[U-BOOT] Clean apf27 patch, suppressing trailling white spaces
-----------------------------------------------------------------------
Summary of changes:
.../target/u-boot/u-boot-1.3.4-310-apf27.patch | 658 ++++++++++----------
1 files changed, 343 insertions(+), 315 deletions(-)
diff --git a/buildroot/target/u-boot/u-boot-1.3.4-310-apf27.patch b/buildroot/target/u-boot/u-boot-1.3.4-310-apf27.patch
index 77fb2a1..61bedd3 100644
--- a/buildroot/target/u-boot/u-boot-1.3.4-310-apf27.patch
+++ b/buildroot/target/u-boot/u-boot-1.3.4-310-apf27.patch
@@ -1,9 +1,11 @@
---- ref/u-boot-1.3.4/board/armadeus/apf27/apf27.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf27/apf27.c 2009-01-07 18:20:15.000000000 +0100
+Index: u-boot-1.3.4/board/armadeus/apf27/apf27.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-1.3.4/board/armadeus/apf27/apf27.c 2011-01-05 14:52:33.000000000 +0100
@@ -0,0 +1,181 @@
+/*
-+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
-+ * Copyright (C) 2008,2009 Eric Jarrige <jo...@us...>
++ * Copyright (C) 2007 Sascha Hauer, Pengutronix
++ * Copyright (C) 2008,2009 Eric Jarrige <jo...@us...>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
@@ -147,7 +149,7 @@
+ APF27_init_fpga (firmware_buffer, size);
+#endif
+
-+ /* detect compatibility issue of environment version */
++ /* detect compatibility issue of environment version */
+ s = getenv ("env_version");
+ if (( NULL == s ) || (0 != strcmp(s, CONFIG_ENV_VERSION))) {
+ printf("*** Warning - Environment version change suggests: "
@@ -156,7 +158,7 @@
+
+ /* Unlock whole flash but U-Boot */
+ s = getenv ("env_offset");
-+ offset = CFG_ENV_OFFSET;
++ offset = CFG_ENV_OFFSET;
+ if ((s != NULL) && (0 != strcmp(s, "0"))) {
+ offset = simple_strtoul(s, NULL, 16);
+ }
@@ -164,7 +166,7 @@
+ if (nand_unlock(&nand_info[0], offset, nand_info[0].size - offset)) {
+ printf("NAND flash lock/unlocked failed\n");
+ }
-+
++
+
+ return 0;
+}
@@ -182,8 +184,10 @@
+ printf("Armadeus APF2\n");
+ return 0;
+}
---- ref/u-boot-1.3.4/board/armadeus/apf27/config.mk 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf27/config.mk 2008-12-29 16:27:49.000000000 +0100
+Index: u-boot-1.3.4/board/armadeus/apf27/config.mk
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-1.3.4/board/armadeus/apf27/config.mk 2011-01-05 14:24:05.000000000 +0100
@@ -0,0 +1,13 @@
+#
+# This config file is used for compilation of armadeus sources
@@ -198,269 +202,273 @@
+TEXT_BASE = 0xAFF00000
+endif
+CONFIG_NAND_U_BOOT = y
---- ref/u-boot-1.3.4/board/armadeus/apf27/fpga.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf27/fpga.c 2008-12-29 16:27:49.000000000 +0100
+Index: u-boot-1.3.4/board/armadeus/apf27/fpga.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-1.3.4/board/armadeus/apf27/fpga.c 2011-01-05 14:51:48.000000000 +0100
@@ -0,0 +1,258 @@
-+ /*
-+ * (C) Copyright 2002-2008
-+ * Eric Jarrige <eri...@ar...>
-+ * Rich Ireland, Enterasys Networks, rir...@en....
-+ * Keith Outwater, kei...@mv....
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ */
-+ #include <common.h>
-+
-+ #if defined(CONFIG_FPGA)
-+
-+ #include <asm/arch/imx-regs.h>
-+ #include <asm/io.h>
-+ #include <command.h>
-+ #include <config.h>
-+ #include "fpga.h"
-+ #include <spartan3.h>
-+
-+ #define GPIO_PORT(x) ((x & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT)
-+ #define GPIO_SET(x) (DR(GPIO_PORT(x)) |= (1<<(x & GPIO_PIN_MASK)))
-+ #define GPIO_CLEAR(x) (DR(GPIO_PORT(x)) &= ~(1<<(x & GPIO_PIN_MASK)))
-+ #define GPIO_WRITE(x,y) ( y ? GPIO_SET(x) : GPIO_CLEAR(x) )
-+ #define GPIO_READ(x) ((SSR (GPIO_PORT(x)) & (1<<(x & GPIO_PIN_MASK)))>> \
-+ (x & GPIO_PIN_MASK))
-+ #ifdef FPGA_DEBUG
-+ #define PRINTF(fmt,args...) printf (fmt ,##args)
-+ #else
-+ #define PRINTF(fmt,args...)
-+ #endif
-+
-+ /* Note that these are pointers to code that is in Flash. They will be
-+ * relocated at runtime.
-+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
-+ * Just take care about the file size
++/*
++ * (C) Copyright 2002-2008
++ * Eric Jarrige <eri...@ar...>
++ * Rich Ireland, Enterasys Networks, rir...@en....
++ * Keith Outwater, kei...@mv....
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
+ */
-+ Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
-+ fpga_pre_fn,
-+ fpga_pgm_fn,
-+ fpga_init_fn,
-+ NULL,
-+ fpga_done_fn,
-+ fpga_clk_fn,
-+ fpga_cs_fn,
-+ fpga_wr_fn,
-+ fpga_rdata_fn,
-+ fpga_wdata_fn,
-+ fpga_busy_fn,
-+ fpga_abort_fn,
-+ fpga_post_fn,
-+ };
-+
-+ Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
-+ {Xilinx_Spartan3,
-+ slave_parallel,
-+ 1196128l/8,
-+ (void *) &fpga_fns,
-+ 0}
-+ };
-+
-+ /*
-+ * nitialize GPIO port B before download
-+ */
-+ int
-+ fpga_pre_fn (int cookie)
-+ {
-+ // Initialize GPIO pins
-+ GPIO_SET(CFG_FPGA_PWR);
-+ imx_gpio_mode (CFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
-+ imx_gpio_mode (CFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
-+ imx_gpio_mode (CFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+ imx_gpio_mode (CFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+ imx_gpio_mode (CFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+ imx_gpio_mode (CFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+ imx_gpio_mode (CFG_FPGA_SUSPEND | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+ GPIO_SET(CFG_FPGA_RESET);
-+ imx_gpio_mode (CFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+ imx_gpio_mode (CFG_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+ GPIO_SET(CFG_FPGA_PRG);
-+ GPIO_SET(CFG_FPGA_CLK);
-+ GPIO_SET(CFG_FPGA_RW);
-+ GPIO_SET(CFG_FPGA_CS);
-+ GPIO_CLEAR(CFG_FPGA_SUSPEND);
-+// GPIO_CLEAR(CFG_FPGA_RESET);
-+ GPIO_CLEAR(CFG_FPGA_PWR);
-+ udelay(30000); /*wait until supply started*/
-+
-+ return cookie;
-+ }
-+
-+ /*
-+ * Set the FPGA's active-low program line to the specified level
-+ */
-+ int
-+ fpga_pgm_fn (int assert, int flush, int cookie)
-+ {
-+ PRINTF ("%s:%d: FPGA PROGRAM %s", __FUNCTION__, __LINE__,
-+ assert?"high":"low");
-+ GPIO_WRITE( CFG_FPGA_PRG, !assert);
-+ return assert;
-+ }
-+
-+ /*
-+ * Set the FPGA's active-high clock line to the specified level
-+ */
-+ int
-+ fpga_clk_fn (int assert_clk, int flush, int cookie)
-+ {
-+ PRINTF ("%s:%d: FPGA CLOCK %s", __FUNCTION__, __LINE__,
-+ assert_clk?"high":"low");
-+ GPIO_WRITE( CFG_FPGA_CLK, !assert_clk);
-+ return assert_clk;
-+ }
-+
-+ /*
-+ * Test the state of the active-low FPGA INIT line. Return 1 on INIT
-+ * asserted (low).
-+ */
-+ int
-+ fpga_init_fn (int cookie)
-+ {
-+ int value;
-+ PRINTF ("%s:%d: INIT check... ", __FUNCTION__, __LINE__);
-+ value = GPIO_READ(CFG_FPGA_INIT);
-+ //printf("init value read %x",value);
-+ #ifdef CONFIG_SYS_FPGA_IS_PROTO
-+ return value;
-+ #else
-+ return !value;
-+ #endif
-+ }
-+
-+ /*
-+ * Test the state of the active-high FPGA DONE pin
-+ */
-+ int
-+ fpga_done_fn (int cookie)
-+ {
-+ PRINTF ("%s:%d: DONE check... %s", __FUNCTION__, __LINE__,
-+ GPIO_READ(CFG_FPGA_DONE)?"high":"low");
-+ return(GPIO_READ(CFG_FPGA_DONE)?FPGA_SUCCESS:FPGA_FAIL);
-+ }
-+
-+ /*
-+ * Set the FPGA's wr line to the specified level
-+ */
-+ int
-+ fpga_wr_fn (int assert_write, int flush, int cookie)
-+ {
-+ PRINTF ("%s:%d: FPGA RW... %s ", __FUNCTION__, __LINE__,
-+ assert_write?"high":"low");
-+ GPIO_WRITE( CFG_FPGA_RW, !assert_write);
-+ return assert_write;
-+ }
-+
-+ int
-+ fpga_cs_fn (int assert_cs, int flush, int cookie)
-+ {
-+ PRINTF ("%s:%d: FPGA CS %s ", __FUNCTION__, __LINE__,
-+ assert_cs?"high":"low");
-+ GPIO_WRITE( CFG_FPGA_CS, !assert_cs);
-+ return assert_cs;
-+ }
-+
-+ int
-+ fpga_rdata_fn ( unsigned char *data, int cookie )
-+ {
-+ PRINTF ("%s:%d: FPGA READ DATA %02X ", __FUNCTION__, __LINE__,
-+ *((char*)CFG_FPGA_RDATA));
-+ *data = (unsigned char)((*((unsigned short*)CFG_FPGA_RDATA))&0x00FF);
-+ return *data;
-+ }
-+
-+ int
-+ fpga_wdata_fn ( unsigned char data, int cookie )
-+ {
-+ PRINTF ("%s:%d: FPGA WRITE DATA %02X ", __FUNCTION__, __LINE__,
-+ data);
-+ *((unsigned short*)CFG_FPGA_WDATA) = data;
-+ return data;
-+ }
-+
-+ int
-+ fpga_abort_fn ( int cookie )
-+ {
-+ return cookie;
-+ }
-+
-+
-+ int
-+ fpga_busy_fn ( int cookie )
-+ {
-+ return 1;
-+ }
-+
-+ int
-+ fpga_post_fn (int cookie)
-+ {
-+ PRINTF ("%s:%d: FPGA POST ", __FUNCTION__, __LINE__);
-+
-+ imx_gpio_mode (CFG_FPGA_RW | GPIO_PF | GPIO_PUEN);
-+ imx_gpio_mode (CFG_FPGA_CS | GPIO_PF | GPIO_PUEN);
-+ imx_gpio_mode (CFG_FPGA_CLK | GPIO_PF | GPIO_PUEN);
-+ GPIO_SET(CFG_FPGA_PRG);
-+ GPIO_CLEAR(CFG_FPGA_RESET);
-+ imx_gpio_mode (CFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+ return cookie;
-+ }
-+
-+ /*
-+ * Initialize the fpga. Return 1 on success, 0 on failure.
-+ */
-+ int
-+ APF27_init_fpga (u_char * buffer, size_t size)
-+ {
-+ char *autoload = getenv ("firmware_autoload");
-+ DECLARE_GLOBAL_DATA_PTR;
-+
-+ int i,lout=0;
-+
-+ PRINTF ("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n",
-+ __FUNCTION__, __LINE__, gd->reloc_off);
-+ fpga_init (gd->reloc_off);
-+
-+ for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
-+ PRINTF ("%s:%d: Adding fpga %d\n", __FUNCTION__, __LINE__, i);
-+ fpga_add (fpga_xilinx, &fpga[i]);
-+ }
-+
-+ if ((size >= fpga[0].size) && ( autoload ) && (0 == strcmp(autoload, "1"))) {
-+ if (FPGA_SUCCESS != fpga_load( 0, (void *)buffer, size )) {
-+ lout = 1;
-+ printf("Firmware download failed!\n");
-+ }
-+ else
-+ printf("Firmware successfully programmed\n");
-+ }
-+ return lout;
-+ }
-+
-+ #endif /* CONFIG_FPGA */
---- ref/u-boot-1.3.4/board/armadeus/apf27/fpga.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf27/fpga.h 2008-12-29 16:27:49.000000000 +0100
++#include <common.h>
++
++#if defined(CONFIG_FPGA)
++
++#include <asm/arch/imx-regs.h>
++#include <asm/io.h>
++#include <command.h>
++#include <config.h>
++#include "fpga.h"
++#include <spartan3.h>
++
++#define GPIO_PORT(x) ((x & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT)
++#define GPIO_SET(x) (DR(GPIO_PORT(x)) |= (1<<(x & GPIO_PIN_MASK)))
++#define GPIO_CLEAR(x) (DR(GPIO_PORT(x)) &= ~(1<<(x & GPIO_PIN_MASK)))
++#define GPIO_WRITE(x,y) ( y ? GPIO_SET(x) : GPIO_CLEAR(x) )
++#define GPIO_READ(x) ((SSR (GPIO_PORT(x)) & (1<<(x & GPIO_PIN_MASK)))>> \
++ (x & GPIO_PIN_MASK))
++#ifdef FPGA_DEBUG
++#define PRINTF(fmt,args...) printf (fmt ,##args)
++#else
++#define PRINTF(fmt,args...)
++#endif
++
++/* Note that these are pointers to code that is in Flash. They will be
++ * relocated at runtime.
++ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
++ * Just take care about the file size
++*/
++Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
++ fpga_pre_fn,
++ fpga_pgm_fn,
++ fpga_init_fn,
++ NULL,
++ fpga_done_fn,
++ fpga_clk_fn,
++ fpga_cs_fn,
++ fpga_wr_fn,
++ fpga_rdata_fn,
++ fpga_wdata_fn,
++ fpga_busy_fn,
++ fpga_abort_fn,
++ fpga_post_fn,
++};
++
++Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
++ {Xilinx_Spartan3,
++ slave_parallel,
++ 1196128l/8,
++ (void *) &fpga_fns,
++ 0}
++};
++
++/*
++ * nitialize GPIO port B before download
++ */
++int
++fpga_pre_fn (int cookie)
++{
++ // Initialize GPIO pins
++ GPIO_SET(CFG_FPGA_PWR);
++ imx_gpio_mode (CFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
++ imx_gpio_mode (CFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
++ imx_gpio_mode (CFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
++ imx_gpio_mode (CFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
++ imx_gpio_mode (CFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
++ imx_gpio_mode (CFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
++ imx_gpio_mode (CFG_FPGA_SUSPEND | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
++ GPIO_SET(CFG_FPGA_RESET);
++ imx_gpio_mode (CFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
++ imx_gpio_mode (CFG_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
++ GPIO_SET(CFG_FPGA_PRG);
++ GPIO_SET(CFG_FPGA_CLK);
++ GPIO_SET(CFG_FPGA_RW);
++ GPIO_SET(CFG_FPGA_CS);
++ GPIO_CLEAR(CFG_FPGA_SUSPEND);
++// GPIO_CLEAR(CFG_FPGA_RESET);
++ GPIO_CLEAR(CFG_FPGA_PWR);
++ udelay(30000); /*wait until supply started*/
++
++ return cookie;
++}
++
++/*
++ * Set the FPGA's active-low program line to the specified level
++ */
++int
++fpga_pgm_fn (int assert, int flush, int cookie)
++{
++ PRINTF ("%s:%d: FPGA PROGRAM %s", __FUNCTION__, __LINE__,
++ assert?"high":"low");
++ GPIO_WRITE( CFG_FPGA_PRG, !assert);
++ return assert;
++}
++
++/*
++ * Set the FPGA's active-high clock line to the specified level
++ */
++int
++fpga_clk_fn (int assert_clk, int flush, int cookie)
++{
++ PRINTF ("%s:%d: FPGA CLOCK %s", __FUNCTION__, __LINE__,
++ assert_clk?"high":"low");
++ GPIO_WRITE( CFG_FPGA_CLK, !assert_clk);
++ return assert_clk;
++}
++
++/*
++ * Test the state of the active-low FPGA INIT line. Return 1 on INIT
++ * asserted (low).
++ */
++int
++fpga_init_fn (int cookie)
++{
++ int value;
++ PRINTF ("%s:%d: INIT check... ", __FUNCTION__, __LINE__);
++ value = GPIO_READ(CFG_FPGA_INIT);
++ //printf("init value read %x",value);
++#ifdef CONFIG_SYS_FPGA_IS_PROTO
++ return value;
++#else
++ return !value;
++#endif
++}
++
++/*
++ * Test the state of the active-high FPGA DONE pin
++ */
++int
++fpga_done_fn (int cookie)
++{
++ PRINTF ("%s:%d: DONE check... %s", __FUNCTION__, __LINE__,
++ GPIO_READ(CFG_FPGA_DONE)?"high":"low");
++ return(GPIO_READ(CFG_FPGA_DONE)?FPGA_SUCCESS:FPGA_FAIL);
++}
++
++/*
++ * Set the FPGA's wr line to the specified level
++ */
++int
++fpga_wr_fn (int assert_write, int flush, int cookie)
++{
++ PRINTF ("%s:%d: FPGA RW... %s ", __FUNCTION__, __LINE__,
++ assert_write?"high":"low");
++ GPIO_WRITE( CFG_FPGA_RW, !assert_write);
++ return assert_write;
++}
++
++int
++fpga_cs_fn (int assert_cs, int flush, int cookie)
++{
++ PRINTF ("%s:%d: FPGA CS %s ", __FUNCTION__, __LINE__,
++ assert_cs?"high":"low");
++ GPIO_WRITE( CFG_FPGA_CS, !assert_cs);
++ return assert_cs;
++}
++
++int
++fpga_rdata_fn ( unsigned char *data, int cookie )
++{
++ PRINTF ("%s:%d: FPGA READ DATA %02X ", __FUNCTION__, __LINE__,
++ *((char*)CFG_FPGA_RDATA));
++ *data = (unsigned char)((*((unsigned short*)CFG_FPGA_RDATA))&0x00FF);
++ return *data;
++}
++
++int
++fpga_wdata_fn ( unsigned char data, int cookie )
++{
++ PRINTF ("%s:%d: FPGA WRITE DATA %02X ", __FUNCTION__, __LINE__,
++ data);
++ *((unsigned short*)CFG_FPGA_WDATA) = data;
++ return data;
++}
++
++int
++fpga_abort_fn ( int cookie )
++{
++ return cookie;
++}
++
++
++int
++fpga_busy_fn ( int cookie )
++{
++ return 1;
++}
++
++int
++fpga_post_fn (int cookie)
++{
++ PRINTF ("%s:%d: FPGA POST ", __FUNCTION__, __LINE__);
++
++ imx_gpio_mode (CFG_FPGA_RW | GPIO_PF | GPIO_PUEN);
++ imx_gpio_mode (CFG_FPGA_CS | GPIO_PF | GPIO_PUEN);
++ imx_gpio_mode (CFG_FPGA_CLK | GPIO_PF | GPIO_PUEN);
++ GPIO_SET(CFG_FPGA_PRG);
++ GPIO_CLEAR(CFG_FPGA_RESET);
++ imx_gpio_mode (CFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
++ return cookie;
++}
++
++/*
++ * Initialize the fpga. Return 1 on success, 0 on failure.
++ */
++int
++APF27_init_fpga (u_char * buffer, size_t size)
++{
++ char *autoload = getenv ("firmware_autoload");
++ DECLARE_GLOBAL_DATA_PTR;
++
++ int i,lout=0;
++
++ PRINTF ("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n",
++ __FUNCTION__, __LINE__, gd->reloc_off);
++ fpga_init (gd->reloc_off);
++
++ for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
++ PRINTF ("%s:%d: Adding fpga %d\n", __FUNCTION__, __LINE__, i);
++ fpga_add (fpga_xilinx, &fpga[i]);
++ }
++
++ if ((size >= fpga[0].size) && ( autoload ) && (0 == strcmp(autoload, "1"))) {
++ if (FPGA_SUCCESS != fpga_load( 0, (void *)buffer, size )) {
++ lout = 1;
++ printf("Firmware download failed!\n");
++ }
++ else
++ printf("Firmware successfully programmed\n");
++ }
++ return lout;
++}
++
++#endif /* CONFIG_FPGA */
+Index: u-boot-1.3.4/board/armadeus/apf27/fpga.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-1.3.4/board/armadeus/apf27/fpga.h 2011-01-05 14:24:05.000000000 +0100
@@ -0,0 +1,39 @@
+/*
+ * (C) Copyright 2002-2008
@@ -501,8 +509,10 @@
+extern int fpga_abort_fn (int cookie);
+extern int fpga_post_fn (int cookie);
+extern int fpga_busy_fn (int cookie);
---- ref/u-boot-1.3.4/board/armadeus/apf27/lowlevel_init.S 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf27/lowlevel_init.S 2008-12-29 16:27:49.000000000 +0100
+Index: u-boot-1.3.4/board/armadeus/apf27/lowlevel_init.S
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-1.3.4/board/armadeus/apf27/lowlevel_init.S 2011-01-05 14:50:39.000000000 +0100
@@ -0,0 +1,343 @@
+/*
+ * For clock initialization, see chapter 3 of the "MCIMX27 Multimedia
@@ -641,7 +651,7 @@
+ writel(AIPI2_PSR0, CFG_AIPI2_PSR0_VAL)
+ writel(AIPI2_PSR1, CFG_AIPI2_PSR1_VAL)
+
-+ /* Change SDRAM signal strengh */
++ /* Change SDRAM signal strengh */
+ ldr r0, =GPCR
+ ldr r1, =CFG_GPCR_VAL
+ ldr r5, [r0]
@@ -653,7 +663,7 @@
+.macro init_clock
+ ldr r0, =CSCR
+ /* disable MPLL/SPLL first */
-+ ldr r1, [r0]
++ ldr r1, [r0]
+ bic r1, r1, #(CSCR_MPEN|CSCR_SPEN)
+ str r1, [r0]
+
@@ -665,7 +675,7 @@
+
+ writel(CSCR, CFG_CSCR_VAL | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART)
+
-+ /*
++ /*
+ * add some delay here
+ */
+ mov r1, #0x1000
@@ -677,9 +687,9 @@
+ writel(PCDR1, CFG_PCDR1_VAL)
+
+ /* Configure PCCR0 and PCCR1 */
-+ writel(PCCR0, CFG_PCCR0_VAL)
++ writel(PCCR0, CFG_PCCR0_VAL)
+ writel(PCCR1, CFG_PCCR1_VAL)
-+
++
+
+.endm /* init_clock */
+
@@ -731,7 +741,7 @@
+ str r1, [r0]
+
+ /* set standard mode register */
-+ ldr r4, = CFG_SDRAM_1_BASE+CFG_SDRAM_MODE_REGISTER_VAL
++ ldr r4, = CFG_SDRAM_1_BASE+CFG_SDRAM_MODE_REGISTER_VAL
+ ldrb r2, [r4]
+
+ /* set extended mode register */
@@ -847,8 +857,10 @@
+
+ mov pc,r10
+
---- ref/u-boot-1.3.4/board/armadeus/apf27/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf27/Makefile 2008-12-29 16:27:49.000000000 +0100
+Index: u-boot-1.3.4/board/armadeus/apf27/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-1.3.4/board/armadeus/apf27/Makefile 2011-01-05 14:24:05.000000000 +0100
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2000-2004
@@ -900,8 +912,10 @@
+sinclude $(obj).depend
+
+#########################################################################
---- ref/u-boot-1.3.4/board/armadeus/apf27/u-boot-nand.lds 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf27/u-boot-nand.lds 2008-12-29 16:27:49.000000000 +0100
+Index: u-boot-1.3.4/board/armadeus/apf27/u-boot-nand.lds
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-1.3.4/board/armadeus/apf27/u-boot-nand.lds 2011-01-05 14:49:59.000000000 +0100
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2007
@@ -959,9 +973,11 @@
+ _end = .;
+}
+
---- ref/u-boot-1.3.4/include/asm-arm/mach-types.h 2008-08-12 16:08:38.000000000 +0200
-+++ u-boot-1.3.4/include/asm-arm/mach-types.h 2008-12-29 16:27:49.000000000 +0100
-@@ -1596,6 +1596,7 @@ extern unsigned int __machine_arch_type;
+Index: u-boot-1.3.4/include/asm-arm/mach-types.h
+===================================================================
+--- u-boot-1.3.4.orig/include/asm-arm/mach-types.h 2008-08-12 16:08:38.000000000 +0200
++++ u-boot-1.3.4/include/asm-arm/mach-types.h 2011-01-05 14:24:05.000000000 +0100
+@@ -1596,6 +1596,7 @@
#define MACH_TYPE_XDACOMET 1603
#define MACH_TYPE_DEXFLEX2 1604
#define MACH_TYPE_SFFSDR 1657
@@ -969,7 +985,7 @@
#ifdef CONFIG_ARCH_EBSA110
# ifdef machine_arch_type
-@@ -12373,6 +12374,18 @@ extern unsigned int __machine_arch_type;
+@@ -12373,6 +12374,18 @@
# define machine_is_nxdb500() (0)
#endif
@@ -988,9 +1004,11 @@
#ifdef CONFIG_MACH_APF9328
# ifdef machine_arch_type
# undef machine_arch_type
---- ref/u-boot-1.3.4/MAKEALL 2009-01-07 18:21:24.000000000 +0100
-+++ u-boot-1.3.4/MAKEALL 2008-12-29 16:27:49.000000000 +0100
-@@ -468,6 +468,7 @@ LIST_ARM9=" \
+Index: u-boot-1.3.4/MAKEALL
+===================================================================
+--- u-boot-1.3.4.orig/MAKEALL 2011-01-05 14:24:05.000000000 +0100
++++ u-boot-1.3.4/MAKEALL 2011-01-05 14:24:05.000000000 +0100
+@@ -468,6 +468,7 @@
ap926ejs \
ap946es \
ap966 \
@@ -998,9 +1016,11 @@
cp920t \
cp922_XA10 \
cp926ejs \
---- ref/u-boot-1.3.4/Makefile 2009-01-07 18:21:24.000000000 +0100
-+++ u-boot-1.3.4/Makefile 2008-12-29 16:27:49.000000000 +0100
-@@ -2390,6 +2390,9 @@ mp2usb_config : unconfig
+Index: u-boot-1.3.4/Makefile
+===================================================================
+--- u-boot-1.3.4.orig/Makefile 2011-01-05 14:24:05.000000000 +0100
++++ u-boot-1.3.4/Makefile 2011-01-05 14:49:59.000000000 +0100
+@@ -2390,6 +2390,9 @@
## Atmel ARM926EJ-S Systems
#########################################################################
@@ -1010,8 +1030,10 @@
at91cap9adk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk atmel at91sam9
---- ref/u-boot-1.3.4/nand_spl/board/armadeus/apf27/config.mk 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/nand_spl/board/armadeus/apf27/config.mk 2008-12-29 16:27:49.000000000 +0100
+Index: u-boot-1.3.4/nand_spl/board/armadeus/apf27/config.mk
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-1.3.4/nand_spl/board/armadeus/apf27/config.mk 2011-01-05 14:24:05.000000000 +0100
@@ -0,0 +1,43 @@
+#
+# (C) Copyright 2007
@@ -1056,8 +1078,10 @@
+# PAD_TO used to generate a 2kByte binary needed for the combined image
+# -> PAD_TO = TEXT_BASE + 0x0800
+PAD_TO = 0xa0000800
---- ref/u-boot-1.3.4/nand_spl/board/armadeus/apf27/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/nand_spl/board/armadeus/apf27/Makefile 2008-12-29 16:27:49.000000000 +0100
+Index: u-boot-1.3.4/nand_spl/board/armadeus/apf27/Makefile
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-1.3.4/nand_spl/board/armadeus/apf27/Makefile 2011-01-05 14:24:05.000000000 +0100
@@ -0,0 +1,77 @@
+#
+# (C) Copyright 2007
@@ -1136,15 +1160,17 @@
+sinclude $(obj).depend
+
+#########################################################################
---- ref/u-boot-1.3.4/nand_spl/board/armadeus/apf27/start.S 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/nand_spl/board/armadeus/apf27/start.S 2008-12-29 16:27:49.000000000 +0100
+Index: u-boot-1.3.4/nand_spl/board/armadeus/apf27/start.S
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-1.3.4/nand_spl/board/armadeus/apf27/start.S 2011-01-05 14:53:03.000000000 +0100
@@ -0,0 +1,545 @@
+/*
-+ * IMX27 NAND Flash SPL (Secondary Program Loader)
++ * IMX27 NAND Flash SPL (Secondary Program Loader)
+ *
+ * Copyright (c) 2008 Armadeus Project / eja
+ *
-+ * Based on Freescale NAND SPL
++ * Based on Freescale NAND SPL
+ *
+ * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+ * Copyright (c) 2008 Eric Jarrige <eri...@ar...>
@@ -1234,8 +1260,8 @@
+ /* Copy SPL image from flash to SDRAM first */
+ BOOT_TRACE(1)
+ ldr r0, =IMX_NFC_MAIN_AREA0
-+ add r2, r0, #(IMX_NFC_SPARE_AREA0-IMX_NFC_MAIN_AREA0) //2KB NFC Buff
-+ ldr r1, =CFG_NAND_U_BOOT_DST
++ add r2, r0, #(IMX_NFC_SPARE_AREA0-IMX_NFC_MAIN_AREA0) //2KB NFC Buff
++ ldr r1, =CFG_NAND_U_BOOT_DST
+
+ BOOT_TRACE(2)
+1: ldmia r0!, {r3-r10}
@@ -1309,7 +1335,7 @@
+
+ mov r3, r1, lsr #11
+ bl do_addr_input /* 3rd addr cycle */
-+
++
+ mov r3, r1, lsr #19
+ bl do_addr_input /* 4th addr cycle */
+
@@ -1345,8 +1371,8 @@
+ bl do_wait_op_done
+
+ bl Test_And_Copy_Buffer
-+
-+ /* here we should test if 512B page flash and bypass next buffers */
++
++ /* here we should test if 512B page flash and bypass next buffers */
+ /* read and copy buf 2. TODO small page support */
+ mov r3, #2
+ strh r3, [r12, #NFC_OFFSET_BUF_ADDR]
@@ -1374,7 +1400,7 @@
+
+ /* r0: nfc base. Reloaded after each page copying */
+ ldr r0, =IMX_NFC_MAIN_AREA0
-+ /* r2: end of 1st RAM buf. Doesn't change */
++ /* r2: end of 1st RAM buf. Doesn't change */
+ ldr r2, =IMX_NFC_MAIN_AREA1
+ b Nfc_Read_Page
+
@@ -1391,7 +1417,7 @@
+ writel(AIPI2_PSR0, CFG_AIPI2_PSR0_VAL)
+ writel(AIPI2_PSR1, CFG_AIPI2_PSR1_VAL)
+
-+ /* Change SDRAM signal strengh */
++ /* Change SDRAM signal strengh */
+ ldr r0, =GPCR
+ ldr r1, =CFG_GPCR_VAL
+ ldr r5, [r0]
@@ -1403,7 +1429,7 @@
+ .macro init_clock
+ ldr r0, =CSCR
+ /* disable MPLL/SPLL first */
-+ ldr r1, [r0]
++ ldr r1, [r0]
+ bic r1, r1, #(CSCR_MPEN|CSCR_SPEN)
+ str r1, [r0]
+
@@ -1415,7 +1441,7 @@
+
+ writel(CSCR, CFG_CSCR_VAL | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART)
+
-+ /*
++ /*
+ * add some delay here
+ */
+ mov r1, #0x1000
@@ -1427,7 +1453,7 @@
+ writel(PCDR1, CFG_PCDR1_VAL)
+
+ /* Configure PCCR0 and PCCR1 */
-+ writel(PCCR0, CFG_PCCR0_VAL)
++ writel(PCCR0, CFG_PCCR0_VAL)
+ writel(PCCR1, CFG_PCCR1_VAL)
+
+ .endm /* init_clock */
@@ -1545,13 +1571,13 @@
+ ands r4, r4, #(NFC_ECC_STAT_ERROR2|(NFC_ECC_STAT_ERROR2<<NFC_ECC_STAT_ERM_SHFT))
+ bne Skip_Bad_Buffer
+
-+ /* check BI byte of the current spare buffer */
++ /* check BI byte of the current spare buffer */
+ ldr r4, =IMX_NFC_SPARE_AREA0
+ ldrh r3, [r12, #NFC_OFFSET_BUF_ADDR] /* for the current buffer */
+ orr r4, r3, lsl #0x04
+
+ /* at bi word offset 4. Fixme position change betwwen 8 and 16 bits bus */
-+ ldrh r4, [r4, #0x04]
++ ldrh r4, [r4, #0x04]
+ and r4, r4, #0x0FF00 /* has to be 0xFFxx */
+ cmp r4, #0x0FF00
+ bne Skip_Bad_Buffer
@@ -1630,7 +1656,7 @@
+ str r1, [r0]
+
+ /* set standard mode register */
-+ ldr r4, = CFG_SDRAM_1_BASE+CFG_SDRAM_MODE_REGISTER_VAL
++ ldr r4, = CFG_SDRAM_1_BASE+CFG_SDRAM_MODE_REGISTER_VAL
+ ldrb r2, [r4]
+
+ /* set extended mode register */
@@ -1684,8 +1710,10 @@
+
+ mov pc, lr
+
---- ref/u-boot-1.3.4/nand_spl/board/armadeus/apf27/u-boot.lds 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/nand_spl/board/armadeus/apf27/u-boot.lds 2008-12-29 16:27:49.000000000 +0100
+Index: u-boot-1.3.4/nand_spl/board/armadeus/apf27/u-boot.lds
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ u-boot-1.3.4/nand_spl/board/armadeus/apf27/u-boot.lds 2011-01-05 14:24:05.000000000 +0100
@@ -0,0 +1,37 @@
+/*
+ * (C) Copyright 2007
hooks/post-receive
--
armadeus
|
