[Armadeus-commitlog] armadeus branch, master, updated. release-3.3-198-g243e4da
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[Armadeus-commitlog] armadeus branch, master, updated. release-3.3-198-g243e4da
|
From: Julien B a. A. <ar...@us...> - 2010-12-30 09:53:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 243e4dad6ab78b9d390d4b4ebfac760c37888e23 (commit)
via 074862f44547e6e0eaa7251d23bc61d71d89cdd3 (commit)
via e225ad86ef674f277a1cec4d3ff4f3934cf76d75 (commit)
via 98ec4c66b5514b98c69b32fdf4323a8fb7c67255 (commit)
via b59129465c3a96abbc7d0789ea3c78e78af3445a (commit)
via f60052d3101398a5ed0938dda62218463ec66d9f (commit)
from 3ae0fa607fc883713ec34f0bd65dd0e61c18a13d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 243e4dad6ab78b9d390d4b4ebfac760c37888e23
Merge: 074862f44547e6e0eaa7251d23bc61d71d89cdd3 3ae0fa607fc883713ec34f0bd65dd0e61c18a13d
Author: Julien Boibessot <jul...@ar...>
Date: Thu Dec 30 10:53:21 2010 +0100
Merge branch 'master' of ssh://artemys@armadeus.git.sourceforge.net/gitroot/armadeus/armadeus
commit 074862f44547e6e0eaa7251d23bc61d71d89cdd3
Author: Julien Boibessot <jul...@ar...>
Date: Thu Dec 30 10:35:09 2010 +0100
Fixes patches/buildroot/2010.11/cleanup_buildroot.sh
commit e225ad86ef674f277a1cec4d3ff4f3934cf76d75
Merge: 98ec4c66b5514b98c69b32fdf4323a8fb7c67255 d0a58cec1516ad347ee9200292cb0bd40e9dd83d
Author: Julien Boibessot <jul...@ar...>
Date: Thu Dec 30 09:54:27 2010 +0100
Merge branch 'master' of ssh://artemys@armadeus.git.sourceforge.net/gitroot/armadeus/armadeus
commit 98ec4c66b5514b98c69b32fdf4323a8fb7c67255
Author: Julien Boibessot <jul...@ar...>
Date: Thu Dec 30 09:36:20 2010 +0100
[LINUX] 2.6.38: Add (preliminary) APF51 support.
commit b59129465c3a96abbc7d0789ea3c78e78af3445a
Author: Julien Boibessot <jul...@ar...>
Date: Wed Dec 29 11:04:21 2010 +0100
[U-BOOT] apf51: use mxc_nand instead of mxc_nand.0 as boot params
commit f60052d3101398a5ed0938dda62218463ec66d9f
Author: Julien Boibessot <jul...@ar...>
Date: Tue Dec 28 11:56:13 2010 +0100
[TEST] imxregs: i.MX51, adds I2C registers (not working (16 bits accesses))
-----------------------------------------------------------------------
Summary of changes:
buildroot/configs/apf51_defconfig | 19 +-
.../armadeus/apf51/apf51-linux-2.6.38-alpha.config | 1 +
...nux-2.6.36.config => apf51-linux-2.6.38.config} | 122 +-
.../device/armadeus/apf51/apf51-u-boot-2010.03.h | 2 +-
.../armadeus/linux/kernel-patches/2.6.38-alpha | 1 +
...pengutronix-1-iMX51-add_ipu_clock_support.patch | 187 +
...12-10-pengutronix-2-iMX51-rename_IPU_irqs.patch | 24 +
...2-10-pengutronix-3-Add_a_mfd_IPUv3_driver.patch | 3576 ++++++++++++++++++++
...-pengutronix-4-fb-export_fb_mode_fb_table.patch | 51 +
...pengutronix-5-Add_iMX5_framebuffer_driver.patch | 905 +++++
...engutronix-6-iMX51-Add_IPU_device_support.patch | 113 +
...-7-iMX51-Allow_to_increase_max_zone_order.patch | 28 +
...rease_dma_consistent_size_for_IPU_support.patch | 21 +
...x-9-iMX51-babbage_add_framebuffer_support.patch | 132 +
.../400-armadeus-add_apf51_module.patch | 234 ++-
.../2.6.38/401-armadeus-fix_clock_tree.patch | 68 +
.../402-armadeus-add_nand_device.to_check} | 29 -
.../2.6.38/403-armadeus-set-uart2-debug.patch | 17 +
.../404-armadeus-fix_nand_ecc_oob.patch | 36 +-
...deus-iomux-mx51-add_USBH2_pins_definition.patch | 14 +-
...ct_some_mx5_regiter_settings_and_comments.patch | 8 +-
...-mx5-devices-add_USBH2_to_list_of_devices.patch | 49 +-
.../408-armadeus-add_apf51-dev_baseboard.patch | 187 +
...adeus-iomux-mx51-add_I2C2_pins_definition.patch | 22 +
patches/buildroot/2010.11/cleanup_buildroot.sh | 1 +
target/linux/debug/imxregs/imx51regs.h | 14 +
26 files changed, 5697 insertions(+), 164 deletions(-)
create mode 120000 buildroot/target/device/armadeus/apf51/apf51-linux-2.6.38-alpha.config
copy buildroot/target/device/armadeus/apf51/{apf51-linux-2.6.36.config => apf51-linux-2.6.38.config} (94%)
create mode 120000 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38-alpha
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-1-iMX51-add_ipu_clock_support.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-2-iMX51-rename_IPU_irqs.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-3-Add_a_mfd_IPUv3_driver.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-4-fb-export_fb_mode_fb_table.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-5-Add_iMX5_framebuffer_driver.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-6-iMX51-Add_IPU_device_support.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-7-iMX51-Allow_to_increase_max_zone_order.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-8-iMX51-increase_dma_consistent_size_for_IPU_support.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-9-iMX51-babbage_add_framebuffer_support.patch
copy buildroot/target/device/armadeus/linux/kernel-patches/{2.6.36 => 2.6.38}/400-armadeus-add_apf51_module.patch (61%)
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/401-armadeus-fix_clock_tree.patch
copy buildroot/target/device/armadeus/linux/kernel-patches/{2.6.36/402-armadeus-add_nand_device.patch => 2.6.38/402-armadeus-add_nand_device.to_check} (86%)
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/403-armadeus-set-uart2-debug.patch
copy buildroot/target/device/armadeus/linux/kernel-patches/{2.6.36 => 2.6.38}/404-armadeus-fix_nand_ecc_oob.patch (71%)
copy buildroot/target/device/armadeus/linux/kernel-patches/{2.6.36 => 2.6.38}/405-armadeus-iomux-mx51-add_USBH2_pins_definition.patch (90%)
copy buildroot/target/device/armadeus/linux/kernel-patches/{2.6.36 => 2.6.38}/406-armadeus-plat-mxc-ehci-correct_some_mx5_regiter_settings_and_comments.patch (83%)
copy buildroot/target/device/armadeus/linux/kernel-patches/{2.6.36 => 2.6.38}/407-armadeus-mx5-devices-add_USBH2_to_list_of_devices.patch (71%)
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/408-armadeus-add_apf51-dev_baseboard.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/409-armadeus-iomux-mx51-add_I2C2_pins_definition.patch
diff --git a/buildroot/configs/apf51_defconfig b/buildroot/configs/apf51_defconfig
index 1d86404..13f9a17 100644
--- a/buildroot/configs/apf51_defconfig
+++ b/buildroot/configs/apf51_defconfig
@@ -1,6 +1,6 @@
#
# Automatically generated make config: don't edit
-# Mon Nov 1 17:03:11 2010
+# Tue Dec 28 18:08:43 2010
#
BR2_HAVE_DOT_CONFIG=y
BR2_VERSION="2010.11-git"
@@ -133,9 +133,9 @@ BR2_TOOLCHAIN_BUILDROOT=y
#
# Kernel Header Options
#
-# BR2_KERNEL_HEADERS_2_6_33 is not set
# BR2_KERNEL_HEADERS_2_6_34 is not set
# BR2_KERNEL_HEADERS_2_6_35 is not set
+# BR2_KERNEL_HEADERS_2_6_36 is not set
BR2_KERNEL_HEADERS_VERSION=y
# BR2_KERNEL_HEADERS_SNAP is not set
BR2_DEFAULT_KERNEL_VERSION="2.6.29.6"
@@ -166,10 +166,12 @@ BR2_EXTRA_BINUTILS_CONFIG_OPTIONS=""
# BR2_GCC_VERSION_4_2_4 is not set
# BR2_GCC_VERSION_4_3_X is not set
BR2_GCC_VERSION_4_4_X=y
+# BR2_GCC_VERSION_4_5_X is not set
# BR2_GCC_VERSION_SNAP is not set
BR2_GCC_SUPPORTS_FINEGRAINEDMTUNE=y
BR2_GCC_VERSION="4.4.5"
BR2_EXTRA_GCC_CONFIG_OPTIONS=""
+# BR2_GCC_CROSS_OBJC is not set
# BR2_GCC_CROSS_FORTRAN is not set
# BR2_INSTALL_OBJC is not set
# BR2_INSTALL_FORTRAN is not set
@@ -244,6 +246,7 @@ BR2_PACKAGE_FPGAREGS=y
BR2_PACKAGE_IMXREGS=y
# BR2_PACKAGE_IMXSSI is not set
BR2_PACKAGE_MAX5821CTRL=y
+# BR2_PACKAGE_ARMADEUS_PPS_TEST_SCRIPTS is not set
# BR2_PACKAGE_ARMADEUS_TESTSUITE is not set
#
@@ -350,6 +353,7 @@ BR2_PACKAGE_STRACE=y
# BR2_PACKAGE_LIBGMP is not set
# BR2_PACKAGE_GPERF is not set
# BR2_PACKAGE_MAKE is not set
+# BR2_PACKAGE_LIBMPC is not set
# BR2_PACKAGE_LIBMPFR is not set
# BR2_PACKAGE_LIBTOOL is not set
# BR2_PACKAGE_M4 is not set
@@ -451,6 +455,7 @@ BR2_PACKAGE_STRACE=y
BR2_PACKAGE_I2C_TOOLS=y
# BR2_PACKAGE_INPUT_TOOLS is not set
# BR2_PACKAGE_IOSTAT is not set
+# BR2_PACKAGE_KBD is not set
# BR2_PACKAGE_LCD4LINUX is not set
# BR2_PACKAGE_LM_SENSORS is not set
# BR2_PACKAGE_LVM2 is not set
@@ -502,6 +507,7 @@ BR2_PACKAGE_MTD_UBIUPDATEVOL=y
# BR2_PACKAGE_NTFS_3G is not set
# BR2_PACKAGE_NTFSPROGS is not set
# BR2_PACKAGE_PCIUTILS is not set
+# BR2_PACKAGE_RNG_TOOLS is not set
# BR2_PACKAGE_SETSERIAL is not set
# BR2_PACKAGE_SMARTMONTOOLS is not set
# BR2_PACKAGE_SQUASHFS is not set
@@ -612,6 +618,7 @@ BR2_PACKAGE_TSLIB=y
#
# Other
#
+# BR2_PACKAGE_ARGP_STANDALONE is not set
# BR2_PACKAGE_LIBATOMIC_OPS is not set
# BR2_PACKAGE_LIBCAP is not set
# BR2_PACKAGE_LIBDAEMON is not set
@@ -696,6 +703,7 @@ BR2_PACKAGE_NTP=y
# BR2_PACKAGE_NTP_NTPDC is not set
# BR2_PACKAGE_NTP_NTPQ is not set
# BR2_PACKAGE_NTP_TICKADJ is not set
+# BR2_PACKAGE_NUTTCP is not set
# BR2_PACKAGE_OLSR is not set
# BR2_PACKAGE_OPENNTPD is not set
# BR2_PACKAGE_OPENOBEX is not set
@@ -727,6 +735,7 @@ BR2_PACKAGE_PORTMAP=y
# BR2_PACKAGE_VTUN is not set
# BR2_PACKAGE_WEBIF is not set
BR2_PACKAGE_WIRELESS_TOOLS=y
+# BR2_PACKAGE_WIRELESS_TOOLS_LIB is not set
# BR2_PACKAGE_WPA_SUPPLICANT is not set
#
@@ -835,12 +844,12 @@ BR2_TARGET_UBOOT_COPYTO=""
# Kernel
#
BR2_LINUX_KERNEL=y
-# BR2_LINUX_KERNEL_2_6_35 is not set
+# BR2_LINUX_KERNEL_2_6_36 is not set
# BR2_LINUX_KERNEL_SAME_AS_HEADERS is not set
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
# BR2_LINUX_KERNEL_CUSTOM_TARBALL is not set
-BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="2.6.36"
-BR2_LINUX_KERNEL_VERSION="2.6.36"
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="2.6.38-alpha"
+BR2_LINUX_KERNEL_VERSION="2.6.38-alpha"
BR2_LINUX_KERNEL_PATCH="$(LINUX26_PATCH_DIR)"
# BR2_LINUX_KERNEL_USE_DEFCONFIG is not set
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
diff --git a/buildroot/target/device/armadeus/apf51/apf51-linux-2.6.38-alpha.config b/buildroot/target/device/armadeus/apf51/apf51-linux-2.6.38-alpha.config
new file mode 120000
index 0000000..7ff682f
--- /dev/null
+++ b/buildroot/target/device/armadeus/apf51/apf51-linux-2.6.38-alpha.config
@@ -0,0 +1 @@
+apf51-linux-2.6.38.config
\ No newline at end of file
diff --git a/buildroot/target/device/armadeus/apf51/apf51-linux-2.6.36.config b/buildroot/target/device/armadeus/apf51/apf51-linux-2.6.38.config
similarity index 94%
copy from buildroot/target/device/armadeus/apf51/apf51-linux-2.6.36.config
copy to buildroot/target/device/armadeus/apf51/apf51-linux-2.6.38.config
index 3c76717..e472ecc 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-linux-2.6.36.config
+++ b/buildroot/target/device/armadeus/apf51/apf51-linux-2.6.38.config
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.36
-# Wed Dec 1 17:27:05 2010
+# Linux/arm 2.6.37-rc4 Kernel Configuration
+# Wed Dec 29 09:45:32 2010
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -17,6 +17,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_NEED_DMA_MAP_STATE=y
@@ -25,6 +26,8 @@ CONFIG_ARM_L1_CACHE_SHIFT_6=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y
+CONFIG_HAVE_IRQ_WORK=y
+CONFIG_IRQ_WORK=y
#
# General setup
@@ -50,13 +53,16 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_AUDIT is not set
+# CONFIG_HAVE_GENERIC_HARDIRQS is not set
+# CONFIG_SPARSE_IRQ is not set
#
# RCU Subsystem
#
-CONFIG_TREE_RCU=y
-# CONFIG_TREE_PREEMPT_RCU is not set
+CONFIG_TREE_PREEMPT_RCU=y
# CONFIG_TINY_RCU is not set
+# CONFIG_TINY_PREEMPT_RCU is not set
+CONFIG_PREEMPT_RCU=y
# CONFIG_RCU_TRACE is not set
CONFIG_RCU_FANOUT=32
# CONFIG_RCU_FANOUT_EXACT is not set
@@ -64,9 +70,9 @@ CONFIG_RCU_FANOUT=32
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
-# CONFIG_SYSFS_DEPRECATED_V2 is not set
-# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
@@ -109,6 +115,7 @@ CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_CLK=y
+CONFIG_HAVE_HW_BREAKPOINT=y
#
# GCOV-based kernel profiling
@@ -216,12 +223,13 @@ CONFIG_ARCH_MXC=y
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_S3C64XX is not set
-# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5P64X0 is not set
# CONFIG_ARCH_S5P6442 is not set
# CONFIG_ARCH_S5PC100 is not set
# CONFIG_ARCH_S5PV210 is not set
# CONFIG_ARCH_S5PV310 is not set
# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_TCC_926 is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_U300 is not set
# CONFIG_ARCH_U8500 is not set
@@ -229,6 +237,14 @@ CONFIG_ARCH_MXC=y
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_PLAT_SPEAR is not set
+CONFIG_IMX_HAVE_PLATFORM_FEC=y
+CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_I2C=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y
+CONFIG_IMX_HAVE_PLATFORM_MXC_NAND=y
+CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX=y
+CONFIG_IMX_HAVE_PLATFORM_SPI_IMX=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3=y
#
# Freescale MXC Implementations
@@ -240,6 +256,7 @@ CONFIG_ARCH_MXC=y
# CONFIG_ARCH_MXC91231 is not set
CONFIG_ARCH_MX5=y
CONFIG_ARCH_MX51=y
+CONFIG_SOC_IMX51=y
#
# MX5 platforms:
@@ -247,6 +264,8 @@ CONFIG_ARCH_MX51=y
# CONFIG_MACH_MX51_BABBAGE is not set
# CONFIG_MACH_MX51_3DS is not set
# CONFIG_MACH_EUKREA_CPUIMX51 is not set
+# CONFIG_MACH_EUKREA_CPUIMX51SD is not set
+# CONFIG_MACH_MX51_EFIKAMX is not set
CONFIG_MACH_APF51=y
CONFIG_MACH_APF51_HAS_BASEBOARD=y
CONFIG_MACH_APF51_DEV=y
@@ -256,6 +275,7 @@ CONFIG_MXC_TZIC=y
# CONFIG_MXC_DEBUG_BOARD is not set
CONFIG_MXC_ULPI=y
CONFIG_ARCH_MXC_IOMUX_V3=y
+CONFIG_ARCH_MXC_AUDMUX_V2=y
#
# Processor Type
@@ -332,9 +352,11 @@ CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_NEED_PER_CPU_KM=y
CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_UACCESS_WITH_MEMCPY is not set
+# CONFIG_SECCOMP is not set
# CONFIG_CC_STACKPROTECTOR is not set
# CONFIG_DEPRECATED_PARAM_STRUCT is not set
@@ -351,6 +373,7 @@ CONFIG_CMDLINE=""
#
# CPU Power Management
#
+# CONFIG_CPU_FREQ is not set
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
@@ -416,7 +439,7 @@ CONFIG_IP_PNP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
@@ -546,6 +569,7 @@ CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
#
# Device Drivers
@@ -675,13 +699,18 @@ CONFIG_BLK_DEV=y
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_MG_DISK is not set
+# CONFIG_BLK_DEV_RBD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_AD525X_DPOT is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_APDS9802ALS is not set
# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
# CONFIG_HMC6352 is not set
# CONFIG_DS1682 is not set
# CONFIG_TI_DAC7512 is not set
@@ -697,6 +726,10 @@ CONFIG_EEPROM_AT25=y
# CONFIG_EEPROM_MAX6875 is not set
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_IWMC3200TOP is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
@@ -733,6 +766,7 @@ CONFIG_SCSI_WAIT_SCAN=m
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
@@ -752,6 +786,7 @@ CONFIG_NETDEVICES=y
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_VETH is not set
+CONFIG_MII=y
CONFIG_PHYLIB=y
#
@@ -765,6 +800,7 @@ CONFIG_PHYLIB=y
# CONFIG_VITESSE_PHY is not set
CONFIG_SMSC_PHY=y
# CONFIG_BROADCOM_PHY is not set
+# CONFIG_BCM63XX_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_NATIONAL_PHY is not set
@@ -774,7 +810,6 @@ CONFIG_SMSC_PHY=y
# CONFIG_FIXED_PHY is not set
# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
# CONFIG_AX88796 is not set
# CONFIG_SMC91X is not set
# CONFIG_DM9000 is not set
@@ -825,6 +860,7 @@ CONFIG_RT2X00_LIB=m
CONFIG_RT2X00_LIB_FIRMWARE=y
CONFIG_RT2X00_LIB_CRYPTO=y
# CONFIG_RT2X00_DEBUG is not set
+# CONFIG_WL1251 is not set
# CONFIG_WL12XX is not set
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
@@ -914,6 +950,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_TOUCHSCREEN_ADS7846 is not set
# CONFIG_TOUCHSCREEN_AD7877 is not set
# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
# CONFIG_TOUCHSCREEN_DYNAPRO is not set
# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
@@ -930,6 +967,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_TOUCHSCREEN_QT602240 is not set
# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+CONFIG_TOUCHSCREEN_WM831X=m
# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
# CONFIG_TOUCHSCREEN_TSC2007 is not set
@@ -957,6 +995,7 @@ CONFIG_SERIO_SERPORT=y
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
# CONFIG_GAMEPORT is not set
#
@@ -991,6 +1030,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
# CONFIG_LEGACY_PTYS is not set
+# CONFIG_TTY_PRINTK is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_R3964 is not set
@@ -1013,7 +1053,7 @@ CONFIG_I2C_HELPER_AUTO=y
#
# CONFIG_I2C_DESIGNWARE is not set
# CONFIG_I2C_GPIO is not set
-# CONFIG_I2C_IMX is not set
+CONFIG_I2C_IMX=y
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_SIMTEC is not set
@@ -1034,7 +1074,6 @@ CONFIG_I2C_HELPER_AUTO=y
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
CONFIG_SPI=y
-# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
#
@@ -1042,6 +1081,8 @@ CONFIG_SPI_MASTER=y
#
CONFIG_SPI_BITBANG=y
# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_IMX_VER_0_7=y
+CONFIG_SPI_IMX_VER_2_3=y
CONFIG_SPI_IMX=y
# CONFIG_SPI_XILINX is not set
# CONFIG_SPI_DESIGNWARE is not set
@@ -1049,7 +1090,7 @@ CONFIG_SPI_IMX=y
#
# SPI Protocol Masters
#
-# CONFIG_SPI_SPIDEV is not set
+CONFIG_SPI_SPIDEV=m
# CONFIG_SPI_TLE62X0 is not set
#
@@ -1058,13 +1099,14 @@ CONFIG_SPI_IMX=y
# CONFIG_PPS is not set
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_GPIOLIB=y
-# CONFIG_DEBUG_GPIO is not set
# CONFIG_GPIO_SYSFS is not set
#
# Memory mapped GPIO expanders:
#
+# CONFIG_GPIO_BASIC_MMIO is not set
# CONFIG_GPIO_IT8761E is not set
+# CONFIG_GPIO_VX855 is not set
#
# I2C GPIO expanders:
@@ -1087,6 +1129,7 @@ CONFIG_GPIOLIB=y
# CONFIG_GPIO_MAX7301 is not set
# CONFIG_GPIO_MCP23S08 is not set
# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
#
# AC97 GPIO expanders:
@@ -1102,8 +1145,8 @@ CONFIG_POWER_SUPPLY=m
CONFIG_WM831X_BACKUP=m
CONFIG_WM831X_POWER=m
# CONFIG_TEST_POWER is not set
-# CONFIG_BATTERY_DS2760 is not set
# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_BQ20Z75 is not set
# CONFIG_BATTERY_BQ27x00 is not set
# CONFIG_BATTERY_MAX17040 is not set
CONFIG_HWMON=m
@@ -1135,6 +1178,7 @@ CONFIG_HWMON=m
# CONFIG_SENSORS_G760A is not set
# CONFIG_SENSORS_GL518SM is not set
# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_GPIO_FAN is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_JC42 is not set
# CONFIG_SENSORS_LM63 is not set
@@ -1152,6 +1196,7 @@ CONFIG_HWMON=m
# CONFIG_SENSORS_LM93 is not set
# CONFIG_SENSORS_LTC4215 is not set
# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LTC4261 is not set
# CONFIG_SENSORS_LM95241 is not set
# CONFIG_SENSORS_MAX1111 is not set
# CONFIG_SENSORS_MAX1619 is not set
@@ -1179,11 +1224,12 @@ CONFIG_HWMON=m
# CONFIG_SENSORS_W83791D is not set
# CONFIG_SENSORS_W83792D is not set
# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83795 is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83L786NG is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_SENSORS_WM831X is not set
+CONFIG_SENSORS_WM831X=m
# CONFIG_SENSORS_LIS3_SPI is not set
# CONFIG_SENSORS_LIS3_I2C is not set
# CONFIG_THERMAL is not set
@@ -1231,14 +1277,16 @@ CONFIG_MFD_CORE=y
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_WM8400 is not set
CONFIG_MFD_WM831X=y
+CONFIG_MFD_WM831X_I2C=y
+# CONFIG_MFD_WM831X_SPI is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_MFD_PCF50633 is not set
-# CONFIG_MFD_MC13783 is not set
+# CONFIG_MFD_MC13XXX is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_EZX_PCAP is not set
-# CONFIG_AB8500_CORE is not set
# CONFIG_MFD_TPS6586X is not set
+CONFIG_MFD_IMX_IPU_V3=y
# CONFIG_REGULATOR is not set
# CONFIG_MEDIA_SUPPORT is not set
@@ -1252,9 +1300,9 @@ CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB_DDC is not set
# CONFIG_FB_BOOT_VESA_SUPPORT is not set
-# CONFIG_FB_CFB_FILLRECT is not set
-# CONFIG_FB_CFB_COPYAREA is not set
-# CONFIG_FB_CFB_IMAGEBLIT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
@@ -1264,7 +1312,7 @@ CONFIG_FB=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
-# CONFIG_FB_MODE_HELPERS is not set
+CONFIG_FB_MODE_HELPERS=y
# CONFIG_FB_TILEBLITTING is not set
#
@@ -1275,6 +1323,7 @@ CONFIG_FB=y
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FB_METRONOME is not set
# CONFIG_FB_MB862XX is not set
+CONFIG_FB_MX5=y
# CONFIG_FB_BROADSHEET is not set
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=m
@@ -1342,6 +1391,7 @@ CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_EMU10K1_SEQ is not set
CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_ALOOP is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
@@ -1382,6 +1432,8 @@ CONFIG_USB_HID=y
# CONFIG_HID_ELECOM is not set
# CONFIG_HID_EZKEY is not set
# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
# CONFIG_HID_GYRATION is not set
# CONFIG_HID_TWINHAN is not set
# CONFIG_HID_KENSINGTON is not set
@@ -1398,6 +1450,7 @@ CONFIG_USB_HID=y
# CONFIG_HID_QUANTA is not set
# CONFIG_HID_ROCCAT is not set
# CONFIG_HID_ROCCAT_KONE is not set
+# CONFIG_HID_ROCCAT_PYRA is not set
# CONFIG_HID_SAMSUNG is not set
# CONFIG_HID_SONY is not set
# CONFIG_HID_STANTUM is not set
@@ -1474,6 +1527,7 @@ CONFIG_USB_STORAGE=y
# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_UAS is not set
# CONFIG_USB_LIBUSUAL is not set
#
@@ -1509,6 +1563,7 @@ CONFIG_USB_STORAGE=y
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
# CONFIG_USB_GADGET_DEBUG_FS is not set
@@ -1551,6 +1606,7 @@ CONFIG_MMC=y
# MMC/SD/SDIO Card Drivers
#
CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
CONFIG_MMC_BLOCK_BOUNCE=y
# CONFIG_SDIO_UART is not set
# CONFIG_MMC_TEST is not set
@@ -1558,9 +1614,13 @@ CONFIG_MMC_BLOCK_BOUNCE=y
#
# MMC/SD/SDIO Host Controller Drivers
#
-# CONFIG_MMC_SDHCI is not set
-CONFIG_MMC_MXC=y
-# CONFIG_MMC_SPI is not set
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+# CONFIG_MMC_MXC is not set
+CONFIG_MMC_SPI=m
+# CONFIG_MMC_USHC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
@@ -1669,8 +1729,9 @@ CONFIG_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
+# CONFIG_QUOTACTL is not set
CONFIG_AUTOFS4_FS=y
# CONFIG_FUSE_FS is not set
@@ -1758,6 +1819,7 @@ CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
# CONFIG_NFS_USE_LEGACY_DNS is not set
CONFIG_NFS_USE_KERNEL_DNS=y
+# CONFIG_NFS_USE_NEW_IDMAPPER is not set
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
@@ -1765,8 +1827,6 @@ CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
@@ -1850,12 +1910,16 @@ CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
# CONFIG_HARDLOCKUP_DETECTOR is not set
+CONFIG_BKL=y
+# CONFIG_SPARSE_RCU_POINTER is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_LKDTM is not set
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_RING_BUFFER=y
CONFIG_RING_BUFFER_ALLOW_SWAP=y
CONFIG_TRACING_SUPPORT=y
@@ -1864,6 +1928,7 @@ CONFIG_TRACING_SUPPORT=y
# CONFIG_ATOMIC64_SELFTEST is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_STRICT_DEVMEM is not set
CONFIG_ARM_UNWIND=y
# CONFIG_DEBUG_USER is not set
# CONFIG_OC_ETM is not set
@@ -1873,6 +1938,7 @@ CONFIG_ARM_UNWIND=y
#
CONFIG_KEYS=y
# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
CONFIG_DEFAULT_SECURITY_DAC=y
@@ -1988,7 +2054,7 @@ CONFIG_CRC16=y
# CONFIG_CRC_T10DIF is not set
CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
+CONFIG_CRC7=m
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h
index 34d6fc3..917a45f 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h
@@ -125,7 +125,7 @@
CONFIG_CONSOLE " root=/dev/mtdblock4 rootfstype=jffs2 " MTDPARTS_DEFAULT
#define CONFIG_CONSOLE "console=ttymxc1,"MK_STR(CONFIG_BAUDRATE)
-#define CONFIG_MTDMAP "mxc_nand.0"
+#define CONFIG_MTDMAP "mxc_nand"
#define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
#define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP ":1M(U-boot)ro," \
"1M(U-boot_env),1M(firmware)," \
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38-alpha b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38-alpha
new file mode 120000
index 0000000..b7e1c10
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38-alpha
@@ -0,0 +1 @@
+2.6.38
\ No newline at end of file
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-1-iMX51-add_ipu_clock_support.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-1-iMX51-add_ipu_clock_support.patch
new file mode 100644
index 0000000..845c858
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-1-iMX51-add_ipu_clock_support.patch
@@ -0,0 +1,187 @@
+Signed-off-by: Sascha Hauer <s....@pe...>
+---
+ arch/arm/mach-mx5/clock-mx51-mx53.c | 140 +++++++++++++++++++++++++++++++++++
+ 1 files changed, 140 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
+index 9fc65bb..f550d02 100644
+--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
++++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
+@@ -39,6 +39,9 @@ static struct clk periph_apm_clk;
+ static struct clk ahb_clk;
+ static struct clk ipg_clk;
+ static struct clk usboh3_clk;
++static struct clk emi_fast_clk;
++static struct clk ipu_clk;
++static struct clk mipi_hsc1_clk;
+
+ #define MAX_DPLL_WAIT_TRIES 1000 /* 1000 * udelay(1) = 1ms */
+
+@@ -679,6 +682,19 @@ static unsigned long clk_emi_slow_get_rate(struct clk *clk)
+ return clk_get_rate(clk->parent) / div;
+ }
+
++static unsigned long _clk_ddr_hf_get_rate(struct clk *clk)
++{
++ unsigned long rate;
++ u32 reg, div;
++
++ reg = __raw_readl(MXC_CCM_CBCDR);
++ div = ((reg & MXC_CCM_CBCDR_DDR_PODF_MASK) >>
++ MXC_CCM_CBCDR_DDR_PODF_OFFSET) + 1;
++ rate = clk_get_rate(clk->parent) / div;
++
++ return rate;
++}
++
+ /* External high frequency clock */
+ static struct clk ckih_clk = {
+ .get_rate = get_high_reference_clock_rate,
+@@ -819,6 +835,109 @@ static struct clk emi_slow_clk = {
+ .get_rate = clk_emi_slow_get_rate,
+ };
+
++static int clk_ipu_enable(struct clk *clk)
++{
++ u32 reg;
++
++ _clk_ccgr_enable(clk);
++
++ /* Enable handshake with IPU when certain clock rates are changed */
++ reg = __raw_readl(MXC_CCM_CCDR);
++ reg &= ~MXC_CCM_CCDR_IPU_HS_MASK;
++ __raw_writel(reg, MXC_CCM_CCDR);
++
++ /* Enable handshake with IPU when LPM is entered */
++ reg = __raw_readl(MXC_CCM_CLPCR);
++ reg &= ~MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS;
++ __raw_writel(reg, MXC_CCM_CLPCR);
++
++ return 0;
++}
++
++static void clk_ipu_disable(struct clk *clk)
++{
++ u32 reg;
++
++ _clk_ccgr_disable(clk);
++
++ /* Disable handshake with IPU whe dividers are changed */
++ reg = __raw_readl(MXC_CCM_CCDR);
++ reg |= MXC_CCM_CCDR_IPU_HS_MASK;
++ __raw_writel(reg, MXC_CCM_CCDR);
++
++ /* Disable handshake with IPU when LPM is entered */
++ reg = __raw_readl(MXC_CCM_CLPCR);
++ reg |= MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS;
++ __raw_writel(reg, MXC_CCM_CLPCR);
++}
++
++static struct clk ahbmux1_clk = {
++ .parent = &ahb_clk,
++ .secondary = &ahb_max_clk,
++ .enable_reg = MXC_CCM_CCGR0,
++ .enable_shift = MXC_CCM_CCGRx_CG8_OFFSET,
++ .enable = _clk_ccgr_enable,
++ .disable = _clk_ccgr_disable_inwait,
++};
++
++static struct clk ipu_sec_clk = {
++ .parent = &emi_fast_clk,
++ .secondary = &ahbmux1_clk,
++};
++
++static struct clk ddr_hf_clk = {
++ .parent = &pll1_sw_clk,
++ .get_rate = _clk_ddr_hf_get_rate,
++};
++
++static struct clk ddr_clk = {
++ .parent = &ddr_hf_clk,
++};
++
++/* clock definitions for MIPI HSC unit which has been removed
++ * from documentation, but not from hardware
++ */
++static int _clk_hsc_enable(struct clk *clk)
++{
++ u32 reg;
++
++ _clk_ccgr_enable(clk);
++ /* Handshake with IPU when certain clock rates are changed. */
++ reg = __raw_readl(MXC_CCM_CCDR);
++ reg &= ~MXC_CCM_CCDR_HSC_HS_MASK;
++ __raw_writel(reg, MXC_CCM_CCDR);
++
++ reg = __raw_readl(MXC_CCM_CLPCR);
++ reg &= ~MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS;
++ __raw_writel(reg, MXC_CCM_CLPCR);
++
++ return 0;
++}
++
++static void _clk_hsc_disable(struct clk *clk)
++{
++ u32 reg;
++
++ _clk_ccgr_disable(clk);
++ /* No handshake with HSC as its not enabled. */
++ reg = __raw_readl(MXC_CCM_CCDR);
++ reg |= MXC_CCM_CCDR_HSC_HS_MASK;
++ __raw_writel(reg, MXC_CCM_CCDR);
++
++ reg = __raw_readl(MXC_CCM_CLPCR);
++ reg |= MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS;
++ __raw_writel(reg, MXC_CCM_CLPCR);
++}
++
++static struct clk mipi_hsp_clk = {
++ .parent = &ipu_clk,
++ .enable_reg = MXC_CCM_CCGR4,
++ .enable_shift = MXC_CCM_CCGRx_CG6_OFFSET,
++ .enable = _clk_hsc_enable,
++ .disable = _clk_hsc_disable,
++ .secondary = &mipi_hsc1_clk,
++};
++
+ #define DEFINE_CLOCK_CCGR(name, i, er, es, pfx, p, s) \
+ static struct clk name = { \
+ .id = i, \
+@@ -1046,6 +1165,23 @@ DEFINE_CLOCK_FULL(esdhc2_ipg_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG2_OFFSET,
+ DEFINE_CLOCK_MAX(esdhc2_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG3_OFFSET,
+ clk_esdhc2, &pll2_sw_clk, &esdhc2_ipg_clk);
+
++DEFINE_CLOCK(mipi_esc_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG5_OFFSET, NULL, NULL, NULL, &pll2_sw_clk);
++DEFINE_CLOCK(mipi_hsc2_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG4_OFFSET, NULL, NULL, &mipi_esc_clk, &pll2_sw_clk);
++DEFINE_CLOCK(mipi_hsc1_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG3_OFFSET, NULL, NULL, &mipi_hsc2_clk, &pll2_sw_clk);
++
++/* IPU */
++DEFINE_CLOCK_FULL(ipu_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG5_OFFSET,
++ NULL, NULL, clk_ipu_enable, clk_ipu_disable, &ahb_clk, &ipu_sec_clk);
++
++DEFINE_CLOCK_FULL(emi_fast_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG7_OFFSET,
++ NULL, NULL, _clk_ccgr_enable, _clk_ccgr_disable_inwait,
++ &ddr_clk, NULL);
++
++DEFINE_CLOCK(ipu_di0_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG5_OFFSET,
++ NULL, NULL, &pll3_sw_clk, NULL);
++DEFINE_CLOCK(ipu_di1_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG6_OFFSET,
++ NULL, NULL, &pll3_sw_clk, NULL);
++
+ #define _REGISTER_CLOCK(d, n, c) \
+ { \
+ .dev_id = d, \
+@@ -1117,6 +1253,10 @@ static struct clk_lookup mx51_lookups[] = {
+ _REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
+ _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)
+ _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)
++ _REGISTER_CLOCK(NULL, "mipi_hsp", mipi_hsp_clk)
++ _REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk)
++ _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk)
++ _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk)
+ };
+
+ static struct clk_lookup mx53_lookups[] = {
+--
+1.7.2.3
+
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-2-iMX51-rename_IPU_irqs.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-2-iMX51-rename_IPU_irqs.patch
new file mode 100644
index 0000000..23d237c
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-2-iMX51-rename_IPU_irqs.patch
@@ -0,0 +1,24 @@
+
+Signed-off-by: Sascha Hauer <s....@pe...>
+---
+ arch/arm/plat-mxc/include/mach/mx51.h | 4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
+index fa3a2a5..873807f 100644
+--- a/arch/arm/plat-mxc/include/mach/mx51.h
++++ b/arch/arm/plat-mxc/include/mach/mx51.h
+@@ -251,8 +251,8 @@
+ #define MX51_MXC_INT_IOMUX 7
+ #define MX51_INT_NFC 8
+ #define MX51_MXC_INT_VPU 9
+-#define MX51_MXC_INT_IPU_ERR 10
+-#define MX51_MXC_INT_IPU_SYN 11
++#define MX51_INT_IPU_ERR 10
++#define MX51_INT_IPU_SYN 11
+ #define MX51_MXC_INT_GPU 12
+ #define MX51_MXC_INT_RESV13 13
+ #define MX51_MXC_INT_USB_H1 14
+--
+1.7.2.3
+
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-3-Add_a_mfd_IPUv3_driver.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-3-Add_a_mfd_IPUv3_driver.patch
new file mode 100644
index 0000000..5aa97cc
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.38/001-2010-12-10-pengutronix-3-Add_a_mfd_IPUv3_driver.patch
@@ -0,0 +1,3576 @@
+The IPU is the Image Processing Unit found on i.MX50/51/53 SoCs. It
+features several units for image processing, this patch adds support
+for the units needed for Framebuffer support, namely:
+
+- Display Controller (dc)
+- Display Interface (di)
+- Display Multi Fifo Controller (dmfc)
+- Display Processor (dp)
+- Image DMA Controller (idmac)
+
+This patch is based on the Freescale driver, but follows a different
+approach. The Freescale code implements logical idmac channels and
+the handling of the subunits is hidden in common idmac code pathes
+in big switch/case statements. This patch instead just provides code
+and resource management for the different subunits. The user, in this
+case the framebuffer driver, decides how the different units play
+together.
+
+The IPU has other units missing in this patch:
+
+- CMOS Sensor Interface (csi)
+- Video Deinterlacer (vdi)
+- Sensor Multi FIFO Controler (smfc)
+- Image Converter (ic)
+- Image Rotator (irt)
+
+So expect more files to come in this directory.
+
+Signed-off-by: Sascha Hauer <s....@pe...>
+---
+ arch/arm/plat-mxc/include/mach/ipu-v3.h | 48 +++
+ drivers/mfd/Kconfig | 7 +
+ drivers/mfd/Makefile | 1 +
+ drivers/mfd/imx-ipu-v3/Makefile | 3 +
+ drivers/mfd/imx-ipu-v3/ipu-common.c | 661 +++++++++++++++++++++++++++++++
+ drivers/mfd/imx-ipu-v3/ipu-cpmem.c | 608 ++++++++++++++++++++++++++++
+ drivers/mfd/imx-ipu-v3/ipu-dc.c | 362 +++++++++++++++++
+ drivers/mfd/imx-ipu-v3/ipu-di.c | 507 ++++++++++++++++++++++++
+ drivers/mfd/imx-ipu-v3/ipu-dmfc.c | 343 ++++++++++++++++
+ drivers/mfd/imx-ipu-v3/ipu-dp.c | 468 ++++++++++++++++++++++
+ drivers/mfd/imx-ipu-v3/ipu-prv.h | 214 ++++++++++
+ include/linux/mfd/imx-ipu-v3.h | 218 ++++++++++
+ 12 files changed, 3440 insertions(+), 0 deletions(-)
+ create mode 100644 arch/arm/plat-mxc/include/mach/ipu-v3.h
+ create mode 100644 drivers/mfd/imx-ipu-v3/Makefile
+ create mode 100644 drivers/mfd/imx-ipu-v3/ipu-common.c
+ create mode 100644 drivers/mfd/imx-ipu-v3/ipu-cpmem.c
+ create mode 100644 drivers/mfd/imx-ipu-v3/ipu-dc.c
+ create mode 100644 drivers/mfd/imx-ipu-v3/ipu-di.c
+ create mode 100644 drivers/mfd/imx-ipu-v3/ipu-dmfc.c
+ create mode 100644 drivers/mfd/imx-ipu-v3/ipu-dp.c
+ create mode 100644 drivers/mfd/imx-ipu-v3/ipu-prv.h
+ create mode 100644 include/linux/mfd/imx-ipu-v3.h
+
+diff --git a/arch/arm/plat-mxc/include/mach/ipu-v3.h b/arch/arm/plat-mxc/include/mach/ipu-v3.h
+new file mode 100644
+index 0000000..0a6c3e8
+--- /dev/null
++++ b/arch/arm/plat-mxc/include/mach/ipu-v3.h
+@@ -0,0 +1,48 @@
++/*
++ * Copyright (c) 2010 Sascha Hauer <s....@pe...>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 of the License, or (at your
++ * option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
++ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ */
++
++#ifndef __MACH_IPU_V3_H_
++#define __MACH_IPU_V3_H_
++
++/* IPU specific extensions to struct fb_videomode flag field */
++#define FB_SYNC_OE_LOW_ACT (1 << 8)
++#define FB_SYNC_CLK_LAT_FALL (1 << 9)
++#define FB_SYNC_DATA_INVERT (1 << 10)
++#define FB_SYNC_CLK_IDLE_EN (1 << 11)
++#define FB_SYNC_SHARP_MODE (1 << 12)
++#define FB_SYNC_SWAP_RGB (1 << 13)
++
++struct ipuv3_fb_platform_data {
++ const struct fb_videomode *modes;
++ int num_modes;
++ char *mode_str;
++ u32 interface_pix_fmt;
++
++#define IMX_IPU_FB_USE_MODEDB (1 << 0)
++#define IMX_IPU_FB_USE_OVERLAY (1 << 1)
++ unsigned long flags;
++
++ int ipu_channel_bg;
++ int ipu_channel_fg;
++ int dc_channel;
++ int dp_channel;
++};
++
++struct imx_ipuv3_platform_data {
++ int rev;
++ struct ipuv3_fb_platform_data *fb0_platform_data;
++ struct ipuv3_fb_platform_data *fb1_platform_data;
++};
++
++#endif /* __MACH_IPU_V3_H_ */
+diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
+index 3a1493b..3c81879 100644
+--- a/drivers/mfd/Kconfig
++++ b/drivers/mfd/Kconfig
+@@ -606,6 +606,13 @@ config MFD_VX855
+ VIA VX855/VX875 south bridge. You will need to enable the vx855_spi
+ and/or vx855_gpio drivers for this to do anything useful.
+
++config MFD_IMX_IPU_V3
++ tristate "Support the Image Processing Unit (IPU) found on the i.MX51"
++ depends on ARCH_MX51
++ select MFD_CORE
++ help
++ Say yes here to support the IPU on i.MX51.
++
+ endif # MFD_SUPPORT
+
+ menu "Multimedia Capabilities Port drivers"
+diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
+index f54b365..7873b13 100644
+--- a/drivers/mfd/Makefile
++++ b/drivers/mfd/Makefile
+@@ -76,3 +76,4 @@ obj-$(CONFIG_MFD_JANZ_CMODIO) += janz-cmodio.o
+ obj-$(CONFIG_MFD_JZ4740_ADC) += jz4740-adc.o
+ obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
+ obj-$(CONFIG_MFD_VX855) += vx855.o
++obj-$(CONFIG_MFD_IMX_IPU_V3) += imx-ipu-v3/
+diff --git a/drivers/mfd/imx-ipu-v3/Makefile b/drivers/mfd/imx-ipu-v3/Makefile
+new file mode 100644
+index 0000000..ff70fe8
+--- /dev/null
++++ b/drivers/mfd/imx-ipu-v3/Makefile
+@@ -0,0 +1,3 @@
++obj-$(CONFIG_MFD_IMX_IPU_V3) += imx-ipu-v3.o
++
++imx-ipu-v3-objs := ipu-common.o ipu-dc.o ipu-di.o ipu-dp.o ipu-dmfc.o ipu-cpmem.o
+diff --git a/drivers/mfd/imx-ipu-v3/ipu-common.c b/drivers/mfd/imx-ipu-v3/ipu-common.c
+new file mode 100644
+index 0000000..e6edb88
+--- /dev/null
++++ b/drivers/mfd/imx-ipu-v3/ipu-common.c
+@@ -0,0 +1,661 @@
++/*
++ * Copyright (c) 2010 Sascha Hauer <s....@pe...>
++ * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 of the License, or (at your
++ * option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
++ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/err.h>
++#include <linux/spinlock.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/io.h>
++#include <linux/mfd/imx-ipu-v3.h>
++#include <linux/clk.h>
++#include <linux/list.h>
++#include <mach/common.h>
++#include <linux/mfd/core.h>
++#include <mach/ipu-v3.h>
++
++#include "ipu-prv.h"
++
++static struct clk *ipu_clk;
++static struct device *ipu_dev;
++
++static DEFINE_SPINLOCK(ipu_lock);
++void __iomem *ipu_cm_reg;
++void __iomem *ipu_idmac_reg;
++
++static struct ipu_channel channels[64];
++
++struct ipu_channel *ipu_idmac_get(unsigned num)
++{
++ struct ipu_channel *channel;
++
++ dev_dbg(ipu_dev, "%s %d\n", __func__, num);
++
++ if (num > 63)
++ return ERR_PTR(-ENODEV);
++
++ channel = &channels[num];
++
++ if (channel->busy)
++ return ERR_PTR(-EBUSY);
++
++ channel->busy = 1;
++ channel->num = num;
++
++ clk_enable(ipu_clk);
++
++ return channel;
++}
++EXPORT_SYMBOL(ipu_idmac_get);
++
++void ipu_idmac_put(struct ipu_channel *channel)
++{
++ dev_dbg(ipu_dev, "%s %d\n", __func__, channel->num);
++
++ clk_disable(ipu_clk);
++ channel->busy = 0;
++}
++EXPORT_SYMBOL(ipu_idmac_put);
++
++void ipu_idmac_set_double_buffer(struct ipu_channel *channel, bool doublebuffer)
++{
++ unsigned long flags;
++ u32 reg;
++
++ spin_lock_irqsave(&ipu_lock, flags);
++
++ reg = ipu_cm_read(IPU_CHA_DB_MODE_SEL(channel->num));
++ if (doublebuffer)
++ reg |= idma_mask(channel->num);
++ else
++ reg &= ~idma_mask(channel->num);
++ ipu_cm_write(reg, IPU_CHA_DB_MODE_SEL(channel->num));
++
++ spin_unlock_irqrestore(&ipu_lock, flags);
++}
++EXPORT_SYMBOL(ipu_idmac_set_double_buffer);
++
++void ipu_uninit_channel(struct ipu_channel *channel)
++{
++ unsigned long lock_flags;
++ u32 val;
++
++ /* Make sure channel is disabled */
++
++ if (idmac_idma_is_set(IDMAC_CHA_EN, channel->num)) {
++ dev_err(ipu_dev,
++ "Channel %d is not disabled, disable first\n",
++ channel->num);
++ return;
++ }
++
++ spin_lock_irqsave(&ipu_lock, lock_flags);
++
++ /* Reset the double buffer */
++ val = ipu_cm_read(IPU_CHA_DB_MODE_SEL(channel->num));
++ val &= ~idma_mask(channel->num);
++ ipu_cm_write(val, IPU_CHA_DB_MODE_SEL(channel->num));
++
++ spin_unlock_irqrestore(&ipu_lock, lock_flags);
++}
++EXPORT_SYMBOL(ipu_uninit_channel);
++
++int ipu_module_enable(u32 mask)
++{
++ unsigned long lock_flags;
++ u32 ipu_conf;
++
++ spin_lock_irqsave(&ipu_lock, lock_flags);
++
++ ipu_conf = ipu_cm_read(IPU_CONF);
++ ipu_conf |= mask;
++ ipu_cm_write(ipu_conf, IPU_CONF);
++
++ spin_unlock_irqrestore(&ipu_lock, lock_flags);
++
++ return 0;
++}
++
++int ipu_module_disable(u32 mask)
++{
++ unsigned long lock_flags;
++ u32 ipu_conf;
++
++ spin_lock_irqsave(&ipu_lock, lock_flags);
++
++ ipu_conf = ipu_cm_read(IPU_CONF);
++ ipu_conf &= ~mask;
++ ipu_cm_write(ipu_conf, IPU_CONF);
++
++ spin_unlock_irqrestore(&ipu_lock, lock_flags);
++
++ return 0;
++}
++
++void ipu_idmac_select_buffer(struct ipu_channel *channel, u32 buf_num)
++{
++ unsigned int chno = channel->num;
++
++ /* Mark buffer as ready. */
++ if (buf_num == 0)
++ ipu_cm_write(idma_mask(chno), IPU_CHA_BUF0_RDY(chno));
++ else
++ ipu_cm_write(idma_mask(chno), IPU_CHA_BUF1_RDY(chno));
++}
++EXPORT_SYMBOL(ipu_idmac_select_buffer);
++
++int ipu_idmac_enable_channel(struct ipu_channel *channel)
++{
++ u32 val;
++ unsigned long flags;
++
++ spin_lock_irqsave(&ipu_lock, flags);
++
++ val = ipu_idmac_read(IDMAC_CHA_EN(channel->num));
++ val |= idma_mask(channel->num);
++ ipu_idmac_write(val, IDMAC_CHA_EN(channel->num));
++
++ spin_unlock_irqrestore(&ipu_lock, flags);
++
++ return 0;
++}
++EXPORT_SYMBOL(ipu_idmac_enable_channel);
++
++int ipu_idmac_disable_channel(struct ipu_channel *channel)
++{
++ u32 val;
++ unsigned long flags;
++
++ spin_lock_irqsave(&ipu_lock, flags);
++
++ /* Disable DMA channel(s) */
++ val = ipu_idmac_read(IDMAC_CHA_EN(channel->num));
++ val &= ~idma_mask(channel->num);
++ ipu_idmac_write(val, IDMAC_CHA_EN(channel->num));
++
++ /* Set channel buffers NOT to be ready */
++ ipu_cm_write(0xf0000000, IPU_GPR); /* write one to clear */
++
++ if (ipu_idma_is_set(IPU_CHA_BUF0_RDY, channel->num)) {
++ ipu_cm_write(idma_mask(channel->num),
++ IPU_CHA_BUF0_RDY(channel->num));
++ }
++ if (ipu_idma_is_set(IPU_CHA_BUF1_RDY, channel->num)) {
++ ipu_cm_write(idma_mask(channel->num),
++ IPU_CHA_BUF1_RDY(channel->num));
++ }
++
++ ipu_cm_write(0x0, IPU_GPR); /* write one to set */
++
++ spin_unlock_irqrestore(&ipu_lock, flags);
++
++ return 0;
++}
++EXPORT_SYMBOL(ipu_idmac_disable_channel);
++
++static LIST_HEAD(ipu_irq_handlers);
++
++static void ipu_irq_update_irq_mask(void)
++{
++ struct ipu_irq_handler *handler;
++ int i;
++
++ DECLARE_IPU_IRQ_BITMAP(irqs);
++
++ bitmap_zero(irqs, IPU_IRQ_COUNT);
++
++ list_for_each_entry(handler, &ipu_irq_handlers, list)
++ bitmap_or(irqs, irqs, handler->ipu_irqs, IPU_IRQ_COUNT);
++
++ for (i = 0; i < BITS_TO_LONGS(IPU_IRQ_COUNT); i++)
++ ipu_cm_write(irqs[i], IPU_INT_CTRL(i + 1));
++}
++
++int ipu_irq_add_handler(struct ipu_irq_handler *ipuirq)
++{
++ unsigned long flags;
++
++ spin_lock_irqsave(&ipu_lock, flags);
++
++ list_add_tail(&ipuirq->list, &ipu_irq_handlers);
++ ipu_irq_update_irq_mask();
++
++ spin_unlock_irqrestore(&ipu_lock, flags);
++ return 0;
++}
++EXPORT_SYMBOL(ipu_irq_add_handler);
++
++void ipu_irq_remove_handler(struct ipu_irq_handler *handler)
++{
++ unsigned long flags;
++
++ spin_lock_irqsave(&ipu_lock, flags);
++
++ list_del(&handler->list);
++ ipu_irq_update_irq_mask();
++
++ spin_unlock_irqrestore(&ipu_lock, flags);
++}
++EXPORT_SYMBOL(ipu_irq_remove_handler);
++
++int ipu_irq_update_handler(struct ipu_irq_handler *handler,
++ unsigned long *bitmap)
++{
++ unsigned long flags;
++
++ spin_lock_irqsave(&ipu_lock, flags);
++
++ bitmap_copy(handler->ipu_irqs, bitmap, IPU_IRQ_COUNT);
++ ipu_irq_update_irq_mask();
++
++ spin_unlock_irqrestore(&ipu_lock, flags);
++
++ return 0;
++}
++EXPORT_SYMBOL(ipu_irq_update_handler);
++
++static void ipu_completion_handler(unsigned long *bitmask, void *context)
++{
++ struct completion *completion = context;
++
++ complete(completion);
++}
++
++int ipu_wait_for_interrupt(int interrupt, int timeout_ms)
++{
++ struct ipu_irq_handler handler;
++ DECLARE_COMPLETION_ONSTACK(completion);
++ int ret;
++
++ bitmap_zero(handler.ipu_irqs, IPU_IRQ_COUNT);
++ bitmap_set(handler.ipu_irqs, interrupt, 1);
++
++ handler.handler = ipu_completion_handler;
++ handler.context = &completion;
++ ipu_irq_add_handler(&handler);
++
++ ret = wait_for_completion_timeout(&completion,
++ msecs_to_jiffies(timeout_ms));
++
++ ipu_irq_remove_handler(&handler);
++
++ if (ret > 0)
++ ret = 0;
++
++ return ret;
++}
++EXPORT_SYMBOL(ipu_wait_for_interrupt);
++
++static irqreturn_t ipu_irq_handler(int irq, void *desc)
++{
++ DECLARE_IPU_IRQ_BITMAP(status);
++ struct ipu_irq_handler *handler;
++ int i;
++
++ for (i = 0; i < BITS_TO_LONGS(IPU_IRQ_COUNT); i++) {
++ status[i] = ipu_cm_read(IPU_INT_STAT(i + 1));
++ ipu_cm_write(status[i], IPU_INT_STAT(i + 1));
++ }
++
++ list_for_each_entry(handler, &ipu_irq_handlers, list) {
++ DECLARE_IPU_IRQ_BITMAP(tmp);
++ if (bitmap_and(tmp, status, handler->ipu_irqs, IPU_IRQ_COUNT))
++ handler->handler(tmp, handler->context);
++ }
++
++ return IRQ_HANDLED;
++}
++
++ipu_color_space_t format_to_colorspace(u32 fmt)
++{
++ switch (fmt) {
++ case IPU_PIX_FMT_RGB666:
++ case IPU_PIX_FMT_RGB565:
++ case IPU_PIX_FMT_BGR24:
++ case IPU_PIX_FMT_RGB24:
++ case IPU_PIX_FMT_BGR32:
++ case IPU_PIX_FMT_BGRA32:
++ case IPU_PIX_FMT_RGB32:
++ case IPU_PIX_FMT_RGBA32:
++ case IPU_PIX_FMT_ABGR32:
++ case IPU_PIX_FMT_LVDS666:
++ case IPU_PIX_FMT_LVDS888:
++ return RGB;
++
++ default:
++ return YCbCr;
++ }
++}
++
++static int ipu_reset(void)
++{
++ int timeout = 10000;
++ u32 val;
++
++ /* hard reset the IPU */
++ val = readl(MX51_IO_ADDRESS(MX51_SRC_BASE_ADDR));
++ val |= 1 << 3;
++ writel(val, MX51_IO_ADDRESS(MX51_SRC_BASE_ADDR));
++
++ ipu_cm_write(0x807FFFFF, IPU_MEM_RST);
++
++ while (ipu_cm_read(IPU_MEM_RST) & 0x80000000) {
++ if (!timeout--)
++ return -ETIME;
++ udelay(100);
++ }
++
++ return 0;
++}
++
++/*
++ * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by
++ * the Freescale marketing division. However this did not remove the
++ * hardware from the chip which still needs to be configured...
++ */
++static int __devinit ipu_mipi_setup(void)
++{
++ struct clk *hsc_clk;
++ void __iomem *hsc_addr;
++ int ret = 0;
++
++ hsc_addr = ioremap(MX51_MIPI_HSC_BASE_ADDR, PAGE_SIZE);
++ if (!hsc_addr)
++ return -ENOMEM;
++
++ hsc_clk = clk_get_sys(NULL, "mipi_hsp");
++ if (IS_ERR(hsc_clk)) {
++ ret = PTR_ERR(hsc_clk);
++ goto unmap;
++ }
++ clk_enable(hsc_clk);
++
++ /* setup MIPI module to legacy mode */
++ __raw_writel(0xF00, hsc_addr);
++
++ /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */
++ __raw_writel(__raw_readl(hsc_addr + 0x800) | 0x30ff,
++ hsc_addr + 0x800);
++
++ clk_disable(hsc_clk);
++ clk_put(hsc_clk);
++unmap:
++ iounmap(hsc_addr);
++
++ return ret;
++}
++
++static int ipu_submodules_init(struct platform_device *pdev,
++ unsigned long ipu_base, struct clk *ipu_clk)
++{
++ char *unit;
++ int ret;
++
++ ret = ipu_di_init(pdev, 0, ipu_base + IPU_DI0_REG_BASE,
++ IPU_CONF_DI0_EN, ipu_clk);
++ if (ret) {
++ unit = "di0";
++ goto err_di_0;
++ }
++
++ ret = ipu_di_init(pdev, 1, ipu_base + IPU_DI1_REG_BASE,
++ IPU_CONF_DI1_EN, ipu_clk);
++ if (ret) {
++ unit = "di1";
++ goto err_di_1;
++ }
++
++ ret = ipu_dc_init(pdev, ipu_base + IPU_DC_REG_BASE,
++ ipu_base + IPU_DC_TMPL_REG_BASE);
++ if (ret) {
++ unit = "dc_template";
++ goto err_dc;
++ }
++
++ ret = ipu_dmfc_init(pdev, ipu_base + IPU_DMFC_REG_BASE, ipu_clk);
++ if (ret) {
++ unit = "dmfc";
++ goto err_dmfc;
++ }
++
++ ret = ipu_dp_init(pdev, ipu_base + IPU_SRM_REG_BASE);
++ if (ret) {
++ unit = "dp";
++ goto err_dp;
++ }
++
++ ret = ipu_cpmem_init(pdev, ipu_base + IPU_CPMEM_REG_BASE);
++ if (ret) {
++ unit = "cpmem";
++ goto err_cpmem;
++ }
++
++ return 0;
++
++err_cpmem:
++ ipu_dp_exit(pdev);
++err_dp:
++ ipu_dmfc_exit(pdev);
++err_dmfc:
++ ipu_dc_exit(pdev);
++err_dc:
++ ipu_di_exit(pdev, 1);
++err_di_1:
++ ipu_di_exit(pdev, 0);
++err_di_0:
++ dev_err(&pdev->dev, "init %s failed with %d\n", unit, ret);
++ return ret;
++}
++
++static void ipu_submodules_exit(struct platform_device *pdev,
++ unsigned long ipu_base)
++{
++ ipu_cpmem_exit(pdev);
++ ipu_dp_exit(pdev);
++ ipu_dmfc_exit(pdev);
++ ipu_dc_exit(pdev);
++ ipu_di_exit(pdev, 1);
++ ipu_di_exit(pdev, 0);
++}
++
++static int ipu_add_subdevice_pdata(struct platform_device *pdev,
++ const char *name, int id, void *pdata, size_t pdata_size)
++{
++ struct mfd_cell cell = {
++ .platform_data = pdata,
++ .data_size = pdata_size,
++ };
++
++ cell.name = name;
++
++ return mfd_add_devices(&pdev->dev, id, &cell, 1, NULL, 0);
++}
++
++static int ipu_add_client_devices(struct platform_device *pdev)
++{
++ struct imx_ipuv3_platform_data *plat_data = pdev->dev.platform_data;
++
++ if (plat_data->fb0_platform_data) {
++ plat_data->fb0_platform_data->ipu_channel_bg =
++ MX51_IPU_CHANNEL_MEM_BG_SYNC;
++ plat_data->fb0_platform_data->ipu_channel_fg =
++ MX51_IPU_CHANNEL_MEM_FG_SYNC;
++ plat_data->fb0_platform_data->dc_channel = 5;
++ plat_data->fb0_platform_data->dp_channel = IPU_DP_FLOW_SYNC;
++
++ ipu_add_subdevice_pdata(pdev, "imx-ipuv3-fb", 0,
++ plat_data->fb0_platform_data,
++ sizeof(struct ipuv3_fb_platform_data));
++ }
++
++ if (plat_data->fb1_platform_data) {
++ plat_data->fb1_platform_data->ipu_channel_bg =
++ MX51_IPU_CHANNEL_MEM_DC_SYNC;
++ plat_data->fb1_platform_data->ipu_channel_fg = -1;
++ plat_data->fb1_platform_data->dc_channel = 1;
++ plat_data->fb1_platform_data->dp_channel = -1;
++
++ ipu_add_subdevice_pdata(pdev, "imx-ipuv3-fb", 1,
++ plat_data->fb1_platform_data,
++ sizeof(struct ipuv3_fb_platform_data));
++ }
++
++ return 0;
++}
++
++static int __devinit ipu_probe(struct platform_device *pdev)
++{
++ struct resource *res;
++ unsigned long ipu_base;
++ int ret, irq1, irq2;
++
++ spin_lock_init(&ipu_lock);
++
++ ipu_dev = &pdev->dev;
++
++ irq1 = platform_get_irq(pdev, 0);
++ irq2 = platform_get_irq(pdev, 1);
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++
++ if (!res || irq1 < 0 || irq2 < 0)
++ return -ENODEV;
++
++ ipu_base = res->start;
++
++ ipu_cm_reg = ioremap(ipu_base + IPU_CM_REG_BASE, PAGE_SIZE);
++ if (!ipu_cm_reg) {
++ ret = -ENOMEM;
++ goto failed_ioremap1;
++ }
++
++ ipu_idmac_reg = ioremap(ipu_base + IPU_IDMAC_REG_BASE, PAGE_SIZE);
++ if (!ipu_idmac_reg) {
++ ret = -ENOMEM;
++ goto failed_ioremap2;
++ }
++
++ ret = ipu_mipi_setup();
++ if (ret)
++ goto failed_mipi_setup;
++
++ ipu_clk = clk_get(&pdev->dev, "ipu");
++ if (IS_ERR(ipu_clk)) {
++ ret = PTR_ERR(ipu_clk);
++ dev_err(&pdev->dev, "clk_get failed with %d", ret);
++ goto failed_clk_get;
++ }
++
++ clk_enable(ipu_clk);
++
++ ret = request_irq(irq1, ipu_irq_handler, IRQF_DISABLED, pdev->name,
++ &pdev->dev);
++ if (ret) {
++ dev_err(&pdev->dev, "request irq %d failed with: %d\n", irq1, ret);
++ goto failed_request_irq1;
++ }
++
++ ret = request_irq(irq2, ipu_irq_handler, IRQF_DISABLED, pdev->name,
++ &pdev->dev);
++ if (ret) {
++ dev_err(&pdev->dev, "request irq %d failed with: %d\n", irq2, ret);
++ goto failed_request_irq2;
++ }
++
++ ipu_reset();
++
++ ret = ipu_submodules_init(pdev, ipu_base, ipu_clk);
++ if (ret)
++ goto failed_submodules_init;
++
++ /* Set sync refresh channels as high priority */
++ ipu_idmac_write(0x18800000, IDMAC_CHA_PRI(0));
++
++ ret = ipu_add_client_devices(pdev);
++ if (ret) {
++ dev_err(&pdev->dev, "adding client devices failed with %d\n", ret);
++ goto failed_add_clients;
++ }
++
++ return 0;
++
++failed_add_clients:
++ ipu_submodules_exit(pdev, ipu_base);
++failed_submodules_init:
++ free_irq(irq2, &pdev->dev);
++failed_request_irq2:
++ free_irq(irq1, &pdev->dev);
++failed_request_irq1:
++ clk_put(ipu_clk);
++failed_clk_get:
++failed_mipi_setup:
++ iounmap(ipu_idmac_reg);
++failed_ioremap2:
++ iounmap(ipu_cm_reg);
++failed_ioremap1:
++
++ return ret;
++}
++
++static int __devexit ipu_remove(struct platform_device *pdev)
++{
++ struct resource *res;
++ unsigned long ipu_base;
++ int irq1, irq2;
++
++ irq1 = platform_get_irq(pdev, 0);
++ irq2 = platform_get_irq(pdev, 1);
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ ipu_base = res->start;
++
++ mfd_remove_devices(&pdev->dev);
++ ipu_submodules_exit(pdev, ipu_base);
++ free_irq(irq2, &pdev->dev);
++ free_irq(irq1, &pdev->dev);
++ clk_disable(ipu_clk);
++ clk_put(ipu_clk);
++ iounmap(ipu_idmac_reg);
++ iounmap(ipu_cm_reg);
++
++ return 0;
++}
++
++static struct platform_driver mxcipu_driver = {
++ .driver = {
++ .name = "imx-ipuv3",
++ },
++ .probe = ipu_probe,
++ .remove = __devexit_p(ipu_remove),
++};
++
++static int __init ipu_gen_init(void)
++{
++ int32_t ret;
++
++ ret = platform_driver_register(&mxcipu_driver);
++ return 0;
++}
++subsys_initcall(ipu_gen_init);
++
++static void __exit ipu_gen_uninit(void)
++{
++ platform_driver_unregister(&mxcipu_driver);
++}
++module_exit(ipu_gen_uninit);
++
++MODULE_DESCRIPTION("i.MX IPU v3 driver");
++MODULE_AUTHOR("Sascha Hauer <s....@pe...>");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/mfd/imx-ipu-v3/ipu-cpmem.c b/drivers/mfd/imx-ipu-v3/ipu-cpmem.c
+new file mode 100644
+index 0000000..587b487
+--- /dev/null
++++ b/drivers/mfd/imx-ipu-v3/ipu-cpmem.c
+@@ -0,0 +1,608 @@
++/*
++ * Copyright (c) 2010 Sascha Hauer <s....@pe...>
++ * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 of the License, or (at your
++ * option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
++ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ */
++
++#include <linux/kernel.h>
++#include <linux/device.h>
++#include <linux/mfd/imx-ipu-v3.h>
++#include <linux/types.h>
++#include <linux/bitrev.h>
++#include <linux/io.h>
++
++#include "ipu-prv.h"
++
++#define __F(word, ofs, size) ((((word) * 160 + (ofs)) << 8) | (size))
++
++#define IPU_FIELD_XV __F(0, 0, 10)
++#define IPU_FIELD_YV __F(0, 10, 9)
++#define IPU_FIELD_XB __F(0, 19, 13)
++#define IPU_FIELD_YB __F(0, 32, 12)
++#define IPU_FIELD_NSB_B __F(0, 44, 1)
++#define IPU_FIELD_CF __F(0, 45, 1)
++#define IPU_FIELD_UBO __F(0, 46, 22)
++#define IPU_FIELD_VBO __F(0, 68, 22)
++#define IPU_FIELD_IOX __F(0, 90, 4)
++#define IPU_FIELD_RDRW __F(0, 94, 1)
++#define IPU_FIELD_SO __F(0, 113, 1)
++#define IPU_FIELD_BNDM __F(0, 114, 3)
++#define IPU_FIELD_BM __F(0, 117, 2)
++#define IPU_FIELD_ROT __F(0, 119, 1)
++#define IPU_FIELD_HF __F(0, 120, 1)
++#define IPU_FIELD_VF __F(0, 121, 1)
++#define IPU_FIELD_THE __F(0, 122, 1)
++#define IPU_FIELD_CAP __F(0, 123, 1)
++#define IPU_FIELD_CAE __F(0, 124, 1)
++#define IPU_FIELD_FW __F(0, 125, 13)
++#define IPU_FIELD_FH __F(0, 138, 12)
++#define IPU_FIELD_EBA0 __F(1, 0, 29)
++#define IPU_FIELD_EBA1 __F(1, 29, 29)
++#define IPU_FIELD_ILO __F(1, 58, 20)
++#define IPU_FIELD_NPB __F(1, 78, 7)
++#define IPU_FIELD_PFS __F(1, 85, 4)
++#define IPU_FIELD_ALU __F(1, 89, 1)
++#define IPU_FIELD_ALBM __F(1, 90, 3)
++#define IPU_FIELD_ID __F(1, 93, 2)
++#define IPU_FIELD_TH __F(1, 95, 7)
++#define IPU_FIELD_SLY __F(1, 102, 14)
++#define IPU_FIELD_WID3 __F(1, 125, 3)
++#define IPU_FIELD_SLUV __F(1, 128, 14)
++#define IPU_FIELD_CRE __F(1, 149, 1)
++
++#define IPU_FIELD_XV __F(0, 0, 10)
++#define IPU_FI...
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