[Armadeus-commitlog] armadeus branch, master, updated. release-3.3-147-g8f21e4e
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[Armadeus-commitlog] armadeus branch, master, updated. release-3.3-147-g8f21e4e
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From: jorasse <jo...@us...> - 2010-11-29 22:41:06
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This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 8f21e4edf1882f7601e5c18203443a2cfeebfdcf (commit)
from c51bd7325d77d2e6bd29464c323280df2e228d16 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 8f21e4edf1882f7601e5c18203443a2cfeebfdcf
Author: Eric Jarrige <eri...@ar...>
Date: Mon Nov 29 23:42:13 2010 +0100
Support imx51 IIM fuse
Signed-off-by: Eric Jarrige <eri...@ar...>
-----------------------------------------------------------------------
Summary of changes:
.../device/armadeus/apf51/apf51-u-boot-2010.03.h | 14 +-
.../target/u-boot/u-boot-2010.03-410-imx-iim.patch | 595 ++++++++++++++++++++
2 files changed, 605 insertions(+), 4 deletions(-)
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-410-imx-iim.patch
diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h
index 014c4c4..c176187 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2010.03.h
@@ -84,6 +84,7 @@
#define CONFIG_CMD_EXT2 /* EXT2 Support */
#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
//#define CONFIG_CMD_I2C /* I2C serial bus support */
+#define CONFIG_CMD_IIM /* imx iim fuse */
#undef CONFIG_CMD_IMLS /* List all found images */
#define CONFIG_CMD_IMMAP /* IMMR dump support */
#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
@@ -642,6 +643,15 @@
#define CONFIG_HW_WATCHDOG
+/**
+ * IIM fuse Config
+ */
+
+#define CONFIG_IMX_IIM
+#define IMX_IIM_BASE IIM_BASE_ADDR
+#define CONFIG_IIM_MAC_BANK 1
+#define CONFIG_IIM_MAC_ROW 9
+
/*
* From here, there should not be any user configuration.
* All Equations are automatic
@@ -1012,7 +1022,3 @@
#endif /* __CONFIG_H */
-#ifdef CONFIG_BOARD_NAME
-#undef CONFIG_BOARD_NAME
-#endif
-#define CONFIG_BOARD_NAME apf51
diff --git a/buildroot/target/u-boot/u-boot-2010.03-410-imx-iim.patch b/buildroot/target/u-boot/u-boot-2010.03-410-imx-iim.patch
new file mode 100644
index 0000000..8eb5ff1
--- /dev/null
+++ b/buildroot/target/u-boot/u-boot-2010.03-410-imx-iim.patch
@@ -0,0 +1,595 @@
+--- u-boot-2010.03/common/cmd_iim.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2010.03-fec/common/cmd_iim.c 2010-11-25 22:55:47.000000000 +0100
+@@ -0,0 +1,95 @@
++/*
++ * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
++ *
++ * Copyright 2007, Freescale Semiconductor, Inc
++ * Andy Fleming
++ *
++ * Based vaguely on the pxa mmc code:
++ * (C) Copyright 2003
++ * Kyle Harris, Nexus Technologies, Inc. kh...@ne...
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <linux/types.h>
++#include <asm/io.h>
++#include <command.h>
++#include <common.h>
++#include <asm/arch/imx_iim.h>
++
++int do_iimops(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
++{
++ int bank = 0,
++ row = 0,
++ val = 0;
++
++ if (argc < 3 || argc > 5)
++ goto err_rtn;
++
++ if (strcmp(argv[1], "read") == 0) {
++ if (strcmp(argv[2], "fecmac") == 0) {
++ if (3 == argc)
++ iim_blow_func(argv[2], NULL);
++ else
++ goto err_rtn;
++ } else {
++ if (4 == argc) {
++ bank = simple_strtoul(argv[2], NULL, 16);
++ row = simple_strtoul(argv[3], NULL, 16);
++
++ iim_read(bank, row);
++ } else
++ goto err_rtn;
++ }
++ } else if (strcmp(argv[1], "blow") == 0) {
++ if (strcmp(argv[2], "fecmac") == 0) {
++ if (4 == argc)
++ iim_blow_func(argv[2], argv[3]);
++ else
++ goto err_rtn;
++ } else {
++ if (5 == argc) {
++ bank = simple_strtoul(argv[2], NULL, 16);
++ row = simple_strtoul(argv[3], NULL, 16);
++ val = simple_strtoul(argv[4], NULL, 16);
++
++ iim_blow(bank, row, val);
++ } else
++ goto err_rtn;
++ }
++ } else
++ goto err_rtn;
++
++ return 0;
++err_rtn:
++ printf("Invalid parameters!\n");
++ printf("It is too dangeous for you to use iim command.\n");
++ return 1;
++}
++
++U_BOOT_CMD(
++ iim, 5, 1, do_iimops,
++ "IIM sub system",
++ "Warning: all numbers in parameter are in hex format!\n"
++ "iim read <bank> <row> - Read some fuses\n"
++ "iim read fecmac - Read FEC Mac address\n"
++ "iim blow <bank> <row> <value> - Blow some fuses\n"
++ "iim blow fecmac <0x##:0x##:0x##:0x##:0x##:0x##>"
++ "- Blow FEC Mac address");
++
+--- u-boot-2010.03/common/Makefile 2010-03-31 23:54:39.000000000 +0200
++++ u-boot-2010.03-fec/common/Makefile 2010-11-25 22:28:22.000000000 +0100
+@@ -99,6 +99,7 @@ COBJS-$(CONFIG_CMD_FLASH) += cmd_flash.o
+ ifdef CONFIG_FPGA
+ COBJS-$(CONFIG_CMD_FPGA) += cmd_fpga.o
+ endif
++COBJS-$(CONFIG_CMD_IIM) += cmd_iim.o
+ COBJS-$(CONFIG_CMD_I2C) += cmd_i2c.o
+ COBJS-$(CONFIG_CMD_IDE) += cmd_ide.o
+ COBJS-$(CONFIG_CMD_IMMAP) += cmd_immap.o
+--- u-boot-2010.03/drivers/misc/imx_iim.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2010.03-fec/drivers/misc/imx_iim.c 2010-11-25 22:52:55.000000000 +0100
+@@ -0,0 +1,344 @@
++/*
++ * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
++ * Terry Lv
++ *
++ * Copyright 2007, Freescale Semiconductor, Inc
++ * Andy Fleming
++ *
++ * Based vaguely on the pxa mmc code:
++ * (C) Copyright 2003
++ * Kyle Harris, Nexus Technologies, Inc. kh...@ne...
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <linux/types.h>
++#include <asm/io.h>
++#include <asm/arch/imx_iim.h>
++#include <asm/arch/imx-regs.h>
++#include <common.h>
++#include <net.h>
++
++static const struct iim_regs *imx_iim =
++ (struct iim_regs *)IMX_IIM_BASE;
++
++static void quick_itoa(u32 num, char *a)
++{
++ int i, j, k;
++ for (i = 0; i <= 7; i++) {
++ j = (num >> (4 * i)) & 0xf;
++ k = (j < 10) ? '0' : ('a' - 0xa);
++ a[i] = j + k;
++ }
++}
++
++/* slen - streng length, e.g.: 23 -> slen=2; abcd -> slen=4 */
++/* only convert hex value as string input. so "12" is 0x12. */
++static u32 quick_atoi(char *a, u32 slen)
++{
++ u32 i, num = 0, digit;
++
++ for (i = 0; i < slen; i++) {
++ if (a[i] >= '0' && a[i] <= '9') {
++ digit = a[i] - '0';
++ } else if (a[i] >= 'a' && a[i] <= 'f') {
++ digit = a[i] - 'a' + 10;
++ } else if (a[i] >= 'A' && a[i] <= 'F') {
++ digit = a[i] - 'A' + 10;
++ } else {
++ printf("ERROR: %c\n", a[i]);
++ return -1;
++ }
++ num = (num * 16) + digit;
++ }
++
++ return num;
++}
++
++static void fuse_op_start(void)
++{
++ /* Do not generate interrupt */
++ writel(0, &(imx_iim->statm));
++ /* clear the status bits and error bits */
++ writel(0x3, &(imx_iim->stat));
++ writel(0xfe, &(imx_iim->err));
++}
++
++/*
++ * The action should be either:
++ * POLL_FUSE_PRGD
++ * or:
++ * POLL_FUSE_SNSD
++ */
++static s32 poll_fuse_op_done(s32 action)
++{
++ u32 status, error;
++
++ if (action != POLL_FUSE_PRGD && action != POLL_FUSE_SNSD) {
++ printf("%s(%d) invalid operation\n", __func__, action);
++ return -1;
++ }
++
++ /* Poll busy bit till it is NOT set */
++ while ((readl(&(imx_iim->stat)) & IIM_STAT_BUSY) != 0)
++ ;
++
++ /* Test for successful write */
++ status = readl(&(imx_iim->stat));
++ error = readl(&(imx_iim->err));
++
++ if ((status & action) != 0 && \
++ (error & (action >> IIM_ERR_SHIFT)) == 0) {
++ if (error) {
++ printf("Even though the operation"
++ "seems successful...\n");
++ printf("There are some error(s) "
++ "at addr=0x%x: 0x%x\n",
++ (u32)&(imx_iim->err), error);
++ }
++ return 0;
++ }
++ printf("%s(%d) failed\n", __func__, action);
++ printf("status address=0x%x, value=0x%x\n",
++ (u32)&(imx_iim->stat), status);
++ printf("There are some error(s) at addr=0x%x: 0x%x\n",
++ (u32)&(imx_iim->err), error);
++ return -1;
++}
++
++static u32 sense_fuse(s32 bank, s32 row, s32 bit)
++{
++ s32 addr, addr_l, addr_h, reg_addr;
++
++ fuse_op_start();
++
++ addr = ((bank << 11) | (row << 3) | (bit & 0x7));
++ /* Set IIM Program Upper Address */
++ addr_h = (addr >> 8) & 0x000000FF;
++ /* Set IIM Program Lower Address */
++ addr_l = (addr & 0x000000FF);
++
++#ifdef IIM_FUSE_DEBUG
++ printf("%s: addr_h=0x%x, addr_l=0x%x\n",
++ __func__, addr_h, addr_l);
++#endif
++ writel(addr_h, &(imx_iim->ua));
++ writel(addr_l, &(imx_iim->la));
++
++ /* Start sensing */
++ writel(0x8, &(imx_iim->fctl));
++ if (poll_fuse_op_done(POLL_FUSE_SNSD) != 0) {
++ printf("%s(bank: %d, row: %d, bit: %d failed\n",
++ __func__, bank, row, bit);
++ }
++ reg_addr = (s32*)&(imx_iim->sdat);
++
++ return readl(reg_addr);
++}
++
++int iim_read(int bank, char row)
++{
++ u32 fuse_val;
++ s32 err = 0;
++
++ printf("Read fuse at bank:%d row:%d\n", bank, row);
++ fuse_val = sense_fuse(bank, row, 0);
++ printf("fuses at (bank:%d, row:%d) = 0x%x\n", bank, row, fuse_val);
++
++ return err;
++}
++
++/* Blow fuses based on the bank, row and bit positions (all 0-based)
++*/
++static s32 fuse_blow_bit(s32 bank, s32 row, s32 bit)
++{
++ int addr, addr_l, addr_h, ret = -1;
++
++ fuse_op_start();
++
++ /* Disable IIM Program Protect */
++ writel(0xaa, &(imx_iim->preg_p));
++
++ addr = ((bank << 11) | (row << 3) | (bit & 0x7));
++ /* Set IIM Program Upper Address */
++ addr_h = (addr >> 8) & 0x000000FF;
++ /* Set IIM Program Lower Address */
++ addr_l = (addr & 0x000000FF);
++
++#ifdef IIM_FUSE_DEBUG
++ printf("blowing addr_h=0x%x, addr_l=0x%x\n", addr_h, addr_l);
++#endif
++
++ writel(addr_h, &(imx_iim->ua));
++ writel(addr_l, &(imx_iim->la));
++
++ /* Start Programming */
++ writel(0x31, &(imx_iim->fctl));
++ if (poll_fuse_op_done(POLL_FUSE_PRGD) == 0)
++ ret = 0;
++
++ /* Enable IIM Program Protect */
++ writel(0x0, &(imx_iim->preg_p));
++
++ return ret;
++}
++
++static void fuse_blow_row(s32 bank, s32 row, s32 value)
++{
++ u32 reg, i;
++
++ /* enable fuse blown */
++ reg = readl(CCM_BASE_ADDR + 0x64);
++ reg |= 0x10;
++ writel(reg, CCM_BASE_ADDR + 0x64);
++
++ for (i = 0; i < 8; i++) {
++ if (((value >> i) & 0x1) == 0)
++ continue;
++ if (fuse_blow_bit(bank, row, i) != 0) {
++ printf("fuse_blow_bit(bank: %d, row: %d, "
++ "bit: %d failed\n",
++ bank, row, i);
++ }
++ }
++ reg &= ~0x10;
++ writel(reg, CCM_BASE_ADDR + 0x64);
++}
++
++int iim_blow(int bank, int row, int val)
++{
++ u32 fuse_val, err = 0;
++
++ printf("Blowing fuse at bank:%d row:%d value:%d\n",
++ bank, row, val);
++ fuse_blow_row(bank, row, val);
++ fuse_val = sense_fuse(bank, row, 0);
++ printf("fuses at (bank:%d, row:%d) = 0x%x\n", bank, row, fuse_val);
++
++ return err;
++}
++
++static int iim_read_mac_addr(u8 *data)
++{
++ s32 bank = CONFIG_IIM_MAC_BANK;
++ s32 row = CONFIG_IIM_MAC_ROW;
++
++ data[0] = sense_fuse(bank, row, 0) ;
++ data[1] = sense_fuse(bank, row + 1, 0) ;
++ data[2] = sense_fuse(bank, row + 2, 0) ;
++ data[3] = sense_fuse(bank, row + 3, 0) ;
++ data[4] = sense_fuse(bank, row + 4, 0) ;
++ data[5] = sense_fuse(bank, row + 5, 0) ;
++
++ if (!memcmp(data, "\0\0\0\0\0\0", 6))
++ return 0;
++ else
++ return 1;
++}
++
++int iim_blow_func(char *func_name, char *func_val)
++{
++ u32 value, i;
++ char *s;
++ char val[3];
++ s32 err = 0;
++
++ if (0 == strcmp(func_name, "scc")) {
++ /* fuse_blow scc
++ C3D153EDFD2EA9982226EF5047D3B9A0B9C7138EA87C028401D28C2C2C0B9AA2 */
++ printf("Ready to burn SCC fuses\n");
++ s = func_val;
++ for (i = 0; ; ++i) {
++ memcpy(val, s, 2);
++ val[2] = '\0';
++ value = quick_atoi(val, 2);
++ /* printf("fuse_blow_row(2, %d, value=0x%x)\n",
++ i, value); */
++ fuse_blow_row(2, i, value);
++
++ if ((++s)[0] == '\0') {
++ printf("ERROR: Odd string input\n");
++ err = -1;
++ break;
++ }
++ if ((++s)[0] == '\0') {
++ printf("Successful\n");
++ break;
++ }
++ }
++ } else if (0 == strcmp(func_name, "srk")) {
++ /* fuse_blow srk
++ 418bccd09b53bee1ab59e2662b3c7877bc0094caee201052add49be8780dff95 */
++ printf("Ready to burn SRK key fuses\n");
++ s = func_val;
++ for (i = 0; ; ++i) {
++ memcpy(val, s, 2);
++ val[2] = '\0';
++ value = quick_atoi(val, 2);
++ if (i == 0) {
++ /* 0x41 goes to SRK_HASH[255:248],
++ * bank 1, row 1 */
++ fuse_blow_row(1, 1, value);
++ } else {
++ /* 0x8b in SRK_HASH[247:240] bank 3, row 1 */
++ /* 0xcc in SRK_HASH[239:232] bank 3, row 2 */
++ /* ... */
++ fuse_blow_row(3, i, value);
++
++ if ((++s)[0] == '\0') {
++ printf("ERROR: Odd string input\n");
++ err = -1;
++ break;
++ }
++ if ((++s)[0] == '\0') {
++ printf("Successful\n");
++ break;
++ }
++ }
++ }
++ } else if (0 == strcmp(func_name, "fecmac")) {
++ u8 ea[6] = { 0 };
++
++ if (NULL == func_val) {
++ /* Read the Mac address and print it */
++ iim_read_mac_addr(ea);
++
++ printf("FEC MAC address: ");
++ printf("0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n\n",
++ ea[0], ea[1], ea[2], ea[3], ea[4], ea[5]);
++
++ return 0;
++ }
++
++ eth_parse_enetaddr(func_val, ea);
++ if (!is_valid_ether_addr(ea)) {
++ printf("Error: invalid mac address parameter!\n");
++ err = -1;
++ } else {
++ for (i = 0; i < 6; ++i)
++ fuse_blow_row(1, i + 9, ea[i]);
++ }
++ } else {
++ printf("This command is not supported\n");
++ }
++
++ return err;
++}
++
++
+--- u-boot-2010.03/drivers/misc/Makefile 2010-03-31 23:54:39.000000000 +0200
++++ u-boot-2010.03-fec/drivers/misc/Makefile 2010-11-25 22:26:33.000000000 +0100
+@@ -28,6 +28,7 @@ LIB := $(obj)libmisc.a
+ COBJS-$(CONFIG_ALI152X) += ali512x.o
+ COBJS-$(CONFIG_DS4510) += ds4510.o
+ COBJS-$(CONFIG_FSL_LAW) += fsl_law.o
++COBJS-$(CONFIG_IMX_IIM) += imx_iim.o
+ COBJS-$(CONFIG_NS87308) += ns87308.o
+ COBJS-$(CONFIG_STATUS_LED) += status_led.o
+ COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o
+--- u-boot-2010.03/drivers/net/fec_mxc.c 2010-11-29 23:16:52.000000000 +0100
++++ u-boot-2010.03-fec/drivers/net/fec_mxc.c 2010-11-29 00:24:23.000000000 +0100
+@@ -333,12 +333,14 @@ static void fec_rbd_clean(int last, stru
+
+ static int fec_get_hwaddr(struct eth_device *dev, unsigned char *mac)
+ {
+-/*
+- * The MX27 can store the mac address in internal eeprom
+- * This mechanism is not supported now by MX51
+- */
+ #ifdef CONFIG_MX51
+- return -1;
++ struct iim_regs *iim = (struct iim_regs *)IIM_BASE_ADDR;
++ int i;
++
++ for (i = 0; i < 6; i++)
++ mac[i] = readl(&iim->iim_bank_area1[IIM0_MAC + i]);
++
++ return !is_valid_ether_addr(mac);
+ #else
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ int i;
+--- u-boot-2010.03/include/asm-arm/arch-mx51/imx_iim.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2010.03-fec/include/asm-arm/arch-mx51/imx_iim.h 2010-11-28 23:21:41.000000000 +0100
+@@ -0,0 +1,43 @@
++/*
++ * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __IMX_IIM_H__
++#define __IMX_IIM_H__
++
++
++#define IIM_PROD_REV_SH 3
++#define IIM_PROD_REV_LEN 5
++#define IIM_SREV_REV_SH 4
++#define IIM_SREV_REV_LEN 4
++#define PROD_SIGNATURE_MX51 0x1
++
++#define IIM_ERR_SHIFT 8
++#define POLL_FUSE_PRGD (IIM_STAT_PRGD | (IIM_ERR_PRGE << IIM_ERR_SHIFT))
++#define POLL_FUSE_SNSD (IIM_STAT_SNSD | (IIM_ERR_SNSE << IIM_ERR_SHIFT))
++
++#define IIM_BANK_AREA_0_OFFSET 0x800
++#define IIM_BANK_AREA_1_OFFSET 0xc00
++#define IIM_BANK_AREA_2_OFFSET 0x1000
++#define IIM_BANK_AREA_3_OFFSET 0x1400
++
++int iim_read(int bank, char row);
++int iim_blow(int bank, int row, int val);
++int iim_blow_func(char *func_name, char *func_val);
++
++#endif
+--- u-boot-2010.03/include/asm-arm/arch-mx51/imx-regs.h 2010-11-29 23:16:52.000000000 +0100
++++ u-boot-2010.03-fec/include/asm-arm/arch-mx51/imx-regs.h 2010-11-29 00:21:06.000000000 +0100
+@@ -204,6 +204,8 @@
+ #define BOARD_REV_1_0 0x0
+ #define BOARD_REV_2_0 0x1
+
++/* FUSE bank offsets */
++#define IIM0_MAC 0x9
+
+ /* DDR commands */
+ /* cs ChipSelect in range of 0..1 */
+@@ -254,6 +256,49 @@ struct clkctl {
+ u32 cmeor;
+ };
+
++/* IIM Control Registers */
++struct iim_regs {
++#define IIM_STAT_BUSY (1 << 7)
++#define IIM_STAT_PRGD (1 << 1)
++#define IIM_STAT_SNSD (1 << 0)
++ u32 stat;
++ u32 statm;
++#define IIM_ERR_PRGE (1 << 7)
++#define IIM_ERR_WPE (1 << 6)
++#define IIM_ERR_OPE (1 << 5)
++#define IIM_ERR_RPE (1 << 4)
++#define IIM_ERR_WLRE (1 << 3)
++#define IIM_ERR_SNSE (1 << 2)
++#define IIM_ERR_PARITYE (1 << 1)
++ u32 err;
++ u32 emask;
++ u32 fctl;
++ u32 ua;
++ u32 la;
++ u32 sdat;
++ u32 prev;
++ u32 srev;
++ u32 preg_p;
++ u32 scs0;
++ u32 scs1;
++ u32 scs2;
++ u32 scs3;
++ u32 sahara_en0;
++ u32 sahara_en1;
++ u32 sahara_en2;
++ u32 sahara_en3;
++ u32 sahara_en4;
++ u32 sahara_en5;
++ u32 res1[0x1EB];
++ u32 iim_bank_area0[0x20];
++ u32 res2[0xE0];
++ u32 iim_bank_area1[0x20];
++ u32 res3[0xE0];
++ u32 iim_bank_area2[0x20];
++ u32 res4[0xE0];
++ u32 iim_bank_area3[0x20];
++};
++
+ /* WEIM registers */
+ struct weim {
+ u32 csgcr1;
+
hooks/post-receive
--
armadeus
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