[Armadeus-commitlog] armadeus branch, master, updated. release-3.3-107-ge068200
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[Armadeus-commitlog] armadeus branch, master, updated. release-3.3-107-ge068200
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From: Nicolas <th...@us...> - 2010-11-14 16:22:45
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This is an automated email from the git hooks/post-receive script. It was
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the project "armadeus".
The branch, master has been updated
via e068200fd00412794a6641a1c9a4c6fe965d1852 (commit)
from a10a05d5f12eecf0a84c36cb844799552110c77f (commit)
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- Log -----------------------------------------------------------------
commit e068200fd00412794a6641a1c9a4c6fe965d1852
Author: nicolas colombain <nic...@ar...>
Date: Sun Nov 14 17:22:05 2010 +0100
[LINUX] add preliminary APF51 linux patches
-----------------------------------------------------------------------
Summary of changes:
.../2.6.36/401-armadeus-fix_clock_tree.patch | 34 ++++
.../2.6.36/402-armadeus-add_nand_device.patch | 167 ++++++++++++++++++++
.../2.6.36/403-armadeus-set-uart2-debug.patch | 15 ++
.../2.6.36/404-armadeus-fix_nand_ecc_oob.patch | 85 ++++++++++
4 files changed, 301 insertions(+), 0 deletions(-)
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/401-armadeus-fix_clock_tree.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/402-armadeus-add_nand_device.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/403-armadeus-set-uart2-debug.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/404-armadeus-fix_nand_ecc_oob.patch
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/401-armadeus-fix_clock_tree.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/401-armadeus-fix_clock_tree.patch
new file mode 100644
index 0000000..81697e7
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/401-armadeus-fix_clock_tree.patch
@@ -0,0 +1,34 @@
+Index: linux-2.6.36/arch/arm/mach-mx5/clock-mx51.c
+===================================================================
+--- linux-2.6.36.orig/arch/arm/mach-mx5/clock-mx51.c 2010-10-20 22:30:22.000000000 +0200
++++ linux-2.6.36/arch/arm/mach-mx5/clock-mx51.c 2010-11-14 15:36:39.000000000 +0100
+@@ -798,7 +798,7 @@ DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_C
+
+ /* GPT */
+ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
+- NULL, NULL, &ipg_clk, NULL);
++ NULL, NULL, &ckil_clk, NULL);
+ DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
+ NULL, NULL, &ipg_clk, NULL);
+
+Index: linux-2.6.36/arch/arm/plat-mxc/time.c
+===================================================================
+--- linux-2.6.36.orig/arch/arm/plat-mxc/time.c 2010-11-14 16:55:16.000000000 +0100
++++ linux-2.6.36/arch/arm/plat-mxc/time.c 2010-11-14 16:56:02.000000000 +0100
+@@ -56,6 +56,7 @@
+ /* MX31, MX35, MX25, MXC91231, MX5 */
+ #define V2_TCTL_WAITEN (1 << 3) /* Wait enable mode */
+ #define V2_TCTL_CLK_IPG (1 << 6)
++#define V2_TCTL_CLK_IPG_32k (1 << 8)
+ #define V2_TCTL_FRR (1 << 9)
+ #define V2_IR 0x0c
+ #define V2_TSTAT 0x08
+@@ -308,7 +309,7 @@ void __init mxc_timer_init(struct clk *t
+ __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */
+
+ if (timer_is_v2())
+- tctl_val = V2_TCTL_CLK_IPG | V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
++ tctl_val = V2_TCTL_CLK_IPG_32k | V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
+ else
+ tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN;
+
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/402-armadeus-add_nand_device.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/402-armadeus-add_nand_device.patch
new file mode 100644
index 0000000..74579c4
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/402-armadeus-add_nand_device.patch
@@ -0,0 +1,167 @@
+Index: linux-2.6.36/arch/arm/mach-mx5/devices.h
+===================================================================
+--- linux-2.6.36.orig/arch/arm/mach-mx5/devices.h 2010-10-20 22:30:22.000000000 +0200
++++ linux-2.6.36/arch/arm/mach-mx5/devices.h 2010-11-14 12:16:07.000000000 +0100
+@@ -1,3 +1,4 @@
++extern struct platform_device mxc_nand_device;
+ extern struct platform_device mxc_uart_device0;
+ extern struct platform_device mxc_uart_device1;
+ extern struct platform_device mxc_uart_device2;
+Index: linux-2.6.36/arch/arm/mach-mx5/devices.c
+===================================================================
+--- linux-2.6.36.orig/arch/arm/mach-mx5/devices.c 2010-10-20 22:30:22.000000000 +0200
++++ linux-2.6.36/arch/arm/mach-mx5/devices.c 2010-11-14 12:15:57.000000000 +0100
+@@ -17,6 +17,29 @@
+ #include <mach/imx-uart.h>
+ #include <mach/irqs.h>
+
++static struct resource mxc_nand_resources[] = {
++ {
++ .start = MX51_NFC_AXI_BASE_ADDR,
++ .end = MX51_NFC_AXI_BASE_ADDR + 0x1FFF,
++ .flags = IORESOURCE_MEM
++ }, {
++ .start = MX51_NFC_BASE_ADDR,
++ .end = MX51_NFC_BASE_ADDR + 0x37,
++ .flags = IORESOURCE_MEM
++ }, {
++ .start = MX51_MXC_INT_NFC,
++ .end = MX51_MXC_INT_NFC,
++ .flags = IORESOURCE_IRQ
++ },
++};
++
++struct platform_device mxc_nand_device = {
++ .name = "mxc_nand",
++ .id = 0,
++ .num_resources = ARRAY_SIZE(mxc_nand_resources),
++ .resource = mxc_nand_resources,
++};
++
+ static struct resource uart0[] = {
+ {
+ .start = MX51_UART1_BASE_ADDR,
+Index: linux-2.6.36/arch/arm/mach-mx5/clock-mx51.c
+===================================================================
+--- linux-2.6.36.orig/arch/arm/mach-mx5/clock-mx51.c 2010-10-20 22:30:22.000000000 +0200
++++ linux-2.6.36/arch/arm/mach-mx5/clock-mx51.c 2010-11-14 12:16:40.000000000 +0100
+@@ -600,6 +600,84 @@ static int _clk_usboh3_set_parent(struct
+ return 0;
+ }
+
++static unsigned long clk_emi_slow_get_rate(struct clk *clk)
++{
++ u32 reg, div;
++ unsigned long parent_rate;
++
++ parent_rate = clk_get_rate(clk->parent);
++
++ reg = __raw_readl(MXC_CCM_CBCDR);
++ div = ((reg & MXC_CCM_CBCDR_EMI_PODF_MASK) >>
++ MXC_CCM_CBCDR_EMI_PODF_OFFSET) + 1;
++
++ return parent_rate / div;
++}
++
++static int _clk_emi_slow_set_parent(struct clk *clk, struct clk *parent)
++{
++ u32 reg = __raw_readl(MXC_CCM_CBCDR);
++ if (parent == &ahb_clk)
++ reg |= MXC_CCM_CBCDR_EMI_CLK_SEL;
++ else if (parent == &main_bus_clk)
++ reg &= ~MXC_CCM_CBCDR_EMI_CLK_SEL;
++ else
++ return -EINVAL;
++
++ __raw_writel(reg, MXC_CCM_CBCDR);
++
++ return 0;
++}
++
++static int _clk_emi_slow_set_rate(struct clk *clk, unsigned long rate)
++{
++ u32 reg, div;
++ unsigned long parent_rate;
++ int i = 0;
++
++ parent_rate = clk_get_rate(clk->parent);
++
++ div = parent_rate / rate;
++ if (div > 8 || div < 1 || ((parent_rate / div) != rate))
++ return -EINVAL;
++
++ reg = __raw_readl(MXC_CCM_CBCDR);
++ reg &= ~MXC_CCM_CBCDR_EMI_PODF_MASK;
++ reg |= (div - 1) << MXC_CCM_CBCDR_EMI_PODF_OFFSET;
++ __raw_writel(reg, MXC_CCM_CBCDR);
++
++ /* Wait for lock */
++ do {
++ reg = __raw_readl(MXC_CCM_CDHIPR);
++ if (!(reg & MXC_CCM_CDHIPR_EMI_PODF_BUSY))
++ break;
++
++ udelay(1);
++ } while (++i < MAX_DPLL_WAIT_TRIES);
++
++ if (i == MAX_DPLL_WAIT_TRIES) {
++ pr_err("MX5: clk_emi_slow_set_rate failed\n");
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++
++static unsigned long _clk_nfc_get_rate(struct clk *clk)
++{
++ u32 reg, div;
++ unsigned long parent_rate;
++
++ parent_rate = clk_get_rate(clk->parent);
++
++ reg = __raw_readl(MXC_CCM_CBCDR);
++ div = ((reg & MXC_CCM_CBCDR_NFC_PODF_MASK) >>
++ MXC_CCM_CBCDR_NFC_PODF_OFFSET) + 1;
++ return parent_rate / div;
++}
++
++
+ static unsigned long get_high_reference_clock_rate(struct clk *clk)
+ {
+ return external_high_reference;
+@@ -727,6 +805,14 @@ static struct clk usboh3_clk = {
+ .set_parent = _clk_usboh3_set_parent,
+ };
+
++static struct clk emi_slow_clk = {
++ .parent = &main_bus_clk,
++ .get_rate = clk_emi_slow_get_rate,
++ .set_rate = _clk_emi_slow_set_rate,
++ .set_parent = _clk_emi_slow_set_parent,
++};
++
++
+ static struct clk ahb_max_clk = {
+ .parent = &ahb_clk,
+ .enable_reg = MXC_CCM_CCGR0,
+@@ -812,7 +898,12 @@ DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1
+
+ /* FEC */
+ DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET,
+- NULL, NULL, &ipg_clk, NULL);
++ NULL, NULL, &emi_slow_clk, NULL);
++
++
++/* NFC */
++DEFINE_CLOCK(nfc_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG10_OFFSET,
++ _clk_nfc_get_rate, NULL, &emi_slow_clk, NULL);
+
+ #define _REGISTER_CLOCK(d, n, c) \
+ { \
+@@ -837,6 +928,7 @@ static struct clk_lookup lookups[] = {
+ _REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk)
+ _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk)
+ _REGISTER_CLOCK("imx-keypad.0", NULL, kpp_clk)
++ _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
+ };
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/403-armadeus-set-uart2-debug.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/403-armadeus-set-uart2-debug.patch
new file mode 100644
index 0000000..26e4c1c
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/403-armadeus-set-uart2-debug.patch
@@ -0,0 +1,15 @@
+Index: linux-2.6.36/arch/arm/plat-mxc/include/mach/debug-macro.S
+===================================================================
+--- linux-2.6.36.orig/arch/arm/plat-mxc/include/mach/debug-macro.S 2010-10-20 22:30:22.000000000 +0200
++++ linux-2.6.36/arch/arm/plat-mxc/include/mach/debug-macro.S 2010-11-14 13:52:58.000000000 +0100
+@@ -50,8 +50,8 @@
+ #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
+ #endif
+ #include <mach/mx51.h>
+-#define UART_PADDR MX51_UART1_BASE_ADDR
+-#define UART_VADDR MX51_AIPS1_IO_ADDRESS(MX51_UART1_BASE_ADDR)
++#define UART_PADDR MX51_UART2_BASE_ADDR
++#define UART_VADDR MX51_AIPS1_IO_ADDRESS(MX51_UART2_BASE_ADDR)
+ #endif
+
+ #ifdef CONFIG_ARCH_MXC91231
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/404-armadeus-fix_nand_ecc_oob.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/404-armadeus-fix_nand_ecc_oob.patch
new file mode 100644
index 0000000..52e0789
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.36/404-armadeus-fix_nand_ecc_oob.patch
@@ -0,0 +1,85 @@
+Index: linux-2.6.36/drivers/mtd/nand/mxc_nand.c
+===================================================================
+--- linux-2.6.36.orig/drivers/mtd/nand/mxc_nand.c 2010-11-14 12:33:43.000000000 +0100
++++ linux-2.6.36/drivers/mtd/mxc_nand.c 2010-11-14 12:16:17.000000000 +0100
+@@ -211,6 +211,18 @@ static struct nand_ecclayout nandv2_hw_e
+ }
+ };
+
++/* OOB description for V3 and 2048 byte pages with 64 byte OOB */
++static struct nand_ecclayout nandv3_hw_eccoob_largepage = {
++ .eccbytes = 4 * 8,
++ .eccpos = {
++ 8, 9, 10, 11, 12, 13, 14, 15,
++ 72, 73, 74, 75, 76, 77, 78, 79,
++ 136, 137, 138, 139, 140, 141, 142, 143,
++ 200, 201, 202, 203, 204, 205, 206, 207
++ },
++ .oobfree = { {16, 56}, {80, 56}, {144, 56}, {208, 48} },
++};
++
+ static u_char nand_verify_buf[2048];
+
+ #ifdef CONFIG_MTD_PARTITIONS
+@@ -1013,6 +1025,28 @@ static struct nand_bbt_descr bbt_mirror_
+ .pattern = mirror_pattern,
+ };
+
++/* V3 BBT, use 4bit ECC */
++static struct nand_bbt_descr v3bbt_main_descr = {
++ .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
++ | NAND_BBT_4BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
++ .offs = 2,
++ .len = 4,
++ .veroffs = 6,
++ .maxblocks = 4,
++ .pattern = bbt_pattern
++};
++
++/* V3 BBT, use 4bit ECC */
++static struct nand_bbt_descr v3bbt_mirror_descr = {
++ .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
++ | NAND_BBT_4BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
++ .offs = 2,
++ .len = 4,
++ .veroffs = 6,
++ .maxblocks = 4,
++ .pattern = bbt_pattern
++};
++
+ static int __init mxcnd_probe(struct platform_device *pdev)
+ {
+ struct nand_chip *this;
+@@ -1029,6 +1063,7 @@ static int __init mxcnd_probe(struct pla
+ if (!host)
+ return -ENOMEM;
+
++
+ host->data_buf = (uint8_t *)(host + 1);
+
+ host->dev = &pdev->dev;
+@@ -1128,7 +1163,7 @@ static int __init mxcnd_probe(struct pla
+ host->get_dev_status = get_dev_status_v3;
+ host->irq_control = irq_control_v3;
+ oob_smallpage = &nandv2_hw_eccoob_smallpage;
+- oob_largepage = &nandv2_hw_eccoob_largepage;
++ oob_largepage = &nandv3_hw_eccoob_largepage;
+ } else
+ BUG();
+
+@@ -1152,8 +1187,13 @@ static int __init mxcnd_probe(struct pla
+ this->options |= NAND_BUSWIDTH_16;
+
+ if (pdata->flash_bbt) {
+- this->bbt_td = &bbt_main_descr;
+- this->bbt_md = &bbt_mirror_descr;
++ if (nfc_is_v3_2()) {
++ this->bbt_td = &v3bbt_main_descr;
++ this->bbt_md = &v3bbt_mirror_descr;
++ } else {
++ this->bbt_td = &bbt_main_descr;
++ this->bbt_md = &bbt_mirror_descr;
++ }
+ /* update flash based bbt */
+ this->options |= NAND_USE_FLASH_BBT;
+ }
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